5 Commits

Author	SHA1	Message	Date
zhuyanlin	bf40d70df9	xtensa:esp32s2: setup software interrupt as swi interrupt ... Enable and setup software interrupt for esp32s2 Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>	2022-02-24 00:06:43 +01:00
zhuyanlin	9ea7676731	arch:xtensa: rename XCHAL_INT_NLEVELS to XCHAL_NUM_INTLEVELS ... The name used in Tensilica support file core-isa.h for all vendors is `XCHAL_NUM_INTLEVELS`. Use a new name may be confused by newer porting xtensa arch. Change-Id: Ie108d3fdfcc02c81f0eacfca852a1cfc9eea17de	2021-08-28 21:51:45 +02:00
Alan C. Assis	929a4a7278	Fix dangling whitespace at the end of line	2021-06-01 07:49:54 +02:00
Alan C. Assis	06795a221a	Clean ESP32S2 Xtensa files	2021-06-01 07:49:54 +02:00
Alan C. Assis	7767acd24a	Add initial ESP32S2 Xtensa support	2021-06-01 07:49:54 +02:00