Most developers start learning Nuttx from sim/nsh, but the login experience is very bad,
they don't know where to get the username and password, this commit will remove the
limitation of sim/nsh login, and add sim/login configuration to ensure the feature of
NSH_CONSOLE_LOGIN is verified.
Signed-off-by: chao an <anchao@lixiang.com>
Refactoring path logic to prevent logic flaws, direntry size bug fix to allow proper direntry traversal, open free bug fix to prevent memory leak after close.
Signed-off-by: Saurav Pal <resyfer.dev@gmail.com>
- New defconfig for nsh CM4 and CM7
- New linker script for cm4
- Update linker script to include shared memory and condition for flash size
- Update Make and CMake file to compile according to core
- Added UART7 pin by default for CM4 serial output
- Changed userled configuration to fix error
Signed-off-by: Nonpawit Ekburanawat <nonpawit.ek@gmail.com>
This generalizes the in-kernel syscall approach from KERNEL mode to
all build modes so that to unify in-kernel syscall invocations. As
a result, machine mode ECALL and the supervisor folder are no longer
needed.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
unsigned_compare: This greater-than-or-equal-to-zero comparison without a signed value is always true. conn->lc_crefs >= 0
Signed-off-by: Shoukui Zhang <zhangshoukui@xiaomi.com>
This PR adds a new Build Config `rv-virt:leds64_rust` that builds the Rust App `leds_rust` for QEMU RISC-V 64-bit. The build requires the [Rust Target `riscv64gc-unknown-none-elf`](https://github.com/apache/nuttx/pull/12858):
```bash
rustup target add riscv64gc-unknown-none-elf
```
New Files:
`boards/risc-v/qemu-rv/rv-virt/configs/leds64_rust/defconfig`: Add new Build Config `rv-virt:leds64_rust`
Updated Docs:
`applications/examples/leds_rust/index.rst`: Add `leds_rust` example app
`platforms/risc-v/qemu-rv/boards/rv-virt/index.rst`: Add `rv-virt:leds64_rust` config
This commit adds missing add_link_options to specify sanitizers
also during linking stage.
Signed-off-by: Daniel Jasinski <jasinskidaniel95szcz@gmail.com>
This PR updates the Docker Image for NuttX CI, so that it builds Rust Apps correctly for QEMU RISC-V 64-bit. We add the Rust Target for `riscv64gc-unknown-none-elf` to the Docker Image.
In the next PR, we will call the Updated Docker Image to [compile the Rust App `leds_rust`](https://github.com/apache/nuttx/pull/12852), at every run of NuttX CI. This will validate whether Rust Apps are built correctly for QEMU RISC-V 64-bit.
Modified Files:
`tools/ci/docker/linux/Dockerfile`: Add Rust Target `riscv64gc-unknown-none-elf` for Docker CI
`tools/ci/platforms/ubuntu.sh`: Same as above, but for Ubuntu CI
`tools/ci/platforms/msys2.sh`: Same as above, but for MSYS2 CI
This PR fixes the build for Rust Apps and D Apps on QEMU RISC-V. Previously the Rust Build selected the [incorrect Rust Target riscv64i-unknown-none-elf](https://lupyuen.github.io/articles/rust5#rust-target-is-incorrect). Now the Rust Build selects the correct Rust Target: riscv64gc-unknown-none-elf.
This PR also fixes the 32-bit RISC-V Target for D Apps. D Targets ("riscv32") are named differently from Rust Targets ("riscv32gc"), this PR restores the correct Target Names.
Note that Rust Apps won't build correctly for QEMU RISC-V 32-bit. This requires a [Rust Custom Target for riscv32gc](https://lupyuen.github.io/articles/rust4#custom-target-for-rust), which will make the NuttX Makefiles much more complicated.
Also note that `hello_d` won't build correctly for 64-bit `rv-virt:nsh64`. To date, NuttX has never supported 64-bit RISC-V for D Apps.
Modified Files:
`tools/Rust.defs`: Rename the RISC-V ISA `imafdc` to `gc` for Rust Targets
`tools/D.defs`: Exclude the RISC-V ISA for D Targets
Set sh_addr for regions that are not allocated. Some relocations might
depend on this.
The fault in my case occurs when setting CONFIG_HAVE_CXX=y. In this case,
the .ctor and .dtor sections do not get allocated, but the crt code
depends on linker defined symbols _sctors/_ectors etc. These generate PC
relative relocations and thus, the .ctor and .dtor output sections need
an output VMA even though nothing is there. Otherwise the relocations will
point to god knows where (in my case to address 0).
The problem results in full system crash later:
elf_symvalue: Other: 00000000+00000001=00000001
up_relocateadd: PCREL_HI20 at c00002dc [00000417] to sym=0x80409e80 st_value=1
_calc_imm: offset=-3221226203: hi=-786432 lo=-731
up_relocateadd: ERROR: PCREL_HI20 at c00002dc bad:ffffffff40000000
elf_relocateadd: ERROR: Section 2 reloc 52: Relocation failed: -22
The RISC-V elf64 linker does not like the uninitialized PC relative
relocation entries, as the relocation offset cannot be reached with
with the RV64 instruction set.
More about this issue can be found here:
https://github.com/apache/nuttx/pull/11322
This commit fixes erronous assignment of lib_pwd_globals.c
previously guarded by CONFIG_LIBC_PASSWD_FILE. Original
Make.defs file has this in CSRCS scope.
Signed-off-by: Daniel Jasinski <jasinskidaniel95szcz@gmail.com>
When executing fork() via a system call, the parent's stack gets corrupted
by the child, as during exception return the child loads the parent's
stack pointer from the context save area.
This happens because the full parent stack (including what has been pushed
during the system call) is copied to the child. What should be copied, is
only the user stack of the parent (the kernel stack is not interesting).
Fix this by only copying the parent's user stack to the child; and make
the child return directly to userspace (not via dispatch_syscall).
Simplifies the implementation of dispatch_syscall, making it easier to
understand and maintain. Let the C-compiler do most of the work, instead
of doing everything as inline assembly.
This adds the necessary defines to set the USARTs' kernel clock source
selection.
This is required for a configuration where the bootloader (running
before NuttX) changes the USARTs' clock selection, so they need to be
restored on board init.
This is according to the reference manual RM0399 page 448.
Create version.h
chip/intel64_irq.c:78:34: error: conflicting type qualifiers for ‘g_irq_spin’
78 | static spinlock_t g_irq_spin;
| ^~~~~~~~~~
In file included from chip/intel64_irq.c:40:
include/nuttx/spinlock.h:168:28: note: previous declaration of ‘g_irq_spin’ with type ‘spinlock_t’ {aka ‘volatile unsigned char’}
168 | extern volatile spinlock_t g_irq_spin;
| ^~~~~~~~~~
chip/intel64_cpu.c: In function ‘x86_64_cpu_ready_set’:
chip/intel64_cpu.c:314:3: warning: implicit declaration of function ‘spin_lock’ [-Wimplicit-function-declaration]
314 | spin_lock(&g_ap_boot);
| ^~~~~~~~~
chip/intel64_cpu.c:322:3: warning: implicit declaration of function ‘spin_unlock’; did you mean ‘sched_unlock’? [-Wimplicit-function-declaration]
322 | spin_unlock(&g_ap_boot);
| ^~~~~~~~~~~
Signed-off-by: chao an <anchao@lixiang.com>
Rust/D support for RISC-V is broken after https://github.com/apache/nuttx/pull/11549,
since the target triple is quite different bewteen Rust/D toolchain and GCC,
only few RISC-V targets are supported by Rust toolchain now, so it's better to
construct target triple in Rust.defs/D.defs for RISC-V.
Add configuration and driver support for the SSD1681 1.54 inch e-paper display,
including the necessary waveforms and settings for proper operation. This extends
the existing SSD1680 e-paper driver to accommodate the new display module.
The changes involve updates to the Kconfig file for additional configuration options,
modifications to the driver implementation in ssd1680.c to include SSD1681 specific
logic, and updates to the header file ssd1680.h to reflect the added support.
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
