Commit Graph

12 Commits

Author SHA1 Message Date
Eero Nurkkala
76c6ccc732 risc-v/mpfs: opensbi/defconfig fix RAM start address
RAM is expected to start from 0x08000000, not from
0x80000000 in this case. DDR starts from 0x80000000.

Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2022-01-14 10:10:24 +01:00
Jukka Laitinen
6f413c8654 board icicle/opensbi: Reduce image size slightly
Drop somme fancy nsh features

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-12-30 11:49:00 +08:00
Jukka Laitinen
3beecbe905 risc-v/mpfs: Add MSSIO GPIO pinmap configuration
Add a pinmap header for mpfs to be able to configure MSSIO GPIOs
This also adds Kconfigs for some different chip/package types of the PolarFire SOC

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-12-30 11:49:00 +08:00
Huang Qi
c2e8c92b25 arch/risc-v: Refine Toolchain.defs
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2021-12-28 00:30:10 -06:00
ligd
412d030149 boards: move USERMAIN_XX out of INIT_ENTRYPOINT
Signed-off-by: ligd <liguiding1@xiaomi.com>
2021-12-24 08:23:30 -06:00
Eero Nurkkala
b128ce334f mpfs: introduce OpenSBI
OpenSBI may be compiled as an external library. OpenSBI commit d249d65
(Dec. 11, 2021) needs to be reverted as it causes memcpy / memcmp to
end up in the wrong section. That issue has yet no known workaround.

OpenSBI may be lauched from the hart0 (e51). It will start the U-Boot
and eventually the Linux kernel on harts 1-4.

OpenSBI, once initialized properly, will trap and handle illegal
instructions (for example, CSR time) and unaligned address accesses
among other things.

Due to size size limitations for the mpfs eNVM area where the NuttX
is located, we actually set up the OpenSBI on its own section which
is in the bottom of the DDR memory. Special care must be taken so that
the kernel doesn't override the OpenSBI. For example, the Linux device
tree may reserve some space from the beginning:

  opensbi_reserved: opensbi@80000000 {
      reg = <0x80000000 0x200000>;
      label = "opensbi-reserved";
  };

The resulting nuttx.bin file is very large, but objcopy is used to
create the final binary images for the regions (eNVM and DDR) using
the nuttx elf file.

Co-authored-by: Petro Karashchenko <petro.karashchenko@gmail.com>
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-12-22 20:48:12 -06:00
Jukka Laitinen
ac5a228d89 boards/risc-v/mpfs: Enable CONFIG_SPI_CS_CONTROL
Enable CS control via register write for the mpfs hwtest target

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-11-24 06:50:32 -06:00
Janne Rosberg
e022ea1283 mpfs/icicle/configs/hwtest: enable SD card 2021-09-18 12:18:09 -03:00
Janne Rosberg
d361a9ded8 boards/icicle: add hwtest config
This config enables all peripherals and some tools.
Also useful for CI build check.
2021-09-11 23:33:01 +08:00
Xiang Xiao
5025fbef8d Rename LIB_ to LIBC_ for all libc Kconfig
follow other libc component naming convention

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-08-05 19:45:24 +02:00
Jiuzhu Dong
85470176e7 sched/task: delete CONFIG_MAX_TASKS limit
Change-Id: I583015a95dbcebd352f81ecb3104ffdbd646a9ec
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-07-11 19:42:30 -07:00
Janne Rosberg
d6205642ab add support for PolarFire SoC and icicle board
Co-authored-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-05-24 22:55:44 -05:00