Commit Graph

6223 Commits

Author SHA1 Message Date
Bowen Wang
76572f9892 rpmsg/rpmsg_port_uart: add rpmsg uart port driver
Rpmsg Port Uart is a new rpmsg transport layer.
Just like the rpmsg port spi, the difference is that the physical
communication method changed from SPI to UART.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-17 01:55:51 +08:00
liaoao
4827063958 rpmsg_port_spi: add spi slave support
The rpmsg port spi slave version support

Signed-off-by: liaoao <liaoao@xiaomi.com>
2024-09-17 01:55:51 +08:00
liaoao
89ce5d5e02 rpmsg_port_spi: add get_local_cpuname api
add get_local_cpuname ops for rpmsg_port_spi

Signed-off-by: liaoao <liaoao@xiaomi.com>
2024-09-17 01:55:51 +08:00
liaoao
6a6fc8d883 rpmsg_port_spi:init cs gpio to be low
Transfer will be failure when the cs gpio status is low before
the first transfer.

Signed-off-by: liaoao <liaoao@xiaomi.com>
2024-09-17 01:55:51 +08:00
yintao
6e55812e59 drivers/rpmsg: Add get_local_cpuname in router
get_local_cpuname ops support for rpmsg router

Signed-off-by: yintao <yintao@xiaomi.com>
2024-09-17 01:55:51 +08:00
liaoao
4a356f6f6d rpmsg_port_spi: do not decrease when rx avail is already 0
Bug fix about the rpmsg port spi

Signed-off-by: liaoao <liaoao@xiaomi.com>
2024-09-17 01:55:51 +08:00
yintao
3fb39c6fc9 drivers/rpmsg: Use optimal rx size and tx size
Use the minimal tx and rx size form two edge cpu to maintain
the transmit buffer size not exceed the edge cpus' buffer size.

[edg0] tx <---> rx0 [hub] rx1 <---> tx [edge1]
       rx <---> tx0       tx1 <---> rx

edge0_tx = min(rx0, tx1);
edge0_rx = min(tx0, rx1);

edge1_tx = min(rx1, tx0);
edge1_rx = min(tx1, rx0);

Signed-off-by: yintao <yintao@xiaomi.com>
2024-09-17 01:55:51 +08:00
Bowen Wang
ab47465dd5 drivers/rpmsg: add get_local_cpuname to rpmsg ops
Add get_local_cpuname to the rpmsg framework ops to support communicate
with the same remote core with multi rpmsg transport.

Some rpmsg services will send local cpu name to remote core and then let
remote core to connect local core by using this cpu name, when there are
multi rpmsg channels with same remote core, the remote core may connect
to incorrect core, so use the error rpmsg channel.

For example, there are two rpmsg channels between ap and audio:

ap core                     audio core
 [ap1] <-- rpmsg virtio1 --> [audio1]
 [ap2] <-- rpmsg virtio2 --> [audio2]

When we want to use the rpmsg virtio1 to communicate, ap core may send
local cpuname "ap2" to audio, so the audio core use remote cpu "ap2" to
connect with ap, and resulting in the use of incorrect rpmsg channel.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-17 01:55:51 +08:00
yintao
7bc7369102 drivers/rpmsg: Use tx buffer size as payload length
Directly use tx length received from hub as the tx payload length.

Signed-off-by: yintao <yintao@xiaomi.com>
2024-09-17 01:55:51 +08:00
yintao
7c933874e8 drivers/rpmsg: add rpmsg router support
Rpmsg Router is new rpmsg transport layer, it can router the rpmsg
messages to a cpu that not directly connected with local cpu by Rpmsg,
For the rpmsg services, it is as if there is a real Rpmsg Channel between
the local cpu and the remote cpu.

For examples, there are three cpus: ap, cp and audio.
ap and cp, ap and audio has share memory and be connected by Rpmsg VirtIO,
so ap and cp, ap and audio can communicate with each other by Rpmsg, but
cp can not communicate with audio direclty.

[cp] <-- rpmsg virtio --> [ap] <-- rpmsg virtio --> [audio]

With rpmsg router, the cp can communicate with audip by Rpmsg dereclty because
the router in ap will forward the rpmsg message from cp/audio to audio/cp, like
this:

 +<----- rpmsg router --> hub  <-- rpmsg router ------>+
 |                         |                           |
[cp] <-- rpmsg virtio --> [ap] <-- rpmsg virtio --> [audio]

Signed-off-by: yintao <yintao@xiaomi.com>
2024-09-17 01:55:51 +08:00
Bowen Wang
a662c7aab3 rpmsg/rpmsg_port: judge notify_rx_free and notify_tx_ready before calling
Some lower layers do not need implement these two operations, so judge
them before calling.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-17 01:55:51 +08:00
Bowen Wang
d27a9c516f rpmsg/Kconfig: move RPMSG_PORT outside RPMSG and select RPMSG direclty
All the RPMSG transport should direcly select the RPMSG like RPMSG_VIRTIO
does.

Signed-off-by: Bowen Wang <wangbowen6@xiaomi.com>
2024-09-17 01:55:51 +08:00
liaoao
f7939a8081 rpmsg_port_spi: add spi transport layer
Add Rpmsg-Port-SPI transport layer.
Rpmsg Port SPI is a new rpmsg transport layer based on the Rpmsg Port,
it provides the capability for two SPI-connected (and two extra GPIO)
chips to communicate with each other using Rpmsg.

All already implemented Rpmsg Services can be used with this new transport
layer without any modifications.

Signed-off-by: liaoao <liaoao@xiaomi.com>
2024-09-17 01:55:51 +08:00
liaoao
dd66a6b203 rpmsg_port:reduce len and avail of rpmsg_port_header_s to uint16_t
uint16_t is enough and more suitable

Signed-off-by: liaoao <liaoao@xiaomi.com>
2024-09-17 01:55:51 +08:00
liaoao
3d6abb1d86 rpmsg_port:add rpmsg_port_queue_nused api
Add nused api for lower layer to get the used buffer number

Signed-off-by: liaoao <liaoao@xiaomi.com>
2024-09-17 01:55:51 +08:00
liaoao
6d604ec487 rpmsg: add physical transport layer support
Rpmsg Physical Transport Layer is a new rpmsg transport, it's a
common part for the physical communication based rpmsg transport
layers such as Rpmsg-SPI and Rpmsg-Uart.

It implements three common parts:
1. Implement the NuttX and OpenAMP rpmsg frameworks' ops and the
rpmsg name service;
2. The buffer management and provide some APIs to lower layer to use;

Signed-off-by: liaoao <liaoao@xiaomi.com>
2024-09-17 01:55:51 +08:00
p-szafonimateusz
1e212981b9 drivers/net: add support for Intel I225 network card
add support for Intel I225 network card

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-17 01:42:38 +08:00
p-szafonimateusz
bc0c7b0db3 drivers/net: add Intel e1000 network card support
add Intel e1000 network card support

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-17 01:42:38 +08:00
p-szafonimateusz
8723aa7125 drivers: fix gcc14 errors for virtio
fix gcc14 errors for virtio

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-16 11:25:40 -03:00
dongjiuzhu1
a9bc198bc3 composite.c warning
usbdev/composite.c:649:36: warning: implicit declaration of function 'board_usbdev_pid' [-Wimplicit-function-declaration]
649 | uint16_t pid = board_usbdev_pid(); usbdev/composite.c:650:36: warning: implicit declaration of function 'board_usbdev_vid'
[-Wimplicit-function-declaration] 650 | uint16_t vid = board_usbdev_vid();

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-09-16 10:33:01 +08:00
dongjiuzhu1
e0d82fdf3a drivers/usedev: remove unnecessary mdelay because remain req info had beed push to serial buffer
this mdelay causes cpu busy wait, affects other process running.

Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-09-16 10:33:01 +08:00
dongjiuzhu1
1a69d3c6ee cdcacm: Add cdcacm bulkout request buffer config
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-09-16 10:33:01 +08:00
wanggang26
702068e62c ftl: should pre-allocate eblock for car case
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2024-09-16 10:25:36 +08:00
dongjiuzhu1
97d684847b drivers/reset: support rpmsg reset
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-09-15 20:21:41 +08:00
Masayuki Ishikawa
df298c186f Revert "build depend:Revert Make.dep intermediate ddc file"
This reverts commit ddc3119c4e.
2024-09-15 19:29:47 +08:00
liwenxiang1
868b17bc5a misc/goldfish: Compatible with x86_64 goldfish pipe
x86_64 uses 4-5G virtual addresses, we need to convert them into physical addresses and pass them to qemu, otherwise qemu will fail to map

Signed-off-by: liwenxiang1 <liwenxiang1@xiaomi.com>
2024-09-15 19:28:55 +08:00
Xiang Xiao
908cd1b10a misc/goldfish_pipe: Refine the implementation
1.Merge goldfish_pipe_qemu.h into goldfish_pipe.c
2.Change all enum to macro

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2024-09-15 19:28:55 +08:00
yangguangcai
12ecfe365f driver/goldfish_pipe:remove pipe interrupt task delay.
Signed-off-by: yangguangcai <yangguangcai@xiaomi.com>
2024-09-15 19:28:55 +08:00
zhanghu5
9642d8dae6 fix goldfish_pipe poll error
when multiple processes call poll and a event occured,
all the processes are waked up. it should wake up one
process based on pipe->id

Signed-off-by: zhanghu5 <zhanghu5@xiaomi.com>
2024-09-15 19:28:55 +08:00
Shanmin Zhang
e793a741cc goldfish_pipe: Fix pointer-to-int-cast warning
Signed-off-by: Shanmin Zhang <zhangshanmin@xiaomi.com>
2024-09-15 19:28:55 +08:00
rongyichang
69af7eef54 drivers/goldfish_pipe: notify poll event in interrupt task
Signed-off-by: rongyichang <rongyichang@xiaomi.com>
2024-09-15 19:28:55 +08:00
zhanghu5
3fd404a4c5 fds pointer not initialized cause dereference error
Signed-off-by: zhanghu5 <zhanghu5@xiaomi.com>
2024-09-15 19:28:55 +08:00
rongyichang
ce6382cc0c drivers/misc: enable irq for goldfish pipe
Signed-off-by: rongyichang <rongyichang@xiaomi.com>
2024-09-15 19:28:55 +08:00
zhanghu5
2ce2844480 drivers/misc: support nuttx goldfish_pipe
Signed-off-by: zhanghu5 <zhanghu5@xiaomi.com>
2024-09-15 19:28:55 +08:00
dongjiuzhu1
1bad603fe7 drivers/gpio: save memory if dont support signal
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-09-15 11:29:55 +08:00
dongjiuzhu1
28815fb7c5 drivers/gpio: add poll function for gpio device
Signed-off-by: dongjiuzhu1 <dongjiuzhu1@xiaomi.com>
2024-09-15 11:29:55 +08:00
xuxin19
ec99359812 cmake:add mtd driver dhara cmake build
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-09-15 10:29:21 +08:00
xuxin19
a3e7fee595 cmake:add missing libc regex CMake support
Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-09-15 10:29:21 +08:00
wangjianyu3
1af4cdf500 driver/ftl: Read the consecutive eraseblocks
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-15 10:21:45 +08:00
wangjianyu3
a6080e4502 Revert "driver/ftl: Read the current eraseblock only"
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-15 10:21:45 +08:00
wangjianyu3
c40f9b8d9f driver/ftl: Read the current eraseblock only
case: The next eraseblock is bad

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-15 10:21:45 +08:00
wangjianyu3
b2221806cb rpmsgdev_server: Support oneway polling
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-15 10:18:08 +08:00
wangjianyu3
f2ca3753dd rpmsgdev_server: Support exporting devices
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-15 10:18:08 +08:00
xuxin19
ddc3119c4e build depend:Revert Make.dep intermediate ddc file
Revert "Parallelize depend file generation"
This reverts commit d5b6ec450f.

parallel depend ddc does not significantly speed up compilation,
intermediately generated .ddc files can cause problems if compilation is interrupted unexpectedly

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2024-09-15 10:01:58 +08:00
wangjianyu3
6013591cb1 dev_mem: Fix config judgment
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-15 09:58:55 +08:00
wangjianyu3
3c0befbdbd dev_mem: Add config for segment regions
Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-15 09:58:55 +08:00
wangjianyu3
9553506b1f dev_mem: Fix range and pos of region
Test:
  fastboot oem filedump /dev/mem 0 748544
  fastboot get_staged mem1.txt
  fastboot oem memdump 0x44000000 0xb6c00
  fastboot get_staged mem2.txt
  diff mem1.txt mem2.txt

Signed-off-by: wangjianyu3 <wangjianyu3@xiaomi.com>
2024-09-15 09:58:55 +08:00
p-szafonimateusz
51909ed59f drivers: fix gcc14 errors for PCI
fix gcc14 errors for PCI

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-15 03:37:58 +08:00
p-szafonimateusz
8ab0785d71 drivers: add UART 16550 compatible PCI device support
add support for UART 16550 compatible PCI device.
For now we support qemu serial PCI devices and AX99100 based cards.

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-15 03:37:58 +08:00
p-szafonimateusz
ceb2921d79 drivers: prepare 16550 UART driver to support PCI
prepare 16550 UART driver to support PCI:

- [breaking change] change argument of uart_ioctl() from `struct file *filep` to `FAR struct u16550_s *priv`
  Also fix moxart_16550.c build related to this change

- [breaking change] change argument of uart_getreg() and uart_putreg from `uart_addrwidth_t base` to `FAR struct u16550_s *priv`
  Also fix arch/x86/src/qemu/qemu_serial.c and arch/x86_64/src/intel64/intel64_serial.c related to this change

- [breaking change] change argument of uart_dmachan() from `uart_addrwidth_t base` to `FAR struct u16550_s *priv`

- move `struct u16550_s` to public header

- generalize UART_XXX_OFFSET so we can use it with any register increment

- make u16550_bind(), u16550_interrupt(), u16550_interrupt() public

- remove arch/or1k/src/common/or1k_uart.c and use common 16550 MIMO interfacve

- change irq type in `struct u16550_s` from uint8_t to int to match MSI API

Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
2024-09-15 03:37:58 +08:00