5 Commits

Author	SHA1	Message	Date
Dave Marples	d0cda60442	In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts.	2018-12-03 17:41:59 -06:00
Masayuki Ishikawa	97ca4ef956	Merged in masayuki2009/nuttx.nuttx/change_copyright (pull request #621) ... Change all Sony related copyright to conform with our company's internal rules. Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com> Approved-by: Gregory Nutt <gnutt@nuttx.org>	2018-04-04 12:35:47 +00:00
Gregory Nutt	42b3ee4cfc	Fix a few errors that crept in with my review changes.	2017-08-02 09:19:29 -06:00
Gregory Nutt	5f2d4b8f84	Changes from review of commit e851a24329	2017-08-02 08:26:08 -06:00
Masayuki Ishikawa	e851a24329	arch/arm/src/lc823450: Initial support for ON Semiconductor LC823450 ... Signed-off-by: Masayuki Ishikawa <Masayuki.Ishikawa@jp.sony.com>	2017-08-02 21:09:43 +09:00