This reverts both 2afdcfb6a6 and 0a0af89de9 to restore the 128K kflash
design as the implementation depends on that to work, checked with:
```
$ qemu-system-arm -M lm3s6965evb -nographic -device \
loader,file=nuttx.bin,addr=0x0 -device \
loader,file=nuttx_user.bin,addr=0x2000
```
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This renames a few RV32 configs to follow the convention that names w/o
numbers are for RV32, so that to be in line with majority RV32 configs.
As a result, we have: `nsh` vs `nsh64`, `knsh` vs `knsh64`, `pnsh`
vs `pnsh64`,`flats` vs `flats64`, `nsbi` vs `nsbi64`, `libcxx` vs
`libcxx64` etc. This helps us pick the right config name w/o checking
file contents.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This adjusts memory.ld to unblock CI issue: `nuttx_user.elf
section '.text' will not fit in region 'uflash'`
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
Most developers start learning Nuttx from sim/nsh, but the login experience is very bad,
they don't know where to get the username and password, this commit will remove the
limitation of sim/nsh login, and add sim/login configuration to ensure the feature of
NSH_CONSOLE_LOGIN is verified.
Signed-off-by: chao an <anchao@lixiang.com>
- New defconfig for nsh CM4 and CM7
- New linker script for cm4
- Update linker script to include shared memory and condition for flash size
- Update Make and CMake file to compile according to core
- Added UART7 pin by default for CM4 serial output
- Changed userled configuration to fix error
Signed-off-by: Nonpawit Ekburanawat <nonpawit.ek@gmail.com>
This PR adds a new Build Config `rv-virt:leds64_rust` that builds the Rust App `leds_rust` for QEMU RISC-V 64-bit. The build requires the [Rust Target `riscv64gc-unknown-none-elf`](https://github.com/apache/nuttx/pull/12858):
```bash
rustup target add riscv64gc-unknown-none-elf
```
New Files:
`boards/risc-v/qemu-rv/rv-virt/configs/leds64_rust/defconfig`: Add new Build Config `rv-virt:leds64_rust`
Updated Docs:
`applications/examples/leds_rust/index.rst`: Add `leds_rust` example app
`platforms/risc-v/qemu-rv/boards/rv-virt/index.rst`: Add `rv-virt:leds64_rust` config
This revises PROTECTED build for qemu-rv mainly to avoid hard-coded
addresses in linker scripts. It also added rv32 support, cleaned up
config `pnsh64` and added config `pnsh`.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This adds NuttSBI support for rv-virt device so that to enable CI
checks for NuttSBI later. It allows using `-bios nuttx` option to
run NuttX with QEMU v6.2 w/o OpenSBI.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
HPET can be used as system clock for x86_64
to set HPET as system clock you have to enable:
CONFIG_ONESHOT=y
CONFIG_ALARM_ARCH=y
CONFIG_INTEL64_ONESHOT=y
CONFIG_ARCH_INTEL64_HPET_ALARM=y
Signed-off-by: p-szafonimateusz <p-szafonimateusz@xiaomi.com>
The ESP32-S3-Korvo-2 is a multimedia development board based on the
ESP32-S3 chip. It is equipped with a two-microphone array which is
suitable for voice recognition and near/far-field voice wake-up
applications. The board integrates multiple peripherals such as
LCD, camera, and microSD card. It also supports JPEG video stream
processing. With all of its outstanding features, the board is an
ideal choice for the development of low-cost and low-power
network-connected audio and video products.
Provide `up_copy_section` function that enables copying data using
the data bus. If the memory destination address is accessible
through the instruction bus, the data is copied using the
correspondent address accessible through the data bus.
The buffer initialization function (`i2s_buf_initialize`) calls
`i2s_buf_free`, which performs buffer initialization within a
critical section (`spin_lock_irqsave`). If this function is called
under the same critical section (same spinlock), initialization
will hang.
This change implements a driver for the two watchdog timers on the BL808, and enables it as part of the timer config. The driver is based on the GP timer driver.
arch/xtensa: add support for capture driver on ESP32 and ESP32|S3|
Squashed:
Initial settings for MCPWM Capture on board level
Created lower half files - compilation ok
Using capture debug features. Simple example on fops works
Successful duty and freq calculation
Documentation update
Fixed and added interupt capabilities for all 3 capture channels
Cleaned defconfig
Renamed macros, added S3 options and moved arch source to common dir
Added support for ESP32S3
Added capture example to defconfig and renamed
Basic bring up ready. New Kconfig options for motor.
Good motor registration
Working on enabling pwm generators
Working on enabling pwm generators
Added fops functions
Success on PWM 50%
stable pwm operation for bdc
Added loopback option for testing
Improved rules on fsm
Working motor direction control
Testing new ISR for fault handling
Issues on fault ISR
Removed fault implementation (not working)
Added support for esp32s3
Documentation improvements
Added default motor spin direction
Added parameter change while running
Review fixes
arch/xtensa: add support for fault signal on motor control
Squashed:
Initial settings for MCPWM Capture on board level
Created lower half files - compilation ok
Using capture debug features. Simple example on fops works
Successful duty and freq calculation
Documentation update
Fixed and added interupt capabilities for all 3 capture channels
Cleaned defconfig
Renamed macros, added S3 options and moved arch source to common dir
Added support for ESP32S3
Added capture example to defconfig and renamed
Basic bring up ready. New Kconfig options for motor.
Good motor registration
Working on enabling pwm generators
Working on enabling pwm generators
Added fops functions
Success on PWM 50%
stable pwm operation for bdc
Added loopback option for testing
Improved rules on fsm
Working motor direction control
Testing new ISR for fault handling
Issues on fault ISR
Removed fault implementation (not working)
Added support for esp32s3
Documentation improvements
Added default motor spin direction
Added parameter change while running
Got responsive fault indicator
Working brakes - still need to work on starting isr
Fixed single-time ISR initializiation
Working soft brake on fault
Improved KConfig for BDC and BLDC
Kconfig fixed at board level
nucleo-f4229zi board does not come with external ram.
Looking at netnsh config, these changes are also not present.
Issue found when registering i2c char driver for i2ctool. zalloc
returned -ENOMEM
This revises FLAT build ld.script so that to use CONFIG_RAM_START
instead of hard coded address to increase flexibility.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
This allows virtio devices to be probed upon board_early_init, thus
making virito-serial ready earlier for console use.
Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>
- This PR adds the LED Driver for QEMU RISC-V 32-bit and 64-bit (User LEDs and Auto LEDs)
- QEMU RISC-V LED Driver will be used by the Rust Blinky App for Google Summer of Code
- Blinking the LED is probably the most common Embedded Demo, and now it's supported by QEMU RISC-V
- We added NuttX Configs `rv-virt:leds` and `rv-virt:leds64` to support User LEDs for 32-bit and 64-bit RISC-V
- Turning on/off a Simulated User LED will print a log message: "LED 1 set to 1"
- The code is derived from NuttX PinePhone LED Driver
This driver implements `read`, `write`, `open`, `close` and `ioctl`
interfaces to the SHT4X temperature and humidity sensor on an I2C bus.
The read implementation is that of a character driver for easy
debugging, while `ioctl` provides an interface to the sensor's raw data
collection and heating functionality.
