When unwind instruction is 0xb2,the subsequent instructions
are uleb128 bytes.
For now,it uses only the first uleb128 byte in code.
For vsp increments of 0x204~0x400,use one uleb128 byte like below:
0xc06a00e4 <unwind_test_work>: 0x80b27fac
Compact model index: 0
0xb2 0x7f vsp = vsp + 1024
0xac pop {r4, r5, r6, r7, r8, r14}
For vsp increments larger than 0x400,use two uleb128 bytes like below:
0xc06a00e4 <unwind_test_work>: @0xc0cc9e0c
Compact model index: 1
0xb2 0x81 0x01 vsp = vsp + 1032
0xac pop {r4, r5, r6, r7, r8, r14}
The unwind works well since the decoded uleb128 byte is also 0x81.
For vsp increments larger than 0x600,use two uleb128 bytes like below:
0xc06a00e4 <unwind_test_work>: @0xc0cc9e0c
Compact model index: 1
0xb2 0x81 0x02 vsp = vsp + 1544
0xac pop {r4, r5, r6, r7, r8, r14}
In this case,the decoded uleb128 result is 0x101(vsp=0x204+(0x101<<2)).
While the uleb128 used in code is 0x81(vsp=0x204+(0x81<<2)).
The unwind aborts at this frame since it gets incorrect vsp.
To fix this, add uleb128 decode to cover all the above case.
Signed-off-by: chao an <anchao@xiaomi.com>
Summary
include/arch/syscall.h: Assembler messages:
include/arch/syscall.h:133: Error: bad instruction `struct arm_smccc_res'
include/arch/syscall.h:134: Error: junk at end of line, first unrecognized character is `{'
include/arch/syscall.h:135: Error: bad instruction `unsigned long a0'
include/arch/syscall.h:136: Error: bad instruction `unsigned long a1'
include/arch/syscall.h:137: Error: bad instruction `unsigned long a2'
include/arch/syscall.h:138: Error: bad instruction `unsigned long a3'
include/arch/syscall.h:139: Error: bad instruction `unsigned long a4'
include/arch/syscall.h:140: Error: bad instruction `unsigned long a5'
include/arch/syscall.h:141: Error: bad instruction `unsigned long a6'
include/arch/syscall.h:142: Error: bad instruction `unsigned long a7'
include/arch/syscall.h:143: Error: junk at end of line, first unrecognized character is `}'
include/arch/syscall.h:145: Error: bad instruction `typedef struct arm_smccc_res
Signed-off-by: wangming9 <wangming9@xiaomi.com>
- There are occasional extra STOPs being sent due to an IP bug when using an
FPGA based I2C. Add a flag "inflight" to mask out extra STOP interrupts when
using the FPGA based implementation
- There are no MPFS_I2C_ST_STOP_SENT irq's "initally". It is just already
either success or still in progress
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
The framebuffer of the emulator is a single buffer mode, and the pan_display method is not implemented, so as long as the fb device is created and poll notify once, the fb can be kept in a writable state.
Signed-off-by: pengyiqiang <pengyiqiang@xiaomi.com>
The typo s/.timid/.tcid prevents to compile NuttX with
quadrature encoder configured for timer1 (CONFIG_SAMV7_TC1_QE)
and s/SAM_TC789_BASE/SAM_TC678_BASE prevented use of the
of the timer 2.
Signed-off-by: Pavel Pisa <ppisa@pikron.com>
In an implementation that supports the ARM Security Extensions, only
software executing in a Secure PL1 mode can write to CNTFRQ
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Summary:
Adding virtual evaluate platform GoldFish. Which is based on
Android Goldfish Emulator, it's a ARM virt board but Android
enhance it with more featue.
The patch set goldfish as a arm chip.
Signed-off-by: wangming9 <wangming9@xiaomi.com>
In an implementation that supports the ARM Security Extensions, only
software executing in a Secure PL1 mode can write to CNTFRQ
Signed-off-by: hujun5 <hujun5@xiaomi.com>
This adds initialization of the ksz9477 switch when used instead of
a PHY, directly connected to SGMII
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
This change fixes the issue when SAMv7 GMAC sometimes does not start packet
transmission. The issue is that EMAC_NCR_TSTART is written to EMAC_NCR register
while tx descriptor is not delivered to memory.
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
According to the current implementation, "cxd56_cpu1siguninit" will only
be called once during the NuttX startup phase,
and it won't involve scenarios of multi-threaded concurrent access.
Signed-off-by: hujun5 <hujun5@xiaomi.com>
Some SD card connectors do not have separate card detection pin. In that
case card detection has to be done on CD/DAT3 data line. This means
software (i.e. architecture level driver) has to take care of pin
configuration switching (pin has to be set as data pin in case of
transfer and as interrupt card detection pin when there is no action
on data line).
This commit adds CD/DAT3 line card detection support for SAMv7 MCU.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
Add a function to read PolarFire's serial number from system controller, and use the first five digits as device's mac address
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
Workaround to avoid deadlock situation: The RX shall not try to wait for complete
frame in case there is RX errors detected.
In case mpfs_receive is called, it keeps waiting for complete frame and
also keeps the net_lock locked. In the mean while, the TX may run out of free
descriptors, but can not get net_lock mutex lock to be able to release used
descriptors. If there are no free TX descs it disables RX interrupts because
it may require to send response to the received frame.
So, TX side keeps RX interrupts disabled due to lack of free descriptors and
RX blocks TX to release those descs by stubbornly waiting for complete frame.
