Port AES and RND to STM32 M0 + some improvements
arch/arm/src/stm32f0l0/stm32_rng.c: change the function names to use the stm32_rng prefix
arch/arm/src/stm32f0l0/stm32_usbdev.c: move HSI48 enable to stm32xx_rcc.c
arch/arm/src/stm32f0l0: add support for AES
arch/arm/src/stm32f0l0: add support for RND
arch/arm/src/stm32f0l0: add HSI48 support for L0
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Port STM32F7 I2C to STM32F3 and STM32F0L0
arch/arm/src/stm32: port I2C IPv2 driver from F7 (only F3 chips)
arch/arm/src/stm32f0l0: port I2C IPv2 driver from F7
configs/b-l072z-lrwan1: nxlines_oled example (ssd1306)
configs/b-l072z-lrwan1: support for the I2C tool
configs/nucleo-f303ze: nxlines_oled example (ssd1306)
arch/arm/src/stm32h7/chip.h: cosmetics
arch/arm/src/stm32/chip/stm32_tim.h: cosmetics
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Initial ADC support and some improvemnets for the STM32 M0
arch/arm/src/stm32f0l0/Kconfig: improvements
configs/b-l072z-lrwan1: add ADC example
Approved-by: Gregory Nutt <gnutt@nuttx.org>
Master
arch/arm/src/stm32f0l0: SPI support for F0
arch/arm/src/stm32f0l0/Kconfig: L0 parts should select STM32F0L0_STM32L0
arch/arm/src/stm32f0l0/hardware: unify names for ADC/DAC/DMA/CAN
drivers/wireless/lpwan/sx127x/sx127x.c: return immediately when ISR0 is called but sx127x is not initialized
configs/nucleo-f091rc: support for sx127x
configs/nucleo-l073rz: cosmetics
configs/b-l072z-lrwan1/include/board.h: use HSI as default clock source and fix typo in SPI1 pins
Approved-by: GregoryN <gnutt@nuttx.org>
stm32f0l0: SPI and GPIO EXTI support
arch/arm/src/stm32f0l0: add support for GPIO EXTI
configs/nucleo-l073rz: support for nrf24l01
configs/b-l072z-lrwan1/include/board.h: add note about onboard Murata CMWX1ZZABZ-09 module and definitions for available peripherals
Approved-by: GregoryN <gnutt@nuttx.org>
Squashed commit of the following:
arch/arm/src/stm32f0l0: Various changes for a clean compilation. Still does not compile correctly due to missing FLASH latency definitions.
arch/arm/src/stm32f0l0/hardware: Add framework for the STM32 L0. Currently set to same as the STM32F0.
arch/arm/src/stm32f0l0/hardware: Very fragmentary FLASH header register definitions for the STM32 L0.
arch/arm/src/stm32f0l0: Bring in DMA v1. Cannot possibly be functionaly yet due to the limited number for M0 interrupts.
arch/arm/src/stm32f0l0: Add STM32 F0/L0 LSE and backup power domain controls.
arch/arm/src/stm32f0l0/hardware/stm32l0_pwr.h: Add STM32L0 PWR header file.
arch/arm/include/stm32f0l0/chip.h: Clean up WIP chip header file.
arch/arm/include/stm32f0l0/chip.h: WIP.
arm/src/stm32f0l0: Resolve some small differences between F0 and L0 GPIO pin options.
arch/arm/src/stm32f0l0: Better integrate STM32L0 header files.
nuttx/arch/arm/include/stm32f0l0: Add STM32L0 IRQ number definition file.
arch/arm/src/stm32f0l0: Add STM32L0 RCC driver.
arch/arm/src/stm32f0l0/hardware: Adds basic STM32L0 header files.
arch/arm/src/stm32f0l0: Add STM32L0 chip selections.
configs/: Hook new STM32L0 boards into the configuration system.
configs: nucleo boards use as default ST LINK MCO as clock input from MCU and for this HSEBYP must be enabled
configs: add basic support for nucleo-l073rz
configs: add basic support for b-l072z-lrwan1
