Dave Marples
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d0cda60442
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In the current implementation we only use very high priority interrupts (levels 0, 0x10 and 0x20 in CORTEX-M speak) but that means there are loads of lower priority ones that are effectively unused. I have *not* changed the semantics of these levels but have 'shifted' them to be based around the midpoint of the available interrupts (0x80) rather than at the top end....that allows for interrupts to be defined above (or, indeed, below) them as needed by the application. This should have no functional effect on existing code but adds in a clean capability to define higher priority interrupts.
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2018-12-03 17:41:59 -06:00 |
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Gregory Nutt
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83bc1c97c3
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Rename irqsave() and irqrestore() to up_irq_save() and up_irq_restore()
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2016-02-14 16:11:25 -06:00 |
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Gregory Nutt
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9051ffd638
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STM32GG Starter Kit: Add basic NSH configuration
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2014-11-03 16:58:22 -06:00 |
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Gregory Nutt
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2bafdf3d59
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Add EFM32 interrupt vector defintions
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2014-10-17 10:34:39 -06:00 |
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Gregory Nutt
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895cfe0e7c
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Add configuration support for the EFM32 Gecko Starter Kit
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2014-10-17 09:25:52 -06:00 |
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Gregory Nutt
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26b7316609
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Remove support for EFM32. Not ready to be fielded
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2014-01-27 08:03:39 -06:00 |
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Gregory Nutt
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07d12a800d
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Basic support for the EFM32 processor family from Richar Cochran
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2014-01-23 07:56:10 -06:00 |
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