zhuyanlin
cf1a04d0a2
xtensa:cache: add lock & unlock feature
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Since some xtensa cores cache support lock & unlock feature.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-10-22 13:31:32 -03:00
zhuyanlin
b4ea11f7b1
arch:cache: add lock feature for cache
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Some architectures support lock & unlock cache feature.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-10-22 13:31:32 -03:00
David Sidrane
90cfa6f313
imxrt:syslog is dependant on arm_lowputc
2021-10-22 10:07:20 -05:00
oreh-a
3c1ac89557
Fixed line length
2021-10-22 09:03:14 -05:00
Alexander Oryshchenko
ed392abb83
Added ARCH_BOARD_STM32F0G0L0_CUSTOM_CLOCKCONFIG option to stm32f0/g0/l0 chip configiuration
2021-10-22 09:03:14 -05:00
Eero Nurkkala
e57f3f7a3a
mpfs: emmcsd: provide proper internal emmc settings
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So far the SD-card functionality has been tested with
the driver. Now, also the internal eMMC has been tested
working with this patch. This patch applies IOMUX and
clock settings that have been tested working with the
internal eMMC in the Polarfire Icicle kit.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:41:08 -05:00
Eero Nurkkala
c7cf9fd9d2
mpfs: board Make.defs: add bootloader linker option
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Use the linker script used with bootloaders that start
from the eNVM.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Eero Nurkkala
ad76b6733c
mpfs: boards: add ld-envm.script
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This configuration is used when flashing nuttx as a bootloader
in the eNVM region.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Eero Nurkkala
c34b9620db
mpfs: clockconfig: add clock initialiation sequence
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Add clock initialization sequence especially for systems
containing no bootloader.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Eero Nurkkala
bc72ccdf6a
mpfs: Kconfig/Make: add DDR support flag
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This adds the proper flag for introducing the DDR
support. Also call the mpfs_ddr_init() at the
proper location.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Eero Nurkkala
3b330089d5
mpfs: ddr: add DDR training
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This adds DDR training. The training has a small chance of failing,
and then the training is restarted.
DDR training cannot be done meaningfully while the software is
in DDR. If the system is intended to run from eNVM, like a
bootloader, the linker script should be tuned to utilize the envm
region as follows:
envm (rx) : ORIGIN = 0x20220100, LENGTH = 128K - 256
l2lim (rwx) : ORIGIN = 0x08000000, LENGTH = 1024k
256 bytes are reserved for the system; The fixed block may be
installed from the 'hart-software-services' -repository:
https://github.com/polarfire-soc/hart-software-services.git
For example, the 256-byte image: hss-envm-wrapper-bm1-dummySbic.bin
may be prepended on the nuttx bootloader image in the following
manner:
cat hss-envm-wrapper-bm1-dummySbic.bin > nuttx_bootloader.bin
cat nuttx.bin >> nuttx_bootloader.bin
riscv64-unknown-elf-objcopy -I binary -O ihex --change-section-lma
*+0x20220000 nuttx_bootloader.bin flashable_image.hex
This provides an image 'flashable_image.hex' that may be flashed on
the eNVM region via Microsemi Libero tool.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
Jukka Laitinen
c5b11f42b6
mpfs_head.S: Support for booting on different harts and from eNVM
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- Fix the FPU enabling code
- If booting from eNVM, all harts start booting. With CONFIG_MPFS_BOOTLOADER,
one can allow just one hart booting and rest are stuck in wfi.
- Check that mtvec is actually updated before continuing the boot
- Create 5 IRQ stacks, one for each hart
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-10-21 22:40:26 -05:00
Jukka Laitinen
37761c293d
mpfs_head.S: Fixes for booting on different harts
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- Jump to mpfs_start with mhartid in a0 as the comment says
- Don't invalidate mmu tlb on e51 (it doesn't have mmu)
- Fix FPU initialization flags on e54 (it fires IRQ5 and crashes)
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-10-21 22:40:26 -05:00
Jukka Laitinen
e5843db282
mpfs: Add configuration flags to configure NuttX booting on single hart
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The bootloader hart also configures the needed clocks and peripherals.
Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2021-10-21 22:40:26 -05:00
Eero Nurkkala
d909b0f635
mpfs: hardware/memorymap: add more base addresses
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Add a number of missing base addresses.
Signed-off-by: Eero Nurkkala <eero.nurkkala@offcode.fi>
2021-10-21 22:40:26 -05:00
chao.an
bd7cb1aae5
sim/bluetooth: remove the WIRELESS_BLUETOOTH depends if native host is in use
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Signed-off-by: chao.an <anchao@xiaomi.com>
2021-10-21 11:24:46 -05:00
anjiahao
0aa14f832d
mq_open: add long file name check and parameter check
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Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2021-10-21 11:01:45 -03:00
Alin Jerpelea
40b467420f
author: Florian Olbrich : update licenses to Apache
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Gregory Nutt has submitted the SGA
Florian Olbrich has submitted the ICLA
as a result we can migrate the licenses to Apache.
Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
2021-10-21 10:14:11 +02:00
Kenneth Thompson
0e2a3ecdf8
drivers/can: Fix can_poll() POLLOUT calculation
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can_poll() would indicate that there is no space in the TX FIFO if there is
already one element in the FIFO.
2021-10-21 02:05:17 -05:00
Xiang Xiao
7183009400
ioexpander/gpio: Remove the hardcode 100 limitation
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it's very easy to have more than 100 GPIOs on the modern SoC
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-10-20 10:10:50 -07:00
Jiuzhu Dong
f1f0bcc521
driver/sensor: support new sensor type:ECG,PPG,Imdepance
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Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-10-20 09:55:18 -05:00
丁欣童
26fedb2770
fakesensor: transform ddmm.mmmm to dd.mmmmmm.
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Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-10-20 09:55:18 -05:00
Gustavo Henrique Nihei
2a8e7b064d
boards/esp32: Return proper error code on esp32_spiflash_init
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-20 09:54:25 -05:00
Gustavo Henrique Nihei
7368f7a2c8
xtensa/esp32: Make SPI Flash initialization common to all ESP32 boards
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-20 09:54:25 -05:00
Abdelatif Guettouche
018aa8eb8d
esp32c3_serial.c: Remove the stub implementations of the early serial
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functions as they are only called when the configuration is enabled.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-20 10:22:10 -03:00
Xiang Xiao
1efc9fbac6
sim/rptun: Trigger the callback only the sequnece number change
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-10-20 10:21:54 -03:00
zhangguoliang
12b2b7c240
fix: charger: change the operations of battery ioctl to common
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Almost all charger chip need the same oprations, which was not
appropriate only for BQ2429X. Therefore, open the operations to
all charger chips.
Signed-off-by: zhangguoliang <zhangguoliang3@xiaomi.com>
2021-10-20 09:52:21 +02:00
weizhifang
2a6673bcdd
feature: charge: modify battery_gauge code
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add temperature and current ioctl api
Signed-off-by: weizhifang <weizhifang@xiaomi.com>
2021-10-20 09:52:11 +02:00
Abdelatif Guettouche
9235d6605b
boards/esp32&esp32c3: Remove crypto accelerators' defconfigs.
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Since the tests were removed from the drivers, there is no need for
these defconfigs anymore.
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
55e8b17974
boards/risc-v/esp32c3: Remove the flash encryption test.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
c83c1071cc
esp32c3_bignum.c & esp32c3_sha.c: Fix some trivial nxstyle complaints.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
e424241d09
arch/risc-v/esp32c3: Remove the bignum test from the driver.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
91cb9dafaf
arch/risc-v/esp32c3: Remove the RSA test from the driver.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
652d77efd2
arch/risc-v/esp32c3: Remove the SHA test from the driver.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
5d1c01aea7
arch/risc-v/esp32c3: Remove the AES test from the driver.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Abdelatif Guettouche
8288a04a0b
arch/xtensa/esp32: Remove the AES test from the driver.
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Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
2021-10-19 18:41:57 -03:00
Gustavo Henrique Nihei
b99852872c
Documentation: Update "Using QEMU" section for ESP32
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Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-19 23:23:43 +02:00
Gustavo Henrique Nihei
0299e7d35d
tools/esp32: Refactor generation of QEMU-compatible image
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Use the merge_bin builtin function from esptool.py.
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
2021-10-19 23:23:43 +02:00
Xiang Xiao
970cbff638
fs/partition: Make parse_ptable_partition to partition.h
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-10-19 08:03:12 -03:00
Xiang Xiao
eb720388ca
fs/partition: Make read_partition_block callable outside ptable
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-10-19 08:03:12 -03:00
zhuyanlin
b5134565fa
arch:xtens:mpu: modify acc and memtype to uint32_t
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The uint8_t and uint16_t will overflow in MPU_ENTRY_AR marco.
Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>
2021-10-19 00:24:31 -05:00
anjiahao
9b52e4e311
littlefs:fix rmdir can remove a file
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Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2021-10-19 00:12:45 -05:00
Alexander Lunev
6bdc737f5c
bcm43xxx: supported high-speed timing mode with a clock rate up to 50MHz
2021-10-18 21:58:03 -05:00
Xiang Xiao
9e60c33d4d
binfmt: Remove umm_initialize from elf_load
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since umm_try_initialize will do it automatically
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-10-18 22:51:18 -03:00
chao.an
5ff4e33e3f
binfmt/Makefile: remove the specified prefix from target variables
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Signed-off-by: chao.an <anchao@xiaomi.com>
2021-10-19 00:35:35 +02:00
Xiang Xiao
91398e73eb
arch/xtensa/Kconfig: add quotes in source to clean warnings from setconfig
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Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2021-10-19 00:33:51 +02:00
Jari van Ewijk
177acf57c2
S32K1XX boards: Implement userled_getall function
2021-10-18 12:30:18 -07:00
Jari van Ewijk
b1d5eff52d
Userled driver: Add option to check actual pin state with getall
2021-10-18 12:30:18 -07:00
daviepeng
9a0146f15f
add include battery_ioctl.h
2021-10-18 14:14:09 -03:00
Jiuzhu Dong
7e59a6a31e
cpuload: fix crash because of the member of g_pidhash is NULL
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Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
2021-10-18 15:13:52 +02:00