boards/z80/ez80/z20x: Increase RX buffer size to 4Kb, reduce BAUD to 2400 in w25boot configuration
arch/z80/src/ez80/ez80_serial.c: Reduce Rx FIFO trigger level for eZ80F92 to 1 so that will respond more quickly to incoming data.
Kconfig files. Repartition some functionality. Bootloader support will need to be provided in logic under arch/z80/src/ez80 so the critical configuration selections were moved the Kconfig file there.
arch/z80/src/ez80/ez80_i2c.h: Rename arch/z80/src/ez80/ez80f91_i2c.h. It is sharable by both ez80f91 and ez80f92.
arch/z80/src/ez80/: Add logic to perform an additional level of interrupt redirection. This is necessary because the the interrupt handling is part of the loader FLASH-based logic. In order to share interrupts with the program loaded into RAM by the loader, another layer or redirection is required to get control to the interrupt handlers in the loaded program. See ez809f2_loader.asm and ez80f92_program.asm
boards/z80/ez80/z20x/scripts: Reduce size of the interrupt re-direction buffer from 1Kb to 512b.
The SD boot loader was not satisfactory because 1) the SD slot is on an optional board and, hence, cannot be part of a fundamental solution. And 2) it is too big.
The only storage on borard is the Winbond W25 SPI-bsed FLASH. This commit adds support for a bootload to 1) read code in HEX format from a serial port and write it to the W25 FLASH, or 2) read code in binary form from the W25 FLASH into SRAM and execute the loaded program.
boards/z80/ez80/z20x/configs: Added w25boot configuration
boards/z80/ez80/z20x/src: Add bootloader logic, w25_main.c. Add logic to manage shared SRAM memory map so that the loaded program does not clobber the bootloader memory. Add logic to recover the bootloader memory into the heap after the loaded program as started.
boards/z80/ez80/z20x/scripts: Rework scripts and configuration to support a bootloader and program build. The boolloader cannot use all of SRAM; the program must not clobber the SRAM region used by the bootloader.
The eZ80F92 interrupt controller is very different from the eZ80F91. The eZ80F91 has:
1. Four byte interrupt vectors
2. The vector base address register is 16-bit so the vector table can lie in RAM
Whereas the eZ80F92 has:
1. Two byte interrupt vectors
2. An 8-bit vector base address
This means that the vectors must lie in the first 16-bits of FLASH and there must be a "trampoline" to get to interrupt handlers outside of the first 64-Kb of FLASH.
arch/z80/src/ez80/Toolchain.defs: Correct some CFLAGS when optimization suppressed.
arch/z80/src/ez80/Kconfig arch/z80/src/ez80/ez80_emac.c: Remove configuration option for selecting EMAC RAM address. This is duplicated and possibly conflicting. The correct address for the RAM is provided in the linker command file. The RAM should be configured once and using this single definitions.
arch/z80/src/ez80/ez80_startup.asm and arch/z80/src/ez80/ez80f9*_init.asm. Move RAM and FLAH intialization out of MCU-specific logic to common start-up logic. We cannot call any functions until SRAM is initialized and the stack is properly initialized because the return address is stored on the stack. Use internal SRAM for the IDLE stack to avoid the chicken'n'egg problem.
boards/z80/ez80/z20x/configs/sdboot/sdboot.zdsproj: Discuss build environments.
arch/z80/src/ez80/Toolchain.defs: Update some CFLAGS to match CFLAGS from ZDS-II IDE. Apparently, we must say that the CPU is an eZ80F91 event when compiler for eZ80F92.
boards/z80/ez80/z20x: Update linker scripts.
