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Author SHA1 Message Date
Jiuzhu Dong
840ba09b24 driver/syslog: Add microseconds after date time 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2022-03-31 23:57:15 +08:00
wangbowen6
69e69740b5 mm_heap: heapsize align with MM_MIN_CHUNK. 
Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-03-31 19:50:25 +08:00
wangbowen6
a0bde21f0f mm/mm_heap: place alloc-bit at the LSB of node->preceeding. 
Heap always allocate the memory at least 2bytes alignment.

Signed-off-by: wangbowen6 <wangbowen6@xiaomi.com>
 2022-03-31 14:43:56 +03:00
Petro Karashchenko
44ee76dcbd arch/risc-v: fix ARCH_RV32 offset for the stub lookup table calculation 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-31 19:34:52 +08:00
Petro Karashchenko
36b0b95eb1 arch/risc-v: include csr.h indirectly through nuttx/irq.h 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-31 19:34:52 +08:00
Petro Karashchenko
5d856971db arch/risc-v: move REGLOAD/REGSTORE macro to riscv_internal.h 
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
 2022-03-31 19:34:52 +08:00
Huang Qi
264e39e121 arch/risc-v: Remove unneeded group_addrenv call which handled by riscv_doirq 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-31 19:33:08 +08:00
Huang Qi
f72ca3db5c arch/risc-v: Dont' disable/enable irq in riscv_doirq 
Since these codes added to all chips but not fully tested,
so we should changd this behavior.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-31 19:33:08 +08:00
Huang Qi
32fe25278a arch/risc-v: Merge duplicated logic by riscv_doirq 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-31 19:33:08 +08:00
Huang Qi
a6c22b722f arch/risc-v: Remove deprecated logic from riscv_doirq 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-31 19:33:08 +08:00
Huang Qi
692ffb60b4 arch/risc-v: Rename up_doirq to riscv_doirq 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-31 19:33:08 +08:00
Huang Qi
814c07c792 arch/risc-v: Store/Restore FPU register in exception_common 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-31 11:49:36 +08:00
ligd
8db038c18a ioe_rpmsg: use rptun_wait/post to resolve deadlock with usrsock 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-31 01:37:49 +08:00
Huang Qi
379639a371 arch/risc-v/mpfs: Remove duplicated riscv_restorefpu 
Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
 2022-03-30 13:15:35 +03:00
Alin Jerpelea
38030b73f8 remove DISCLAIMER-WIP 
most licenses have been converted to Apache and the non Apache
licenses have been documented.
We can assume that now it should be the time to remove DISCLAIMER-WIP

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2022-03-30 16:16:25 +08:00
ligd
86a496d6ff rptun: forward panic/reset to lowerhalf 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:00:07 +03:00
ligd
bae9a97d31 openamp: add openamp patches 
0006-openamp-fix-scenario-case.patch
0007-openamp-divide-shram-to-TX-shram-RX-shram.patch
0008-rpmsg_virtio-don-t-need-check-status-when-get_tx_pay.patch

Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:00:07 +03:00
ligd
759898c090 rptun: add ping rpmsg support 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:00:07 +03:00
ligd
a19aef4d36 rptun: enable rx interrupts for virtq 
use wait_tx_buffer method need enable rx interrupts

Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:00:07 +03:00
ligd
1c7e59eafa rptun: pm_stay when send msg & pm_relax when all tx buffer returned 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:00:07 +03:00
ligd
f0ba2f0286 rptun: add rptun dump support 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:00:07 +03:00
ligd
5599f4e24a rptun: divide shram to TX & RX 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:00:07 +03:00
ligd
be49f6b87c rptun: add rpmsg_wait/post support for recursive dispatch 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:00:07 +03:00
ligd
7471d096cc rptun: add rptun_panic for both master & salve 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:00:07 +03:00
ligd
c9404e2705 rptun: use HPWORK instead of thread 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:00:07 +03:00
ligd
3ab7ade4ba rptun: add rptun_reset support 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:00:07 +03:00
ligd
7aba7c3790 rptun: add rptun_force_panic support 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:00:07 +03:00
ligd
5b6b748f6d rptun: set rptun thread default stack size to 4K 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:00:07 +03:00
田昕
4071f460b2 boards/boardctl:common boardctl to read reset cause. 
Signed-off-by: 田昕 <tianxin7@xiaomi.com>
 2022-03-30 09:59:10 +03:00
Jiuzhu Dong
ca8ce37433 fs/romfs: fix bug about compare path with same prefix 
Signed-off-by: Jiuzhu Dong <dongjiuzhu1@xiaomi.com>
 2022-03-30 09:04:57 +03:00
Alin Jerpelea
3ed4496a76 documentation: Add release notes for 10.3.0 release 
This is a local copy taken from the confluence notes
https://cwiki.apache.org/confluence/display/NUTTX/NuttX+10.3

Signed-off-by: Alin Jerpelea <alin.jerpelea@sony.com>
 2022-03-30 11:19:52 +08:00
Gustavo Henrique Nihei
e1f28c19c2 arch/arm: Make CXX exception and RTTI depend on Kconfig options 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-30 11:19:29 +08:00
Gustavo Henrique Nihei
7b4d9f0afd esp32[s2/s3/c3]: Add defconfigs for testing C++ 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-30 11:19:29 +08:00
Gustavo Henrique Nihei
0bd436c8db libcxx: Fix libc++ for archs without conditional load/store support 
This commit brings a patch already merged to upstream LLVM project:
https://reviews.llvm.org/D118391

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-30 11:19:29 +08:00
Gustavo Henrique Nihei
8a215b60af libcxx: Add patch for preventing redefinition of PS macro on Xtensa 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-30 11:19:29 +08:00
Gustavo Henrique Nihei
06d0a9f1ad xtensa|risc-v: Make CXX exception and RTTI depend on Kconfig options 
Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-30 11:19:29 +08:00
Gustavo Henrique Nihei
a0617177e8 risc-v/esp32c3: Fix inclusion of C++ constructors/destructors table 
RISC-V GCC is configured with --enable-initfini-array so it emits an
.init_array section instead of .ctors

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-30 11:19:29 +08:00
Gustavo Henrique Nihei
c7311829e0 xtensa: Build OS-assisted atomic operations on ESP32-S2 
ESP32-S2 lacks support for conditional load/store instructions.

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-30 11:19:29 +08:00
Gustavo Henrique Nihei
7926bce26b xtensa: Move XCHAL_SWINT_CALL definition into syscall header 
This is required to avoid the interface header (syscall.h) depending on
the xtensa_swi.h header from the implementation

Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
 2022-03-30 11:19:29 +08:00
Lee Lup Yuen
416ec42077 riscv/esp32c3: Remove check for LCD driver 
## Summary

`esp32c3_spi2_cmddata()` implements SPI Cmd/Data `SPI_CMDDATA()` for only 3 LCD drivers: ST7735, ST7789 and GC9A01.

This patch removes the check for LCD drivers, so that SPI Cmd/Data will work for all LCD drivers.

More details: https://github.com/apache/incubator-nuttx/pull/5898

## Impact

This change impacts LCD drivers that call `SPI_CMDDATA()`.

Previously `SPI_CMDDATA()` would fail with `ENODEV` for LCD drivers other than ST7735, ST7789 and GC9A01.

After patching, `SPI_CMDDATA()` will work correctly with all LCD drivers.

## Testing

This is a minor patch so no testing is needed.
 2022-03-29 23:09:57 -03:00
Lee Lup Yuen
4456b13c19 riscv/bl602: Remove check for LCD driver 
## Summary

`bl602_spi_cmddata()` implements SPI Cmd/Data `SPI_CMDDATA()` for only 3 LCD drivers: ST7735, ST7789 and GC9A01.

This patch removes the check for LCD drivers, so that SPI Cmd/Data will work for all LCD drivers.

More details: https://github.com/apache/incubator-nuttx/pull/5898

## Impact

This change impacts LCD drivers that call `SPI_CMDDATA()`.

Previously `SPI_CMDDATA()` would fail with `ENODEV` for LCD drivers other than ST7735, ST7789 and GC9A01.

After patching, `SPI_CMDDATA()` will work correctly with all LCD drivers.

## Testing

We tested with LVGL and ST7789 on PineCone BL602:

-   [Testing with LVGL](https://github.com/lupyuen/st7789-nuttx#run-lvgl-demo)

As for regular SPI Devices that don't require SPI Cmd/Data, we tested `CONFIG_SPI_CMDDATA=y` with Semtech SX1262 SPI Transceiver on PineCone BL602:

-   [Testing Cmd/Data](https://github.com/lupyuen/incubator-nuttx/releases/tag/release-2022-03-30)
 2022-03-29 23:09:42 -03:00
ligd
e9f17947b7 task: don't set default signal in kernal thread 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:53:14 +09:00
ligd
0c1f63625a signal: Don't do schedule_sigaction when there is no action 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 10:53:14 +09:00
chao.an
a98a599cb9 arm/cortex-[a|r]: IRQ Switch return should with shadow SPSR 
The SPSR is used to store the current value of the CPSR when an exception
is taken so that it can be restored after handling the exception.
Each exception handling mode can access its own SPSR.

User mode and System mode do not have an SPSR because they are not
exception handling modes.

Signed-off-by: chao.an <anchao@xiaomi.com>
 2022-03-30 08:12:26 +09:00
ligd
b0e0f9db68 opendir: use inode_find() instead when opendir() 
Signed-off-by: ligd <liguiding1@xiaomi.com>
 2022-03-30 03:33:39 +08:00
Richard Tucker
dc93c309b5 boards/risc-v/litex/arty_a7: update README to include building in LITESDCARD peripheral 2022-03-30 02:35:27 +08:00
Richard Tucker
3939575d7c boards/risc-v/litex/arty_a7: add SDCARD support for the Arty_A7 board 2022-03-30 02:35:27 +08:00
Richard Tucker
6d8cd4ec92 arch/risc-v/src/litex/litex_sdio: add litesdcard peripheral driver 
See the following for details on the pepheral:
https://github.com/enjoy-digital/litesdcard
 2022-03-30 02:35:27 +08:00
Richard Tucker
163e3fd93c driver/mmcsd: add option to support SD/MMC PHYs that only run in 4-bit mode 2022-03-30 02:35:27 +08:00
Richard Tucker
d557b87b25 arch/risc-v/litex: add cache_invalidate 2022-03-30 02:35:27 +08:00