add the tools needed for the compilation environment and docker first, then add matter compilation to cilist
Signed-off-by: zhanghongyu <zhanghongyu@xiaomi.com>
A new locking mechanism: read/write locks
When there is a writer it is not possible to put on a read lock or a write lock; when there is a reader it is possible to reenter the read lock but not the write lock.
Writers are exclusive locks, readers are shared locks.
At the same time through the waiter count to determine whether there is currently a blocked task, if there is then in the unlock time to wake up all the waiter, through the priority of the competition to complete the blocked lock execution.
For example:
When we have a reader blocking two waiter writers, when the reader is unlocked it wakes up both writers. The writer with higher priority wakes up and checks for a successful condition and locks the lock, the second writer wakes up and fails to check for a condition and continues to block the lock.
Signed-off-by: chenrun1 <chenrun1@xiaomi.com>
1. Configurable mapping of virtual address to psram physical address
2. Access SPIRAM memory at high physical address through bank switching
Signed-off-by: chenwen@espressif.com <chenwen@espressif.com>
Since picolibc used by clang-17 does not provide an implementation of libm,
if you want to use clang, please must specify a libm as an option.
Signed-off-by: chao an <anchao@xiaomi.com>
armv6-m/arm_dumpnvic.c: In function 'arm_dumpnvic':
armv6-m/arm_dumpnvic.c:67:13: warning: format '%x' expects argument of type 'unsigned int', but argument 4 has type 'uint32_t' {aka 'long unsigned int'} [-Wformat=]
67 | _info(" IPR%d: %08x IPR%d: %08x IPR%d: %08x IPR%d: %08x\n",
| ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
armv6-m/arm_dumpnvic.c:67:27: note: format string is defined here
67 | _info(" IPR%d: %08x IPR%d: %08x IPR%d: %08x IPR%d: %08x\n",
| ~~~^
| |
| unsigned int
| %08lx
Signed-off-by: chao an <anchao@xiaomi.com>
chip/stm32_ethernet.c:2014:7: warning: variable 'i' set but not used [-Wunused-but-set-variable]
2014 | int i;
| ^
1 warning generated.
Signed-off-by: chao an <anchao@xiaomi.com>
Adds support for POSIX interface open_memstream() that allows writing
to dynamic memory buffer stream. The stream is dynamically reallocated
as the buffer grows with initial size set to zero.
The caller has to free the buffer after the stream is closed.
The implementation uses fopencookie() for custom stream operations and
callbacks.
Signed-off-by: Michal Lenc <michallenc@seznam.cz>
To avoid losing the first frame, the set_buf needs to excute first. At the same time, imgdata->start_capture should excuted before the imgsensor->start_capture.
Signed-off-by: yaojingwei <yaojingwei@xiaomi.com>
The divider should be rounded to the next full integer to ensure that
the resulting SPI frequency is <= target frequency, i.e. the SPI is
not overclocked.
ignore known warnings:
/home/raiden00/git/RTOS/nuttx/nuttx/Documentation/reference/os/netdev.rst:61: WARNING: Duplicate C declaration, also defined at reference/os/netdev:39.
Declaration is '.. c:struct:: net_driver_s'.
/home/raiden00/git/RTOS/nuttx/nuttx/Documentation/reference/user/07_signals.rst:180: WARNING: Duplicate C declaration, also defined at reference/user/structures:112.
Declaration is '.. c:struct:: sigaction'.
This moves all the public POSIX semaphore functions into libc and with
this most of the user-space logic is also moved; namely cancel point and
errno handling.
This also removes the need for the _SEM_XX macros used to differentiate
which API is used per user-/kernel mode. Such macros are henceforth
unnecessary.
After this, RISC-V fully supports the kmap interface.
Due to the current design limitations of having only a single L2 table
per process, the kernel kmap area cannot be mapped via any user page
directory, as they do not contain the page tables to address that range.
So a "kernel address environment" is added, which can do the mapping. The
mapping is reflected to every process as only the root page directory (L1)
is copied to users, which means every change to L2 / L3 tables will be
seen by every user.
