Commit Graph

6 Commits

Author SHA1 Message Date
David Sidrane
bcf673a673 stm32h7 stm32h7x3xx_irq: Fix CS violation 2020-05-23 09:16:30 -03:00
David Sidrane
f5482b50ee stm32h7:stm32h7x3xx_irq STM32_IRQ_SDMMC->STM32_IRQ_SDMMC2 2020-05-23 09:16:30 -03:00
Nathan Hartman
679b4fbee2 arch: Fix included directed -> included directly
This typo had been copied and pasted into numerous irq and syscall
headers.
2020-04-05 22:31:15 +01:00
raiden00pl
4ae7373427 Merged in raiden00/nuttx_h7 (pull request #835)
Improvements for H7 towards the DMA support

arch/arm/include/stm32h7/stm32h7x3xx_irq.h: fix typos and rename DMA1/2 irq names to match those from other STM32

arch/arm/src/stm32h7/chip/stm32_bdma.h: add auxiliary definitions

arch/arm/src/stm32h7/chip/stm32_dma.h: cosmetic changes

arch/arm/src/stm32h7/chip/stm32_dmamux.h: add auxliary definitions and fix some typos

arch/arm/src/stm32h7/chip/stm32_mdma.h: add auxliary definitions and fix some typos

arch/arm/src/stm32h7/chip/stm32h7x3xx_dmamux.h: add DMAMAP definitions for MDMA, DMA1, DMA2 and BDMA

arch/arm/src/stm32h7/chip/stm32h7x3xx_memorymap.h: fix AHB1 base adresses and add some address blocks

arch/arm/src/stm32h7/chip/stm32h7x3xx_rcc.h: fix some definitions to match other STM32 ports

arch/arm/src/stm32h7/stm32_allocateheap.c: use SRAM from D2 domain (SRAM123) for now

arch/arm/src/stm32h7/stm32h7x3xx_rcc.c: enable clock for MDMA and BDMA

Approved-by: Gregory Nutt <gnutt@nuttx.org>
2019-03-01 17:37:22 +00:00
Gregory Nutt
cb374e6e62 arch/: Clean up some naming and spacing. 2018-06-20 15:38:06 -06:00
Simon Laube
7b0475450c This commit brings in a partial, WIP port to the STMicro STM32H7. The port is still missing several key components that make unusable in its current form. However, the changes have lingered on a branch long enough.
See configs/nucleo-h743zi/README.txt for a detailed description of the state of the port.
2018-06-16 16:59:34 -06:00