sergiotarxz/nuttx
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10 Commits

Author SHA1 Message Date
Xiang Xiao
d7ee492fc4 board/arch: Remove FAR decorator 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2023-01-25 13:05:07 +02:00
AuroraRAS
280aaa7b1d Implement Interface method for ESP32C3: go_setpintype 
Signed-off-by: AuroraRAS <chplee@gmail.com>
 2022-10-22 09:01:37 +08:00
Xiang Xiao
7a0fd8d10f arch/risc-v: Remove FAR from chip and board folder 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2022-04-19 00:22:45 +03:00
Jari van Ewijk
2e47ef32cf GPIO driver: register all pintypes as generic /dev/gpioN 2021-12-09 23:55:12 -06:00
Sara Souza
81e881c8c0 risc-v/esp32-c3: Makes output readable and rmv unnecessary var. 2021-07-16 19:53:04 -03:00
Gustavo Henrique Nihei
330eff36d7 sourcefiles: Fix relative path in file header 2021-03-09 23:18:28 +08:00
Xiang Xiao
9473434587 Ensure the kernel component don't call userspace API 
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
 2021-03-01 09:23:09 +09:00
Abdelatif Guettouche
067da56d0c esp32c3: Some cosmetics and style fixes. 
Signed-off-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-02-21 10:29:43 -03:00
Abdelatif Guettouche
10822799fb esp32c3: Add GPIO IRQ support. 
The GPIO example was also extended to include testing an interrupt pin.

Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
Co-authored-by: Alan Carvalho <alan.carvalho@espressif.com>
 2021-02-21 10:29:43 -03:00
Alan Carvalho
4a42998f36 esp32-c3: Add the GPIO driver. 
This commits adds support for the ESP32-C3 IO Mux and GPIO Matrix.  It
also includes necessary board logic to run the GPIO example with 2
outputs.

Co-authored-by: Alan Carvalho <alan.carvalho@espressif.com>
Co-authored-by: Abdelatif Guettouche <abdelatif.guettouche@espressif.com>
 2021-02-21 10:29:43 -03:00