Huang Qi 10bb48b9b4 arch/risc-v: Merge rv32im and rv64gc into common ... Signed-off-by: Huang Qi <huangqi3@xiaomi.com>		2022-01-11 23:24:33 +08:00
..
bl602
c906
esp32c3	riscv/esp32c3: Add esp32c3 BLE driver	2021-06-28 23:14:30 -05:00
fe310
k210
litex
mpfs
qemu-rv32	arch/risc-v: Introduce basic support for qemu rv32	2021-12-07 23:28:33 -06:00
rv32m1	arch/risc-v: Merge rv32im and rv64gc into common	2022-01-11 23:24:33 +08:00
.gitignore
arch.h	arch/risc-v: Refine arch.h	2022-01-04 14:46:24 +08:00
csr.h
elf.h
inttypes.h	arch/risc-v: Replace __LP64__ with CONFIG_ARCH_RV64	2022-01-04 23:22:43 +08:00
irq.h	arch/risc-v: Merge rv32im and rv64gc into common	2022-01-11 23:24:33 +08:00
limits.h	arch/risc-v: Refine Toolchain.defs	2021-12-28 00:30:10 -06:00
mcause.h	arch/risc-v: Merge rv32im and rv64gc into common	2022-01-11 23:24:33 +08:00
setjmp.h
spinlock.h	arch/risc-v: Replace __LP64__ with CONFIG_ARCH_RV64	2022-01-04 23:22:43 +08:00
stdarg.h
syscall.h	arch/risc-v: Refine syscall interface	2021-12-30 11:47:42 +08:00
types.h	arch/risc-v: Replace __LP64__ with CONFIG_ARCH_RV64	2022-01-04 23:22:43 +08:00