zhuyanlin 3acdbef60d xtensa:arch: force up_getsp to inline ... Up_getsp may be not inline in gcc, thus get the sp is up_getsp function's sp, not the caller function. Signed-off-by: zhuyanlin <zhuyanlin1@xiaomi.com>		2021-09-16 10:32:38 +08:00
..
esp32	arch:xtensa: rename XCHAL_INT_NLEVELS to XCHAL_NUM_INTLEVELS	2021-08-28 21:51:45 +02:00
esp32s2	arch:xtensa: rename XCHAL_INT_NLEVELS to XCHAL_NUM_INTLEVELS	2021-08-28 21:51:45 +02:00
lx6	arch: xtensa: Author Gregory Nutt: update licenses to Apache	2021-04-02 03:14:31 -05:00
lx7	Add initial ESP32S2 Xtensa support	2021-06-01 07:49:54 +02:00
xtensa	arch:xtensa: remove WSBITS/WBBITS to core.h	2021-09-16 10:32:38 +08:00
.gitignore
arch.h	xtensa:arch: force up_getsp to inline	2021-09-16 10:32:38 +08:00
elf.h	xtensa: Implement a few relocations	2020-03-16 07:54:49 -06:00
inttypes.h	xtensa inttypes.h: Remove PRI/SCN macros for fast and least types	2020-11-05 18:49:22 -08:00
irq.h	xtensa/irq.h: Fixes the routine that clears the processor interrupt	2021-09-13 17:01:49 -03:00
limits.h	arch: xtensa: Author Gregory Nutt: update licenses to Apache	2021-04-02 03:14:31 -05:00
loadstore.h	esp32: emulate byte access for module text	2020-03-16 07:54:49 -06:00
simcall.h
spinlock.h	arch&boards/xtensa: Fix some typos, references to STM/ARM code and	2020-08-27 05:48:55 -07:00
stdarg.h	arch:xtensa: add arch stdarg.h include file for xtensa	2021-08-09 17:58:25 -03:00
syscall.h	arch: xtensa: Author Gregory Nutt: update licenses to Apache	2021-04-02 03:14:31 -05:00
tls.h	arch: Rename xxx_getsp to up_getsp	2021-06-09 10:20:02 -07:00
types.h	arch: xtensa: Author Gregory Nutt: update licenses to Apache	2021-04-02 03:14:31 -05:00