18edab3ad2
arch/arm/include/tiva/cc13x0_irq.h:
* Fix nxstyle warnings. No functional changes.
arch/arm/include/tiva/cc13x2_cc26x2_irq.h:
* Fix nxstyle warnings. No functional changes.
arch/arm/include/tiva/chip.h:
* Fix nxstyle warnings. No functional changes.
arch/arm/include/tiva/irq.h:
* Fix nxstyle warnings. No functional changes.
arch/arm/include/tiva/lm3s_irq.h:
* Fix nxstyle warnings. No functional changes.
arch/arm/include/tiva/lm4f_irq.h:
* Fix nxstyle warnings. No functional changes.
arch/arm/include/tiva/tm4c_irq.h:
* Fix nxstyle warnings. No functional changes.
376 lines
17 KiB
C
376 lines
17 KiB
C
/************************************************************************************
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* arch/arm/include/tiva/lm4f_irq.h
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_INCLUDE_TIVA_LM4F_IRQ_H
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#define __ARCH_ARM_INCLUDE_TIVA_LM4F_IRQ_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* IRQ numbers. The IRQ number corresponds vector number and hence map directly to
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* bits in the NVIC. This does, however, waste several words of memory in the IRQ
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* to handle mapping tables.
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*/
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/* External interrupts (vectors >= 16) */
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#if defined(CONFIG_ARCH_CHIP_LM4F120)
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# define TIVA_IRQ_GPIOA (16) /* Vector 16: GPIO Port A */
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# define TIVA_IRQ_GPIOB (17) /* Vector 17: GPIO Port B */
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# define TIVA_IRQ_GPIOC (18) /* Vector 18: GPIO Port C */
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# define TIVA_IRQ_GPIOD (19) /* Vector 19: GPIO Port D */
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# define TIVA_IRQ_GPIOE (20) /* Vector 20: GPIO Port E */
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# define TIVA_IRQ_UART0 (21) /* Vector 21: UART 0 */
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# define TIVA_IRQ_UART1 (22) /* Vector 22: UART 1 */
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# define TIVA_IRQ_SSI0 (23) /* Vector 23: SSI 0 */
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# define TIVA_IRQ_I2C0 (24) /* Vector 24: I2C 0 */
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# define TIVA_RESERVED_25 (25) /* Vector 25: Reserved */
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# define TIVA_RESERVED_26 (26) /* Vector 26: Reserved */
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# define TIVA_RESERVED_27 (27) /* Vector 27: Reserved */
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# define TIVA_RESERVED_28 (28) /* Vector 28: Reserved */
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# define TIVA_RESERVED_29 (29) /* Vector 29: Reserved */
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# define TIVA_IRQ_ADC0 (30) /* Vector 30: ADC Sequence 0 */
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# define TIVA_IRQ_ADC1 (31) /* Vector 31: ADC Sequence 1 */
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# define TIVA_IRQ_ADC2 (32) /* Vector 32: ADC Sequence 2 */
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# define TIVA_IRQ_ADC3 (33) /* Vector 33: ADC Sequence 3 */
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# define TIVA_IRQ_WDOG (34) /* Vector 34: Watchdog Timers 0 and 1 */
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# define TIVA_IRQ_TIMER0A (35) /* Vector 35: 16/32-Bit Timer 0 A */
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# define TIVA_IRQ_TIMER0B (36) /* Vector 36: 16/32-Bit Timer 0 B */
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# define TIVA_IRQ_TIMER1A (37) /* Vector 37: 16/32-Bit Timer 1 A */
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# define TIVA_IRQ_TIMER1B (38) /* Vector 38: 16/32-Bit Timer 1 B */
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# define TIVA_IRQ_TIMER2A (39) /* Vector 39: 16/32-Bit Timer 2 A */
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# define TIVA_IRQ_TIMER2B (40) /* Vector 40: 16/32-Bit Timer 2 B */
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# define TIVA_IRQ_COMPARE0 (41) /* Vector 41: Analog Comparator 0 */
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# define TIVA_IRQ_COMPARE1 (42) /* Vector 42: Analog Comparator 1 */
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# define TIVA_RESERVED_43 (43) /* Vector 43: Reserved */
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# define TIVA_IRQ_SYSCON (44) /* Vector 44: System Control */
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# define TIVA_IRQ_FLASHCON (45) /* Vector 45: FLASH and EEPROM Control */
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# define TIVA_IRQ_GPIOF (46) /* Vector 46: GPIO Port F */
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# define TIVA_RESERVED_47 (47) /* Vector 47: Reserved */
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# define TIVA_RESERVED_48 (48) /* Vector 48: Reserved */
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# define TIVA_IRQ_UART2 (49) /* Vector 49: UART 2 */
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# define TIVA_IRQ_SSI1 (50) /* Vector 50: SSI 1 */
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# define TIVA_IRQ_TIMER3A (51) /* Vector 51: 16/32-Bit Timer 3 A */
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# define TIVA_IRQ_TIMER3B (52) /* Vector 52: 16/32-Bit Timer 3 B */
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# define TIVA_IRQ_I2C1 (53) /* Vector 53: I2C 1 */
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# define TIVA_RESERVED_54 (54) /* Vector 54: Reserved */
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# define TIVA_IRQ_CAN0 (55) /* Vector 55: CAN 0 */
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# define TIVA_RESERVED_56 (56) /* Vector 56: Reserved */
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# define TIVA_RESERVED_57 (57) /* Vector 57: Reserved */
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# define TIVA_RESERVED_58 (58) /* Vector 58: Reserved */
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# define TIVA_IRQ_HIBERNATE (59) /* Vector 59: Hibernation Module */
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# define TIVA_IRQ_USB (60) /* Vector 60: USB */
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# define TIVA_RESERVED_61 (61) /* Vector 61: Reserved */
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# define TIVA_IRQ_UDMASOFT (62) /* Vector 62: uDMA Software */
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# define TIVA_IRQ_UDMAERROR (63) /* Vector 63: uDMA Error */
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# define TIVA_IRQ_ADC1_0 (64) /* Vector 64: ADC1 Sequence 0 */
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# define TIVA_IRQ_ADC1_1 (65) /* Vector 65: ADC1 Sequence 1 */
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# define TIVA_IRQ_ADC1_2 (66) /* Vector 66: ADC1 Sequence 2 */
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# define TIVA_IRQ_ADC1_3 (67) /* Vector 67: ADC1 Sequence 3 */
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# define TIVA_RESERVED_68 (68) /* Vector 68: Reserved */
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# define TIVA_RESERVED_69 (69) /* Vector 69: Reserved */
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# define TIVA_RESERVED_70 (70) /* Vector 70: Reserved */
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# define TIVA_RESERVED_71 (71) /* Vector 71: Reserved */
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# define TIVA_RESERVED_72 (72) /* Vector 72: Reserved */
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# define TIVA_IRQ_SSI2 (73) /* Vector 73: SSI 2 */
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# define TIVA_IRQ_SSI3 (74) /* Vector 74: SSI 3 */
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# define TIVA_IRQ_UART3 (75) /* Vector 75: UART 3 */
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# define TIVA_IRQ_UART4 (76) /* Vector 76: UART 4 */
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# define TIVA_IRQ_UART5 (77) /* Vector 77: UART 5 */
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# define TIVA_IRQ_UART6 (78) /* Vector 78: UART 6 */
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# define TIVA_IRQ_UART7 (79) /* Vector 79: UART 7 */
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# define TIVA_RESERVED_80 (80) /* Vector 80: Reserved */
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# define TIVA_RESERVED_81 (81) /* Vector 81: Reserved */
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# define TIVA_RESERVED_82 (82) /* Vector 82: Reserved */
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# define TIVA_RESERVED_83 (83) /* Vector 83: Reserved */
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# define TIVA_IRQ_I2C2 (84) /* Vector 84: I2C 2 */
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# define TIVA_IRQ_I2C3 (85) /* Vector 85: I2C 3 */
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# define TIVA_IRQ_TIMER4A (86) /* Vector 86: 16/32-Bit Timer 4 A */
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# define TIVA_IRQ_TIMER4B (87) /* Vector 87: 16/32-Bit Timer 4 B */
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# define TIVA_RESERVED_88 (88) /* Vector 88: Reserved */
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# define TIVA_RESERVED_89 (89) /* Vector 89: Reserved */
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# define TIVA_RESERVED_90 (90) /* Vector 90: Reserved */
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# define TIVA_RESERVED_91 (91) /* Vector 91: Reserved */
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# define TIVA_RESERVED_92 (92) /* Vector 92: Reserved */
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# define TIVA_RESERVED_93 (93) /* Vector 93: Reserved */
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# define TIVA_RESERVED_94 (94) /* Vector 94: Reserved */
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# define TIVA_RESERVED_95 (95) /* Vector 95: Reserved */
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# define TIVA_RESERVED_96 (96) /* Vector 96: Reserved */
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# define TIVA_RESERVED_97 (97) /* Vector 97: Reserved */
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# define TIVA_RESERVED_98 (98) /* Vector 98: Reserved */
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# define TIVA_RESERVED_99 (99) /* Vector 99: Reserved */
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# define TIVA_RESERVED_100 (100) /* Vector 100: Reserved */
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# define TIVA_RESERVED_101 (101) /* Vector 101: Reserved */
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# define TIVA_RESERVED_102 (102) /* Vector 102: Reserved */
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# define TIVA_RESERVED_103 (103) /* Vector 103: Reserved */
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# define TIVA_RESERVED_104 (104) /* Vector 104: Reserved */
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# define TIVA_RESERVED_105 (105) /* Vector 105: Reserved */
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# define TIVA_RESERVED_106 (106) /* Vector 106: Reserved */
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# define TIVA_RESERVED_107 (107) /* Vector 107: Reserved */
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# define TIVA_IRQ_TIMER5A (108) /* Vector 108: 16/32-Bit Timer 5 A */
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# define TIVA_IRQ_TIMER5B (109) /* Vector 109: 16/32-Bit Timer 5 B */
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# define TIVA_IRQ_WTIMER0A (110) /* Vector 110: 32/64-Bit Timer 0 A */
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# define TIVA_IRQ_WTIMER0B (111) /* Vector 111: 32/64-Bit Timer 0 B */
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# define TIVA_IRQ_WTIMER1A (112) /* Vector 112: 32/64-Bit Timer 1 A */
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# define TIVA_IRQ_WTIMER1B (113) /* Vector 113: 32/64-Bit Timer 1 B */
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# define TIVA_IRQ_WTIMER2A (114) /* Vector 114: 32/64-Bit Timer 2 A */
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# define TIVA_IRQ_WTIMER2B (115) /* Vector 115: 32/64-Bit Timer 2 B */
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# define TIVA_IRQ_WTIMER3A (116) /* Vector 116: 32/64-Bit Timer 3 A */
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# define TIVA_IRQ_WTIMER3B (117) /* Vector 117: 32/64-Bit Timer 3 B */
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# define TIVA_IRQ_WTIMER4A (118) /* Vector 118: 32/64-Bit Timer 4 A */
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# define TIVA_IRQ_WTIMER4B (119) /* Vector 119: 32/64-Bit Timer 4 B */
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# define TIVA_IRQ_WTIMER5A (120) /* Vector 120: 32/64-Bit Timer 5 A */
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# define TIVA_IRQ_WTIMER5B (121) /* Vector 121: 32/64-Bit Timer 5 B */
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# define TIVA_IRQ_SYSTEM (122) /* Vector 122: System Exception (imprecise) */
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# define TIVA_RESERVED_123 (123) /* Vector 123: Reserved */
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# define TIVA_RESERVED_124 (124) /* Vector 124: Reserved */
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# define TIVA_RESERVED_125 (125) /* Vector 125: Reserved */
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# define TIVA_RESERVED_126 (126) /* Vector 126: Reserved */
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# define TIVA_RESERVED_127 (127) /* Vector 127: Reserved */
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# define TIVA_RESERVED_128 (128) /* Vector 128: Reserved */
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# define TIVA_RESERVED_129 (129) /* Vector 129: Reserved */
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# define TIVA_RESERVED_130 (130) /* Vector 130: Reserved */
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# define TIVA_RESERVED_131 (131) /* Vector 131: Reserved */
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# define TIVA_RESERVED_132 (132) /* Vector 132: Reserved */
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# define TIVA_RESERVED_133 (133) /* Vector 133: Reserved */
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# define TIVA_RESERVED_134 (134) /* Vector 134: Reserved */
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# define TIVA_RESERVED_135 (135) /* Vector 135: Reserved */
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# define TIVA_RESERVED_136 (136) /* Vector 136: Reserved */
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# define TIVA_RESERVED_137 (137) /* Vector 137: Reserved */
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# define TIVA_RESERVED_138 (138) /* Vector 138: Reserved */
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# define TIVA_RESERVED_139 (139) /* Vector 139: Reserved */
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# define TIVA_RESERVED_140 (140) /* Vector 140: Reserved */
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# define TIVA_RESERVED_141 (141) /* Vector 141: Reserved */
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# define TIVA_RESERVED_142 (142) /* Vector 142: Reserved */
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# define TIVA_RESERVED_143 (143) /* Vector 143: Reserved */
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# define TIVA_RESERVED_144 (144) /* Vector 144: Reserved */
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# define TIVA_RESERVED_145 (145) /* Vector 145: Reserved */
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# define TIVA_RESERVED_146 (146) /* Vector 146: Reserved */
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# define TIVA_RESERVED_147 (147) /* Vector 147: Reserved */
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# define TIVA_RESERVED_148 (148) /* Vector 148: Reserved */
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# define TIVA_RESERVED_149 (149) /* Vector 149: Reserved */
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# define TIVA_RESERVED_150 (150) /* Vector 150: Reserved */
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# define TIVA_RESERVED_151 (151) /* Vector 151: Reserved */
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# define TIVA_RESERVED_152 (152) /* Vector 152: Reserved */
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# define TIVA_RESERVED_153 (153) /* Vector 153: Reserved */
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# define TIVA_RESERVED_154 (154) /* Vector 154: Reserved */
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# define NR_IRQS (155) /* (Really fewer because of reserved vectors) */
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#else
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# error "IRQ Numbers not known for this Tiva chip"
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#endif
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#define TIVA_IRQ_NEXTINT (NR_IRQS - 16)
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/* GPIO IRQs -- Note that support for individual GPIO ports can
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* be disabled in order to reduce the size of the implementation.
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*/
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/* No supported architecture supports interrupts on ports G-N or R-T */
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#undef CONFIG_TIVA_GPIOG_IRQS /* G-N */
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#undef CONFIG_TIVA_GPIOH_IRQS
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#undef CONFIG_TIVA_GPIOJ_IRQS
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#undef CONFIG_TIVA_GPIOK_IRQS
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#undef CONFIG_TIVA_GPIOL_IRQS
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#undef CONFIG_TIVA_GPIOM_IRQS
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#undef CONFIG_TIVA_GPION_IRQS
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#undef CONFIG_TIVA_GPIOR_IRQS /* R-T */
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#undef CONFIG_TIVA_GPIOS_IRQS
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#undef CONFIG_TIVA_GPIOT_IRQS
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#if defined(CONFIG_TIVA_GPIOA_IRQS)
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# define TIVA_IRQ_GPIOA_0 (NR_IRQS + 0)
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# define TIVA_IRQ_GPIOA_1 (NR_IRQS + 1)
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# define TIVA_IRQ_GPIOA_2 (NR_IRQS + 2)
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# define TIVA_IRQ_GPIOA_3 (NR_IRQS + 3)
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# define TIVA_IRQ_GPIOA_4 (NR_IRQS + 4)
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# define TIVA_IRQ_GPIOA_5 (NR_IRQS + 5)
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# define TIVA_IRQ_GPIOA_6 (NR_IRQS + 6)
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# define TIVA_IRQ_GPIOA_7 (NR_IRQS + 7)
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# define _NGPIOBIRQS (NR_IRQS + 8)
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#else
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# define _NGPIOBIRQS NR_IRQS
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#endif
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#if defined(CONFIG_TIVA_GPIOB_IRQS)
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# define TIVA_IRQ_GPIOB_0 (_NGPIOBIRQS + 0)
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# define TIVA_IRQ_GPIOB_1 (_NGPIOBIRQS + 1)
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# define TIVA_IRQ_GPIOB_2 (_NGPIOBIRQS + 2)
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# define TIVA_IRQ_GPIOB_3 (_NGPIOBIRQS + 3)
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# define TIVA_IRQ_GPIOB_4 (_NGPIOBIRQS + 4)
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# define TIVA_IRQ_GPIOB_5 (_NGPIOBIRQS + 5)
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# define TIVA_IRQ_GPIOB_6 (_NGPIOBIRQS + 6)
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# define TIVA_IRQ_GPIOB_7 (_NGPIOBIRQS + 7)
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# define _NGPIOCIRQS (_NGPIOBIRQS + 8)
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#else
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# define _NGPIOCIRQS _NGPIOBIRQS
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#endif
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#if defined(CONFIG_TIVA_GPIOC_IRQS)
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# define TIVA_IRQ_GPIOC_0 (_NGPIOCIRQS + 0)
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# define TIVA_IRQ_GPIOC_1 (_NGPIOCIRQS + 1)
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# define TIVA_IRQ_GPIOC_2 (_NGPIOCIRQS + 2)
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# define TIVA_IRQ_GPIOC_3 (_NGPIOCIRQS + 3)
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# define TIVA_IRQ_GPIOC_4 (_NGPIOCIRQS + 4)
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# define TIVA_IRQ_GPIOC_5 (_NGPIOCIRQS + 5)
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# define TIVA_IRQ_GPIOC_6 (_NGPIOCIRQS + 6)
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# define TIVA_IRQ_GPIOC_7 (_NGPIOCIRQS + 7)
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# define _NGPIODIRQS (_NGPIOCIRQS + 8)
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#else
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# define _NGPIODIRQS _NGPIOCIRQS
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#endif
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#if defined(CONFIG_TIVA_GPIOD_IRQS)
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# define TIVA_IRQ_GPIOD_0 (_NGPIODIRQS + 0)
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# define TIVA_IRQ_GPIOD_1 (_NGPIODIRQS + 1)
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# define TIVA_IRQ_GPIOD_2 (_NGPIODIRQS + 2)
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# define TIVA_IRQ_GPIOD_3 (_NGPIODIRQS + 3)
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# define TIVA_IRQ_GPIOD_4 (_NGPIODIRQS + 4)
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# define TIVA_IRQ_GPIOD_5 (_NGPIODIRQS + 5)
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# define TIVA_IRQ_GPIOD_6 (_NGPIODIRQS + 6)
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# define TIVA_IRQ_GPIOD_7 (_NGPIODIRQS + 7)
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# define _NGPIOEIRQS (_NGPIODIRQS + 8)
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#else
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# define _NGPIOEIRQS _NGPIODIRQS
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#endif
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#if defined(CONFIG_TIVA_GPIOE_IRQS)
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# define TIVA_IRQ_GPIOE_0 (_NGPIOEIRQS + 0)
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# define TIVA_IRQ_GPIOE_1 (_NGPIOEIRQS + 1)
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# define TIVA_IRQ_GPIOE_2 (_NGPIOEIRQS + 2)
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# define TIVA_IRQ_GPIOE_3 (_NGPIOEIRQS + 3)
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# define TIVA_IRQ_GPIOE_4 (_NGPIOEIRQS + 4)
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# define TIVA_IRQ_GPIOE_5 (_NGPIOEIRQS + 5)
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# define TIVA_IRQ_GPIOE_6 (_NGPIOEIRQS + 6)
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# define TIVA_IRQ_GPIOE_7 (_NGPIOEIRQS + 7)
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# define _NGPIOFIRQS (_NGPIOEIRQS + 8)
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#else
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# define _NGPIOFIRQS _NGPIOEIRQS
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#endif
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#if defined(CONFIG_TIVA_GPIOF_IRQS)
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# define TIVA_IRQ_GPIOF_0 (_NGPIOFIRQS + 0)
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# define TIVA_IRQ_GPIOF_1 (_NGPIOFIRQS + 1)
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# define TIVA_IRQ_GPIOF_2 (_NGPIOFIRQS + 2)
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# define TIVA_IRQ_GPIOF_3 (_NGPIOFIRQS + 3)
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# define TIVA_IRQ_GPIOF_4 (_NGPIOFIRQS + 4)
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# define TIVA_IRQ_GPIOF_5 (_NGPIOFIRQS + 5)
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# define TIVA_IRQ_GPIOF_6 (_NGPIOFIRQS + 6)
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# define TIVA_IRQ_GPIOF_7 (_NGPIOFIRQS + 7)
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# define _NGPIONIRQS (_NGPIOFIRQS + 8)
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#else
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# define _NGPIONIRQS _NGPIOMIRQS
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#endif
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#if defined(CONFIG_TIVA_GPIOP_IRQS)
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# define TIVA_IRQ_GPIOP_0 (_NGPIONIRQS + 0)
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# define TIVA_IRQ_GPIOP_1 (_NGPIONIRQS + 1)
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# define TIVA_IRQ_GPIOP_2 (_NGPIONIRQS + 2)
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# define TIVA_IRQ_GPIOP_3 (_NGPIONIRQS + 3)
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# define TIVA_IRQ_GPIOP_4 (_NGPIONIRQS + 4)
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# define TIVA_IRQ_GPIOP_5 (_NGPIONIRQS + 5)
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# define TIVA_IRQ_GPIOP_6 (_NGPIONIRQS + 6)
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# define TIVA_IRQ_GPIOP_7 (_NGPIONIRQS + 7)
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# define _NGPIOPIRQS (_NGPIONIRQS + 8)
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#else
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# define _NGPIOPIRQS _NGPIONIRQS
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#endif
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#if defined(CONFIG_TIVA_GPIOQ_IRQS)
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# define TIVA_IRQ_GPIOQ_0 (_NGPIOPIRQS + 0)
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# define TIVA_IRQ_GPIOQ_1 (_NGPIOPIRQS + 1)
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# define TIVA_IRQ_GPIOQ_2 (_NGPIOPIRQS + 2)
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# define TIVA_IRQ_GPIOQ_3 (_NGPIOPIRQS + 3)
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# define TIVA_IRQ_GPIOQ_4 (_NGPIOPIRQS + 4)
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# define TIVA_IRQ_GPIOQ_5 (_NGPIOPIRQS + 5)
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# define TIVA_IRQ_GPIOQ_6 (_NGPIOPIRQS + 6)
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# define TIVA_IRQ_GPIOQ_7 (_NGPIOPIRQS + 7)
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# define _NGPIOQIRQS (_NGPIOPIRQS + 8)
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#else
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# define _NGPIOQIRQS _NGPIOPIRQS
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#endif
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#define NR_GPIO_IRQS (_NGPIOTIRQS - NR_IRQS)
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/************************************************************************************
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* Public Function Prototypes
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************************************************************************************/
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* __ARCH_ARM_INCLUDE_TIVA_LM4F_IRQ_H */
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