3e45517599
Author: Alan Carvalho de Assis <acassis@gmail.com>
Check all .c and .h against nxstyle and fix it.
Author: Alin Jerpelea <alin.jerpelea@sony.com>
fs: smartfs: Fix over capacity write
When the remaining capacity of flash is one sector, if a new root
directory is created by file open, then the root directory's chain is
broken and it causes to SmartFS filesystem crash. Once this fatal
problem occurs, it's impossible to recover even if the system reboot.
Fix it by finally update link of root directory.
fs: smartfs: Fix buffer overrun
fs: smartfs: Fix uninitialized variable warnings
fs: smartfs: Memory leak fix
boards: cxd56xx: Update spresense board.h
- Fix PMIC assignment
- Add specific pin configurations for spresense
- Remove unnecessary definitions
arch: cxd56xx: Add ITM syslog init at startup
arch: cxd56xx: Enable DMA settings dynamically
222 lines
5.7 KiB
Plaintext
222 lines
5.7 KiB
Plaintext
############################################################################
|
|
# arch/arm/src/cxd56xx/Make.defs
|
|
#
|
|
# Copyright 2018 Sony Semiconductor Solutions Corporation
|
|
#
|
|
# Copyright (C) 2012-2015 Gregory Nutt. All rights reserved.
|
|
# Author: Gregory Nutt <gnutt@nuttx.org>
|
|
#
|
|
# Redistribution and use in source and binary forms, with or without
|
|
# modification, are permitted provided that the following conditions
|
|
# are met:
|
|
#
|
|
# 1. Redistributions of source code must retain the above copyright
|
|
# notice, this list of conditions and the following disclaimer.
|
|
# 2. Redistributions in binary form must reproduce the above copyright
|
|
# notice, this list of conditions and the following disclaimer in
|
|
# the documentation and/or other materials provided with the
|
|
# distribution.
|
|
# 3. Neither the name NuttX nor the names of its contributors may be
|
|
# used to endorse or promote products derived from this software
|
|
# without specific prior written permission.
|
|
#
|
|
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
|
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
|
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
|
# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
|
# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
|
# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
|
# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
# POSSIBILITY OF SUCH DAMAGE.
|
|
#
|
|
############################################################################
|
|
|
|
HEAD_ASRC =
|
|
|
|
CMN_ASRCS = up_saveusercontext.S up_fullcontextrestore.S up_switchcontext.S
|
|
CMN_ASRCS += up_testset.S vfork.S
|
|
|
|
ifeq ($(CONFIG_ARCH_SETJMP_H),y)
|
|
ifeq ($(CONFIG_ARCH_TOOLCHAIN_GNU),y)
|
|
CMN_ASRCS += up_setjmp.S
|
|
endif
|
|
endif
|
|
|
|
CMN_CSRCS = up_assert.c up_blocktask.c up_copyfullstate.c
|
|
CMN_CSRCS += up_createstack.c up_mdelay.c up_udelay.c up_exit.c
|
|
CMN_CSRCS += up_initialize.c up_initialstate.c up_interruptcontext.c
|
|
CMN_CSRCS += up_memfault.c up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c
|
|
CMN_CSRCS += up_releasepending.c up_releasestack.c up_reprioritizertr.c
|
|
CMN_CSRCS += up_schedulesigaction.c up_sigdeliver.c up_stackframe.c
|
|
CMN_CSRCS += up_unblocktask.c up_usestack.c up_doirq.c up_hardfault.c
|
|
CMN_CSRCS += up_svcall.c up_vfork.c
|
|
|
|
ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
|
|
CMN_ASRCS += up_lazyexception.S
|
|
else
|
|
CMN_ASRCS += up_exception.S
|
|
endif
|
|
CMN_CSRCS += up_vectors.c
|
|
|
|
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
|
|
CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_ARCH_MEMCPY),y)
|
|
CMN_ASRCS += up_memcpy.S
|
|
endif
|
|
|
|
ifeq ($(CONFIG_BUILD_PROTECTED),y)
|
|
CMN_CSRCS += up_mpu.c up_task_start.c up_pthread_start.c
|
|
CMN_CSRCS += up_signal_dispatch.c
|
|
CMN_UASRCS += up_signal_handler.S
|
|
endif
|
|
|
|
ifeq ($(CONFIG_STACK_COLORATION),y)
|
|
CMN_CSRCS += up_checkstack.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_ARCH_FPU),y)
|
|
CMN_ASRCS += up_fpu.S
|
|
ifneq ($(CONFIG_ARMV7M_CMNVECTOR),y)
|
|
CMN_CSRCS += up_copyarmstate.c
|
|
else ifeq ($(CONFIG_ARMV7M_LAZYFPU),y)
|
|
CMN_CSRCS += up_copyarmstate.c
|
|
endif
|
|
endif
|
|
|
|
ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)
|
|
CMN_CSRCS += up_itm_syslog.c
|
|
endif
|
|
|
|
CHIP_ASRCS += cxd56_farapistub.S
|
|
|
|
CHIP_CSRCS = cxd56_allocateheap.c cxd56_idle.c
|
|
CHIP_CSRCS += cxd56_uid.c
|
|
CHIP_CSRCS += cxd56_serial.c cxd56_uart.c cxd56_irq.c
|
|
CHIP_CSRCS += cxd56_start.c
|
|
CHIP_CSRCS += cxd56_timerisr.c
|
|
CHIP_CSRCS += cxd56_pinconfig.c
|
|
CHIP_CSRCS += cxd56_clock.c
|
|
CHIP_CSRCS += cxd56_delay.c
|
|
CHIP_CSRCS += cxd56_gpio.c
|
|
CHIP_CSRCS += cxd56_pmic.c
|
|
CHIP_CSRCS += cxd56_cpufifo.c
|
|
CHIP_CSRCS += cxd56_icc.c
|
|
CHIP_CSRCS += cxd56_powermgr.c
|
|
CHIP_CSRCS += cxd56_farapi.c
|
|
CHIP_CSRCS += cxd56_sysctl.c
|
|
|
|
ifeq ($(CONFIG_SMP), y)
|
|
CHIP_CSRCS += cxd56_cpuidlestack.c
|
|
CHIP_CSRCS += cxd56_cpuindex.c
|
|
CHIP_CSRCS += cxd56_cpupause.c
|
|
CHIP_CSRCS += cxd56_cpustart.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_UART0),y)
|
|
CHIP_CSRCS += cxd56_uart0.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_PM_PROCFS),y)
|
|
CHIP_CSRCS += cxd56_powermgr_procfs.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_RTC),y)
|
|
CHIP_CSRCS += cxd56_rtc.c
|
|
ifeq ($(CONFIG_RTC_DRIVER),y)
|
|
CHIP_CSRCS += cxd56_rtc_lowerhalf.c
|
|
endif
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_GPIO_IRQ),y)
|
|
CHIP_CSRCS += cxd56_gpioint.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_USBDEV),y)
|
|
CHIP_CSRCS += cxd56_usbdev.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_SDIO),y)
|
|
CHIP_CSRCS += cxd56_sdhci.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_SFC),y)
|
|
CHIP_CSRCS += cxd56_sfc.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_SPH),y)
|
|
CHIP_CSRCS += cxd56_sph.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_EMMC),y)
|
|
CHIP_CSRCS += cxd56_emmc.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_SPI),y)
|
|
CHIP_CSRCS += cxd56_spi.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_I2C),y)
|
|
CHIP_CSRCS += cxd56_i2c.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_DMAC),y)
|
|
CHIP_CSRCS += cxd56_dmac.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_PWM),y)
|
|
CHIP_CSRCS += cxd56_pwm.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_GAUGE),y)
|
|
CHIP_CSRCS += cxd56_gauge.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_CHARGER),y)
|
|
CHIP_CSRCS += cxd56_charger.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_GE2D),y)
|
|
CHIP_CSRCS += cxd56_ge2d.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_CISIF),y)
|
|
CHIP_CSRCS += cxd56_cisif.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_SCU),y)
|
|
CHIP_CSRCS += cxd56_scu.c cxd56_scufifo.c
|
|
ifeq ($(CONFIG_CXD56_ADC),y)
|
|
CHIP_CSRCS += cxd56_adc.c
|
|
endif
|
|
ifeq ($(CONFIG_CXD56_UDMAC),y)
|
|
CHIP_CSRCS += cxd56_udmac.c
|
|
endif
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_TIMER),y)
|
|
CHIP_CSRCS += cxd56_timer.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_WDT),y)
|
|
CHIP_CSRCS += cxd56_wdt.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_GNSS),y)
|
|
CHIP_CSRCS += cxd56_gnss.c
|
|
CHIP_CSRCS += cxd56_cpu1signal.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_GEOFENCE),y)
|
|
CHIP_CSRCS += cxd56_geofence.c
|
|
endif
|
|
|
|
ifeq ($(CONFIG_CXD56_BACKUPLOG),y)
|
|
CHIP_CSRCS += cxd56_backuplog.c
|
|
endif
|