145 lines
4.9 KiB
ArmAsm
145 lines
4.9 KiB
ArmAsm
/****************************************************************************
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* arch/xtensa/src/common/xtensa_panic.S
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*
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* Adapted from use in NuttX by:
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Derives from logic originally provided by Cadence Design Systems Inc.
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*
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* Copyright (c) 2006-2015 Cadence Design Systems Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice shall be included
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* in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
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* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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****************************************************************************/
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.file "xtensa_panic.S"
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/* NOTES on the use of 'call0' for long jumps instead of 'j':
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*
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* 1. This file should be assembled with the -mlongcalls option to xt-xcc.
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*
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* 2. The -mlongcalls compiler option causes 'call0 dest' to be expanded to
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* a sequence 'l32r a0, dest' 'callx0 a0' which works regardless of the
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* distance from the call to the destination. The linker then relaxes
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* it back to 'call0 dest' if it determines that dest is within range.
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* This allows more flexibility in locating code without the performance
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* overhead of the 'l32r' literal data load in cases where the destination
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* is in range of 'call0'. There is an additional benefit in that 'call0'
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* has a longer range than 'j' due to the target being word-aligned, so
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* the 'l32r' sequence is less likely needed.
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*
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* 3. The use of 'call0' with -mlongcalls requires that register a0 not be
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* live at the time of the call, which is always the case for a function
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* call but needs to be ensured if 'call0' is used as a jump in lieu of 'j'.
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*
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* 4. This use of 'call0' is independent of the C function call ABI.
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*/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/irq.h>
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#include <arch/xtensa/core.h>
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#include <arch/xtensa/xtensa_specregs.h>
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#include "chip_macros.h"
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: _xtensa_panic
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*
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* Description:
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* Should be reached by call0 (preferable) or jump only. If call0, a0 says
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* where from. If on simulator, display panic message and abort, else loop
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* indefinitely.
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*
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* Entry Conditions:
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* - A1 = Stack frame already allocated. SP points to beginning of the
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* register frame.
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* - A0, A1, A2, PC and PS = Already saved in the stack frame
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* - A2 = Exception code
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*
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* Exit conditions:
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* Does not return.
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*
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****************************************************************************/
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.section HANDLER_SECTION, "ax"
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.global _xtensa_panic
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.type _xtensa_panic, @function
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.align 4
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.literal_position
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.align 4
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_xtensa_panic:
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/* Save the exception code */
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wsr a2, EXCSAVE_1
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/* Save rest of interrupt context (A2=address of state save area on
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* stack.
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*/
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mov a2, sp /* Address of state save on stack */
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call0 _xtensa_context_save /* Save full register state */
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/* Save exc cause and vaddr into exception frame */
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rsr a0, EXCCAUSE
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s32i a0, sp, (4 * REG_EXCCAUSE)
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rsr a0, EXCVADDR
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s32i a0, sp, (4 * REG_EXCVADDR)
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/* Set up PS for C, reenable hi-pri interrupts, and clear EXCM. */
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#ifdef __XTENSA_CALL0_ABI__
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movi a0, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM
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#else
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movi a0, PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE
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#endif
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wsr a0, PS
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/* Call C panic handler: Arg1 (A2) = Exception code; Arg 2 (A3) = start
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* of the register save area.
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*/
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#ifdef __XTENSA_CALL0_ABI__
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rsr a2, EXCSAVE_1
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mov a3, sp
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call0 xtensa_panic /* Call xtensa_panic. Should not return */
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#else
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rsr a6, EXCSAVE_1
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mov a7, sp
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call4 xtensa_panic /* Call xtensa_panic. Should not return */
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#endif
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1: j 1b /* loop infinitely */
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retw
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