README
=====
This README file describes the port of NuttX to the SAMA5D3x-EK
development boards. These boards feature the Atmel SAMA5D3
microprocessors. Four different SAMA5D3x-EK kits are available
- SAMA5D31-EK with the ATSAMA5D31 (http://www.atmel.com/devices/sama5d31.aspx)
- SAMA5D33-EK with the ATSAMA5D33 (http://www.atmel.com/devices/sama5d33.aspx)
- SAMA5D34-EK with the ATSAMA5D34 (http://www.atmel.com/devices/sama5d34.aspx)
- SAMA5D35-EK with the ATSAMA5D35 (http://www.atmel.com/devices/sama5d35.aspx)
The each consist of an identical base board with different plug-in
modules for each CPU. I also have a 7 inch LCD for my SAMA5D3x-EK, but this
is not yet generally available..
SAMA5D3 Family
ATSAMA5D31 ATSAMA5D33 ATSAMA5D34 ATSAMA5D35
------------------------- ------------- ------------- ------------- -------------
Pin Count 324 324 324 324
Max. Operating Frequency 536 536 536 536
CPU Cortex-A5 Cortex-A5 Cortex-A5 Cortex-A5
Max I/O Pins 160 160 160 160
Ext Interrupts 160 160 160 160
USB Transceiver 3 3 3 3
USB Speed Hi-Speed Hi-Speed Hi-Speed Hi-Speed
USB Interface Host, Device Host, Device Host, Device Host, Device
SPI 6 6 6 6
TWI (I2C) 3 3 3 3
UART 7 5 5 7
CAN - - 2 2
LIN 4 4 4 4
SSC 2 2 2 2
Ethernet 1 1 1 2
SD / eMMC 3 2 3 3
Graphic LCD Yes Yes Yes -
Camera Interface Yes Yes Yes Yes
ADC channels 12 12 12 12
ADC Resolution (bits) 12 12 12 12
ADC Speed (ksps) 440 440 440 440
Resistive Touch Screen Yes Yes Yes Yes
Crypto Engine AES/DES/ AES/DES/ AES/DES/ AES/DES/
SHA/TRNG SHA/TRNG SHA/TRNG SHA/TRNG
SRAM (Kbytes) 128 128 128 128
External Bus Interface 1 1 1 1
DRAM Memory DDR2/LPDDR, DDR2/LPDDR, DDR2/LPDDR, DDR2/LPDDR,
SDRAM/LPSDR SDRAM/LPSDR DDR2/LPDDR, DDR2/LPDDR,
NAND Interface Yes Yes Yes Yes
Temp. Range (deg C) -40 to 85 -40 to 85 -40 to 85 -40 to 85
I/O Supply Class 1.8/3.3 1.8/3.3 1.8/3.3 1.8/3.3
Operating Voltage (Vcc) 1.08 to 1.32 1.08 to 1.32 1.08 to 1.32 1.08 to 1.32
FPU Yes Yes Yes Yes
MPU / MMU No/Yes No/Yes No/Yes No/Yes
Timers 5 5 5 6
Output Compare channels 6 6 6 6
Input Capture Channels 6 6 6 6
PWM Channels 4 4 4 4
32kHz RTC Yes Yes Yes Yes
Packages LFBGA324_A LFBGA324_A LFBGA324_A LFBGA324_A
Contents
========
- PIO Muliplexing
- Development Environment
- GNU Toolchain Options
- IDEs
- NuttX EABI "buildroot" Toolchain
- NuttX OABI "buildroot" Toolchain
- NXFLAT Toolchain
- Loading Code into SRAM with J-Link
- Writing to FLASH using SAM-BA
- Creating and Using NORBOOT
- Buttons and LEDs
- Serial Consoles
- SAMA5D3x-EK Configuration Options
- Configurations
PIO Muliplexing
===============
To be provided
Development Environment
=======================
Several possibile development enviorments may be use:
- Linux or OSX native
- Cygwin unders Windows
- MinGW + MSYS under Windows
- Windows native (with GNUMake from GNUWin32).
All testing has been performed using Cygwin under Windows.
The source has been built only using the GNU toolchain (see below). Other
toolchains will likely cause problems.
GNU Toolchain Options
=====================
The NuttX make system will support the several different toolchain options.
All testing has been conducted using the CodeSourcery GCC toolchain. To use
a different toolchain, you simply need to add change to one of the following
configuration options to your .config (or defconfig) file:
CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery under Windows
CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYL=y : CodeSourcery under Linux
CONFIG_ARMV7A_TOOLCHAIN_ATOLLIC=y : Atollic toolchain for Windos
CONFIG_ARMV7A_TOOLCHAIN_DEVKITARM=y : devkitARM under Windows
CONFIG_ARMV7A_TOOLCHAIN_BUILDROOT=y : NuttX buildroot under Linux or Cygwin (default)
CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIL=y : Generic GCC ARM EABI toolchain for Linux
CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y : Generic GCC ARM EABI toolchain for Windows
The CodeSourcery GCC toolchain is selected with
CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y and setting the PATH variable
appropriately.
If you are not using AtmelStudio GCC toolchain, then you may also have to
modify the PATH in the setenv.h file if your make cannot find the tools.
NOTE about Windows native toolchains
------------------------------------
There are several limitations to using a Windows based toolchain in a
Cygwin environment. The three biggest are:
1. The Windows toolchain cannot follow Cygwin paths. Path conversions are
performed automatically in the Cygwin makefiles using the 'cygpath'
utility but you might easily find some new path problems. If so, check
out 'cygpath -w'
2. Windows toolchains cannot follow Cygwin symbolic links. Many symbolic
links are used in Nuttx (e.g., include/arch). The make system works
around these problems for the Windows tools by copying directories
instead of linking them. But this can also cause some confusion for
you: For example, you may edit a file in a "linked" directory and find
that your changes had no effect. That is because you are building the
copy of the file in the "fake" symbolic directory. If you use a\
Windows toolchain, you should get in the habit of making like this:
make clean_context all
An alias in your .bashrc file might make that less painful.
3. Dependencies are not made when using Windows versions of the GCC. This is
because the dependencies are generated using Windows pathes which do not
work with the Cygwin make.
MKDEP = $(TOPDIR)/tools/mknulldeps.sh
NOTE 1: Older CodeSourcery toolchains (2009q1) do not work with default
optimization level of -Os (See Make.defs). It will work with -O0, -O1, or
-O2, but not with -Os.
NOTE 2: The devkitARM toolchain includes a version of MSYS make. Make sure that
the paths to Cygwin's /bin and /usr/bin directories appear BEFORE the devkitARM
path or will get the wrong version of make.
IDEs
====
NuttX is built using command-line make. It can be used with an IDE, but some
effort will be required to create the project (There is a simple RIDE project
in the RIDE subdirectory).
Makefile Build
--------------
Under Eclipse, it is pretty easy to set up an "empty makefile project" and
simply use the NuttX makefile to build the system. That is almost for free
under Linux. Under Windows, you will need to set up the "Cygwin GCC" empty
makefile project in order to work with Windows (Google for "Eclipse Cygwin" -
there is a lot of help on the internet).
Native Build
------------
Here are a few tips before you start that effort:
1) Select the toolchain that you will be using in your .config file
2) Start the NuttX build at least one time from the Cygwin command line
before trying to create your project. This is necessary to create
certain auto-generated files and directories that will be needed.
3) Set up include pathes: You will need include/, arch/arm/src/sam34,
arch/arm/src/common, arch/arm/src/armv7-m, and sched/.
4) All assembly files need to have the definition option -D __ASSEMBLY__
on the command line.
Startup files will probably cause you some headaches. The NuttX startup file
is arch/arm/src/sam34/sam_vectors.S. You may need to build NuttX
one time from the Cygwin command line in order to obtain the pre-built
startup object needed by RIDE.
NuttX EABI "buildroot" Toolchain
================================
A GNU GCC-based toolchain is assumed. The files */setenv.sh should
be modified to point to the correct path to the Cortex-M3 GCC toolchain (if
different from the default in your PATH variable).
If you have no Cortex-M3 toolchain, one can be downloaded from the NuttX
SourceForge download site (https://sourceforge.net/projects/nuttx/files/buildroot/).
This GNU toolchain builds and executes in the Linux or Cygwin environment.
1. You must have already configured Nuttx in <some-dir>/nuttx.
cd tools
./configure.sh sama5d3x-ek/<sub-dir>
2. Download the latest buildroot package into <some-dir>
3. unpack the buildroot tarball. The resulting directory may
have versioning information on it like buildroot-x.y.z. If so,
rename <some-dir>/buildroot-x.y.z to <some-dir>/buildroot.
4. cd <some-dir>/buildroot
5. cp configs/cortexm3-eabi-defconfig-4.6.3 .config
6. make oldconfig
7. make
8. Edit setenv.h, if necessary, so that the PATH variable includes
the path to the newly built binaries.
See the file configs/README.txt in the buildroot source tree. That has more
details PLUS some special instructions that you will need to follow if you are
building a Cortex-M3 toolchain for Cygwin under Windows.
NOTE: Unfortunately, the 4.6.3 EABI toolchain is not compatible with the
the NXFLAT tools. See the top-level TODO file (under "Binary loaders") for
more information about this problem. If you plan to use NXFLAT, please do not
use the GCC 4.6.3 EABI toochain; instead use the GCC 4.3.3 OABI toolchain.
See instructions below.
NuttX OABI "buildroot" Toolchain
================================
The older, OABI buildroot toolchain is also available. To use the OABI
toolchain, use the build instructtions above, but (1) modify the
cortexm3-eabi-defconfig-4.6.3 configuration to use OABI (using 'make
menuconfig'), or (2) use an exising OABI configuration such as
cortexm3-defconfig-4.3.3
NXFLAT Toolchain
================
If you are *not* using the NuttX buildroot toolchain and you want to use
the NXFLAT tools, then you will still have to build a portion of the buildroot
tools -- just the NXFLAT tools. The buildroot with the NXFLAT tools can
be downloaded from the NuttX SourceForge download site
(https://sourceforge.net/projects/nuttx/files/).
This GNU toolchain builds and executes in the Linux or Cygwin environment.
1. You must have already configured Nuttx in <some-dir>/nuttx.
cd tools
./configure.sh sama5d3x-ek/<sub-dir>
2. Download the latest buildroot package into <some-dir>
3. unpack the buildroot tarball. The resulting directory may
have versioning information on it like buildroot-x.y.z. If so,
rename <some-dir>/buildroot-x.y.z to <some-dir>/buildroot.
4. cd <some-dir>/buildroot
5. cp configs/cortexm3-defconfig-nxflat .config
6. make oldconfig
7. make
8. Edit setenv.h, if necessary, so that the PATH variable includes
the path to the newly built NXFLAT binaries.
Loading Code into SRAM with J-Link
==================================
Loading code with the Segger tools and GDB
------------------------------------------
1) Change directories into the directory where you built NuttX.
2) Start the GDB server and wait until it is ready to accept GDB
connections.
3) Then run GDB like this:
$ arm-none-eabi-gdb
(gdb) target remote localhost:2331
(gdb) mon reset
(gdb) load nuttx
(gdb) ... start debugging ...
Loading code using J-Link Commander
----------------------------------
J-Link> r
J-Link> loadbin <file> <address>
J-Link> setpc <address of __start>
J-Link> ... start debugging ...
Writing to FLASH using SAM-BA
=============================
Assumed starting configuration:
1. You have installed the J-Lnk CDC USB driver (Windows only, there is
no need to install a driver on any regular Linux distribution),
2. You have the USB connected to DBGU poort (J14)
3. Terminal configuration: 115200 8N1
Using SAM-BA to write to FLASH:
1. Exit the terminal emulation program and remove the USB cable from
the DBGU port (J14)
2. Connect the USB cable to the device USB port (J20)
3. JP9 must open (BMS == 1) to boot from on-chip Boot ROM.
4. Press and maintain PB4 CS_BOOT button and power up the board. PB4
CS_BOOT button prevents booting from Nand or serial Flash by
disabling Flash Chip Selects after having powered the board, you can
release the PB4 BS_BOOT button.
5. On Windows you may need to wait for a device driver to be installed.
6. Start the SAM-BA application, selecting (1) the correct USB serial
port, and (2) board = at91sama5d3x-ek.
7. The SAM-BA menu should appear.
8. Select the FLASH bank that you want to use and the address to write
to and "Execute"
9. When you are finished writing to FLASH, remove the USB cable from J20
and re-connect the serial link on USB CDC / DBGU connector (J14) and
re-open the terminal emulator program.
10. If you loaded code in NOR flash (CS0), then you will need to close
JP9 (BMS == 0) to force booting out of NOR flash (see NOTE).
11. Power cycle the board.
NOTES: By closing JP9 (BMS == 0), you can force the board to boot
directly to NOR FLASH. Executing from other memories will require that
you provide a special code header so that you code can be recognized as a
boot-able image by the ROM bootloader.
Creating and Using NORBOOT
==========================
In order to have more control of debugging code that runs out of NOR FLASH,
I created the sama5d3x-ek/norboot configuration. That configuration is
described below under "Configurations."
Here are some general instructions on how to build an use norboot:
Building:
1. Remove any old configurations (if applicable).
cd <nuttx>
make distclean
2. Install and build the norboot configuration:
cd tools
./configure.sh sama5d3x-ek/<subdir>
cd -
. ./setenv.sh
Before sourcing the setenv.sh file above, you should examine it and
perform edits as necessary so that TOOLCHAIN_BIN is the correct path
to the directory than holds your toolchain binaries.
3. Rename the binaries. Since you will need two versions of NuttX: this
norboot version that runs in internal SRAM and another under test in
NOR FLASH, I rename the resulting binary files so that they can be
distinguished:
mv nuttx norboot
mv nuttx.hex norboot.hex
mv nuttx.bin norboot.bin
4. Build your NOR configuration and write this into NOR FLASH. Here, for
example, is how you would create the NSH NOR configuration:
cd <nuttx>
make distclean # Remove the norboot configuration
cd tools
./configure.sh sama5d3x-ek/nsh # Establish the NSH configuration
cd -
make # Build the NSH configuration
Then use SAM-BA to write the nuttx.bin binary into NOR FLASH. This
will involve holding the CS_BOOT button and power cycling to start
the ROM loader. The SAM-BA serial connection will be on the device
USB port, not the debug USB port. Follow the SAM-BA instruction to
write the nuttx.bin binary to NOR FLASH.
5. Restart the system without holding CS_BOOT to get back to the normal
debug setup.
6. Then start the J-Link GDB server and GDB. In GDB, I do the following:
(gdb) mon reset # Reset and halt the CPU
(gdb) load norboot # Load norboot into internal SRAM
(gdb) mon go # Start norboot
(gdb) mon halt # Break in
(gdb) mon reg pc = 0x10000040 # Set the PC to NOR flash entry point
(gdb) mon go # And jump into NOR flash
The norboot program can also be configured to jump directly into
NOR FLASH with out requiring the the final halt and go, but since I
have been debugging the early boot sequence, the above sequence has
been most convenient for me.
STATUS:
2013-7-30: I have been unable to execute this configuration from NOR
FLASH by closing the BMS jumper (J9). As far as I can tell, this
jumper does nothing on my board??? So I have been using the norboot
configuration exclusively to start the program-under-test in NOR FLASH.
Buttons and LEDs
================
Buttons
-------
There are five push button switches on the SAMA5D3X-EK base board:
1. One Reset, board reset (BP1)
2. One Wake up, push button to bring the processor out of low power mode
(BP2)
3. One User momentary Push Button
4. One Disable CS Push Button
Only the momentary push button is controllable by software (labeled
"PB_USER1" on the board):
- PE27. Pressing the switch connect PE27 to grounded. Therefore, PE27
must be pulled high internally. When the button is pressed the SAMA5
will sense "0" is on PE27.
LEDs
----
There are two LEDs on the SAMA5D3 series-CM board that can be controlled
by software. A blue LED is controlled via GPIO pins. A red LED normally
provides an indication that power is supplied to the board but can also
be controlled via software.
PE25. This blue LED is pulled high and is illuminated by pulling PE25
low.
PE24. The red LED is also pulled high but is driven by a transistor so
that it is illuminated when power is applied even if PE24 is not
configured as an output. If PE24 is configured as an output, then the
LCD is illuminated by a high output.
These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
defined. In that case, the usage by the board port is defined in
include/board.h and src/sam_leds.c. The LEDs are used to encode OS-related
events as follows:
SYMBOL Meaning LED state
Blue Red
------------------- ----------------------- -------- --------
LED_STARTED NuttX has been started OFF OFF
LED_HEAPALLOCATE Heap has been allocated OFF OFF
LED_IRQSENABLED Interrupts enabled OFF OFF
LED_STACKCREATED Idle stack created ON OFF
LED_INIRQ In an interrupt No change
LED_SIGNAL In a signal handler No change
LED_ASSERTION An assertion failed No change
LED_PANIC The system has crashed OFF Blinking
LED_IDLE MCU is is sleep mode Not used
Thus if the blue LED is statically on, NuttX has successfully booted and
is, apparently, running normmally. If the red is flashing at
approximately 2Hz, then a fatal error has been detected and the system
has halted.
Serial Consoles
===============
USART1
------
By default USART1 is used as the NuttX serial console in all
configurations (unless otherwise noted). USART1 is buffered with an
RS-232 Transceiver (Analog Devices ADM3312EARU) and connected to the DB-9
male socket (J8).
USART1 Connector J8
-------------------------------
SAMA5 FUNCTION NUTTX GPIO
PIO NAME CONFIGURATION
---- ---------- ---------------
PB27 RTS1 GPIO_USART1_RTS
PB29 TXD1 GPIO_USART1_TXD
PB28 RXD1 GPIO_USART1_RXD
PB26 CTS1 GPIO_USART1_CTS
NOTE: Debug TX and RX pins also go the the ADM3312EARU, but I am
uncertain of the functionality.
-------------------------------
SAMA5 FUNCTION NUTTX GPIO
PIO NAME CONFIGURATION
---- ---------- ---------------
PB31 DTXD GPIO_DBGU_DTXD
PB30 DRXD GPIO_DBGU_DRXD
Hardware UART via CDC
---------------------
"J-Link-OB-ATSAM3U4C comes with an additional hardware UART that is
accessible from a host via CDC which allows terminal communication with
the target device. This feature is enabled only if a certain port (CDC
disabled, PA25, pin 24 on J-Link-OB-ATSAM3U4C) is NOT connected to ground
(open).
- Jumper JP16 not fitted: CDC is enabled
- Jumper JP16 fitted : CDC is disabled"
SAMA5D3x-EK Configuration Options
=================================
CONFIG_ARCH - Identifies the arch/ subdirectory. This should
be set to:
CONFIG_ARCH="arm"
CONFIG_ARCH_family - For use in C code:
CONFIG_ARCH_ARM=y
CONFIG_ARCH_architecture - For use in C code:
CONFIG_ARCH_CORTEXA5=y
CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
CONFIG_ARCH_CHIP="sama5"
CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
chip:
CONFIG_ARCH_CHIP_SAMA5=y
and one of:
CONFIG_ARCH_CHIP_ATSAMA5D31=y
CONFIG_ARCH_CHIP_ATSAMA5D33=y
CONFIG_ARCH_CHIP_ATSAMA5D34=y
CONFIG_ARCH_CHIP_ATSAMA5D35=y
CONFIG_ARCH_BOARD - Identifies the configs subdirectory and
hence, the board that supports the particular chip or SoC.
CONFIG_ARCH_BOARD="sama5d3x-ek" (for the SAMA5D3x-EK development board)
CONFIG_ARCH_BOARD_name - For use in C code
CONFIG_ARCH_BOARD_SAMA5D3X_EK=y
CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
of delay loops
CONFIG_ENDIAN_BIG - define if big endian (default is little
endian)
CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
CONFIG_RAM_SIZE=0x0002000 (128Kb)
CONFIG_RAM_START - The physical start address of installed DRAM
CONFIG_RAM_START=0x20000000
CONFIG_RAM_VSTART - The virutal start address of installed DRAM
CONFIG_RAM_VSTART=0x20000000
CONFIG_ARCH_IRQPRIO - The SAM3UF103Z supports interrupt prioritization
CONFIG_ARCH_IRQPRIO=y
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
have LEDs
CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
stack. If defined, this symbol is the size of the interrupt
stack in bytes. If not defined, the user task stacks will be
used during interrupt handling.
CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
CONFIG_ARCH_CALIBRATION - Enables some build in instrumentation that
cause a 100 second delay during boot-up. This 100 second delay
serves no purpose other than it allows you to calibratre
CONFIG_ARCH_LOOPSPERMSEC. You simply use a stop watch to measure
the 100 second delay then adjust CONFIG_ARCH_LOOPSPERMSEC until
the delay actually is 100 seconds.
Individual subsystems can be enabled:
CONFIG_SAMA5_DBGU - Debug Unit Interrupt
CONFIG_SAMA5_PIT - Periodic Interval Timer Interrupt
CONFIG_SAMA5_WDT - Watchdog timer Interrupt
CONFIG_SAMA5_HSMC - Multi-bit ECC Interrupt
CONFIG_SAMA5_SMD - SMD Soft Modem
CONFIG_SAMA5_USART0 - USART 0
CONFIG_SAMA5_USART1 - USART 1
CONFIG_SAMA5_USART2 - USART 2
CONFIG_SAMA5_USART3 - USART 3
CONFIG_SAMA5_UART0 - UART 0
CONFIG_SAMA5_UART1 - UART 1
CONFIG_SAMA5_TWI0 - Two-Wire Interface 0
CONFIG_SAMA5_TWI1 - Two-Wire Interface 1
CONFIG_SAMA5_TWI2 - Two-Wire Interface 2
CONFIG_SAMA5_HSMCI0 - High Speed Multimedia Card Interface 0
CONFIG_SAMA5_HSMCI1 - High Speed Multimedia Card Interface 1
CONFIG_SAMA5_HSMCI2 - High Speed Multimedia Card Interface 2
CONFIG_SAMA5_SPI0 - Serial Peripheral Interface 0
CONFIG_SAMA5_SPI1 - Serial Peripheral Interface 1
CONFIG_SAMA5_TC0 - Timer Counter 0 (ch. 0, 1, 2)
CONFIG_SAMA5_TC1 - Timer Counter 1 (ch. 3, 4, 5)
CONFIG_SAMA5_PWM - Pulse Width Modulation Controller
CONFIG_SAMA5_ADC - Touch Screen ADC Controller
CONFIG_SAMA5_DMAC0 - DMA Controller 0
CONFIG_SAMA5_DMAC1 - DMA Controller 1
CONFIG_SAMA5_UHPHS - USB Host High Speed
CONFIG_SAMA5_UDPHS - USB Device High Speed
CONFIG_SAMA5_GMAC - Gigabit Ethernet MAC
CONFIG_SAMA5_EMAC - Ethernet MAC
CONFIG_SAMA5_LCDC - LCD Controller
CONFIG_SAMA5_ISI - Image Sensor Interface
CONFIG_SAMA5_SSC0 - Synchronous Serial Controller 0
CONFIG_SAMA5_SSC1 - Synchronous Serial Controller 1
CONFIG_SAMA5_CAN0 - CAN controller 0
CONFIG_SAMA5_CAN1 - CAN controller 1
CONFIG_SAMA5_SHA - Secure Hash Algorithm
CONFIG_SAMA5_AES - Advanced Encryption Standard
CONFIG_SAMA5_TDES - Triple Data Encryption Standard
CONFIG_SAMA5_TRNG - True Random Number Generator
CONFIG_SAMA5_ARM - Performance Monitor Unit
CONFIG_SAMA5_FUSE - Fuse Controller
CONFIG_SAMA5_MPDDRC - MPDDR controller
Some subsystems can be configured to operate in different ways. The drivers
need to know how to configure the subsystem.
CONFIG_PIOA_IRQ - Support PIOA interrupts
CONFIG_PIOB_IRQ - Support PIOB interrupts
CONFIG_PIOC_IRQ - Support PIOD interrupts
CONFIG_PIOD_IRQ - Support PIOD interrupts
CONFIG_PIOE_IRQ - Support PIOE interrupts
CONFIG_USART0_ISUART - USART0 is configured as a UART
CONFIG_USART1_ISUART - USART1 is configured as a UART
CONFIG_USART2_ISUART - USART2 is configured as a UART
CONFIG_USART3_ISUART - USART3 is configured as a UART
ST91SAM4S specific device driver settings
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=0,1,2,3) or UART
m (m=4,5) for the console and ttys0 (default is the USART1).
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
This specific the size of the receive buffer
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
being sent. This specific the size of the transmit buffer
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
CONFIG_U[S]ARTn_2STOP - Two stop bits
Configurations
==============
Information Common to All Configurations
----------------------------------------
Each SAM3U-EK configuration is maintained in a sub-directory and
can be selected as follow:
cd tools
./configure.sh sama5d3x-ek/<subdir>
cd -
. ./setenv.sh
Before sourcing the setenv.sh file above, you should examine it and perform
edits as necessary so that TOOLCHAIN_BIN is the correct path to the directory
than holds your toolchain binaries.
And then build NuttX by simply typing the following. At the conclusion of
the make, the nuttx binary will reside in an ELF file called, simply, nuttx.
make
The <subdir> that is provided above as an argument to the tools/configure.sh
must be is one of the following.
NOTES:
1. These configurations use the mconf-based configuration tool. To
change any of these configurations using that tool, you should:
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
and misc/tools/
b. Execute 'make menuconfig' in nuttx/ in order to start the
reconfiguration process.
2. Unless stated otherwise, all configurations generate console
output on UART0 (J3).
3. Unless otherwise stated, the configurations are setup for
Linux (or any other POSIX environment like Cygwin under Windows):
Build Setup:
CONFIG_HOST_LINUX=y : Linux or other POSIX environment
4. All of these configurations use the Code Sourcery for Windows toolchain
(unless stated otherwise in the description of the configuration). That
toolchain selection can easily be reconfigured using 'make menuconfig'.
Here are the relevant current settings:
Build Setup:
CONFIG_HOST_WINDOS=y : Microsoft Windows
CONFIG_WINDOWS_CYGWIN=y : Using Cygwin or other POSIX environment
System Type -> Toolchain:
CONFIG_ARMV7A_TOOLCHAIN_GNU_EABIW=y : GNU EABI toolchain for windows
That same configuration will work with Atmel GCC toolchain. The only
change required to use the Atmel GCC toolchain is to change the PATH
variable so that those tools are selected instead of the CodeSourcery
tools. Try 'which arm-none-eabi-gcc' to make sure that you are
selecting the right tool.
The setenv.sh file is available for you to use to set the PATH
variable. The path in the that file may not, however, be correct
for your installation.
See also the "NOTE about Windows native toolchains" in the section call
"GNU Toolchain Options" above.
Configuration sub-directories
-----------------------------
hello:
This configuration directory, performs the (almost) simplest of all
possible examples: examples/hello. This just comes up, says hello
on the serial console and terminates. This configuration is of
value during bring-up because it is small and can run entirely out
of internal SRAM.
NOTES:
1. This configuration uses the default USART1 serial console. That
is easily changed by reconfiguring to (1) enable a different
serial peripheral, and (2) selecting that serial peripheral as
the console device.
2. By default, this configuration is set up to build on Windows
under either a Cygwin or MSYS environment using a recent, Windows-
native, generic ARM EABI GCC toolchain (such as the CodeSourcery
toolchain). Both the build environment and the toolchain
selection can easily be changed by reconfiguring:
CONFIG_HOST_WINDOWS=y : Windows operating system
CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows
CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows
3. This configuration executes out of internal SRAM and can only
be loaded via JTAG.
CONFIG_SAMA5_BOOT_ISRAM=y : Boot into internal SRAM
CONFIG_BOOT_RUNFROMISRAM=y : Run from internal SRAM
STATUS:
2013-7-19: This configuration (as do the others) run at 396MHz.
The SAMA5D3 can run at 536MHz. I still need to figure out the
PLL settings to get that speed.
2013-7-28: This configuration was verified functional.
2013-7-31: Delay loop calibrated.
norboot:
This is a little program to help debug of code in NOR flash. It
does the following:
- It enables and configures NOR FLASH, then
- Waits for you to break in with GDB.
At that point, you can set the PC and begin executing from NOR FLASH
under debug control.
NOTES:
1. This program derives from the hello configuration. All of the
notes there apply to this configuration as well.
STATUS:
2013-7-19: This configuration (as do the others) run at 396MHz.
The SAMA5D3 can run at 536MHz. I still need to figure out the
PLL settings to get that speed.
2013-7-31: Delay loop calibrated.
nsh:
This configuration directory provide the NuttShell (NSH).
NOTES:
1. This configuration uses the default USART1 serial console. That
is easily changed by reconfiguring to (1) enable a different
serial peripheral, and (2) selecting that serial peripheral as
the console device.
2. By default, this configuration is set up to build on Windows
under either a Cygwin or MSYS environment using a recent, Windows-
native, generic ARM EABI GCC toolchain (such as the CodeSourcery
toolchain). Both the build environment and the toolchain
selection can easily be changed by reconfiguring:
CONFIG_HOST_WINDOWS=y : Windows operating system
CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows
CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows
3. This configuration executes out of CS0 NOR flash and can only
be loaded via SAM-BA. These are the relevant configuration options
the define the NOR FLASH configuration:
CONFIG_SAMA5_BOOT_CS0FLASH=y : Boot from FLASH on CS0
CONFIG_BOOT_RUNFROMFLASH=y : Run in place on FLASH (vs copying to RAM)
CONFIG_SAMA5_EBICS0=y : Enable CS0 external memory
CONFIG_SAMA5_EBICS0_SIZE=134217728 : Memory size is 128KB
CONFIG_SAMA5_EBICS0_NOR=y : Memory type is NOR FLASH
CONFIG_FLASH_START=0x10000000 : Physical FLASH start address
CONFIG_FLASH_VSTART=0x10000000 : Virtual FLASH start address
CONFIG_FLASH_SIZE=134217728 : FLASH size (again)
CONFIG_RAM_START=0x00300400 : Data stored after page table
CONFIG_RAM_VSTART=0x00300400
CONFIG_RAM_SIZE=114688 : Available size of 128KB - 16KB for page table
NOTE: In order to boot in this configuration, you need to close the
BMS jumper.
4. This configuration has support for NSH built-in applications enabled.
However, no built-in applications are selected in the base configuration.
5. SDRAM support can be enabled by adding the following to your NuttX
configuration file:
System Type->ATSAMA5 Peripheral Support
CONFIG_SAMA5_MPDDRC=y : Enable the DDR controller
System Type->External Memory Configuration
CONFIG_SAMA5_DDRCS=y : Tell the system that DRAM is at the DDR CS
CONFIG_SAMA5_DDRCS_SIZE=268435456 : 2Gb DRAM -> 256GB
CONFIG_SAMA5_DDRCS_LPDDR2=y : Its DDR2
CONFIG_SAMA5_MT47H128M16RT=y : This is the type of DDR2
Now that you have SDRAM enabled, what are you going to do with it? One
thing you can is add it to the heap
System Type->Heap Configuration
CONFIG_SAMA5_DDRCS_HEAP=y : Add the SDRAM to the heap
Memory Management
CONFIG_MM_REGIONS=2 : Two memory regions: ISRAM and SDRAM
Another thing you could do is to enable the RAM test built-in
application:
6. You can enable the NuttX RAM test that may be used to verify the
external SDAM. To do this, keep the SDRAM out of the heap so that
it can be tested without crashing programs using the memory:
System Type->Heap Configuration
CONFIG_SAMA5_DDRCS_HEAP=n : Don't add the SDRAM to the heap
Memory Management
CONFIG_MM_REGIONS=1 : One memory regions: ISRAM
Then enable the RAM test built-in application:
Application Configuration->System NSH Add-Ons->Ram Test
CONFIG_SYSTEM_RAMTEST=y
In this configuration, the SDRAM is not added to heap and so is not
excessible to the applications. So the RAM test can be freely
executed against the SRAM memory beginning at address 0x2000:0000
(DDR CS):
nsh> ramtest -h
Usage: <noname> [-w|h|b] <hex-address> <decimal-size>
Where:
<hex-address> starting address of the test.
<decimal-size> number of memory locations (in bytes).
-w Sets the width of a memory location to 32-bits.
-h Sets the width of a memory location to 16-bits (default).
-b Sets the width of a memory location to 8-bits.
To test the entire external 256MB SRAM:
nsh> ramtest -w 20000000 268435456
RAMTest: Marching ones: 20000000 268435456
RAMTest: Marching zeroes: 20000000 268435456
RAMTest: Pattern test: 20000000 268435456 55555555 aaaaaaaa
RAMTest: Pattern test: 20000000 268435456 66666666 99999999
RAMTest: Pattern test: 20000000 268435456 33333333 cccccccc
RAMTest: Address-in-address test: 20000000 268435456
STATUS:
2013-7-19: This configuration (as do the others) run at 396MHz.
The SAMA5D3 can run at 536MHz. I still need to figure out the
PLL settings to get that speed.
If the CPU speed changes, then so must the NOR and SDRAM
initialization!
2013-7-31: I have been unable to execute this configuration from NOR
FLASH by closing the BMS jumper (J9). As far as I can tell, this
jumper does nothing on my board??? I have been using the norboot
configuration to start the program in NOR FLASH (see just above).
See "Creating and Using NORBOOT" above.
2013-7-31: This NSH configuration appears to be fully functional.
2013-7-31: Using delay loop calibration from the hello configuration.
That configuration runs out of internal SRAM and, as a result, this
configuration needs to be recalibrated.
2013-8-3: SDRAM configuration and RAM test usage have been verified
and are functional. I not some issues now; Occassionally, SDRAM is
not functional on initial boot. Or is initially not functional but
improves with accesses. Clearly, more work needs to be done.
Here is another strange observation: SDRAM accesses tend to
generate occasional spurious interrupts in those same conditions
where the memory test fails! No idea why.
ostest:
This configuration directory, performs a simple OS test using
examples/ostest.
NOTES:
1. This configuration uses the default USART1 serial console. That
is easily changed by reconfiguring to (1) enable a different
serial peripheral, and (2) selecting that serial peripheral as
the console device.
2. By default, this configuration is set up to build on Windows
under either a Cygwin or MSYS environment using a recent, Windows-
native, generic ARM EABI GCC toolchain (such as the CodeSourcery
toolchain). Both the build environment and the toolchain
selection can easily be changed by reconfiguring:
CONFIG_HOST_WINDOWS=y : Windows operating system
CONFIG_WINDOWS_CYGWIN=y : POSIX environment under windows
CONFIG_ARMV7A_TOOLCHAIN_CODESOURCERYW=y : CodeSourcery for Windows
3. This configuration executes out of CS0 NOR flash and can only
be loaded via SAM-BA. These are the relevant configuration options
the define the NOR FLASH configuration:
CONFIG_SAMA5_BOOT_CS0FLASH=y : Boot from FLASH on CS0
CONFIG_BOOT_RUNFROMFLASH=y : Run in place on FLASH (vs copying to RAM)
CONFIG_SAMA5_EBICS0=y : Enable CS0 external memory
CONFIG_SAMA5_EBICS0_SIZE=134217728 : Memory size is 128KB
CONFIG_SAMA5_EBICS0_NOR=y : Memory type is NOR FLASH
CONFIG_FLASH_START=0x10000000 : Physical FLASH start address
CONFIG_FLASH_VSTART=0x10000000 : Virtual FLASH start address
CONFIG_FLASH_SIZE=134217728 : FLASH size (again)
CONFIG_RAM_START=0x00300400 : Data stored after page table
CONFIG_RAM_VSTART=0x00300400
CONFIG_RAM_SIZE=114688 : Available size of 128KB - 16KB for page table
NOTE: In order to boot in this configuration, you need to close the
BMS jumper.
STATUS:
2013-7-19: This configuration (as do the others) run at 396MHz.
The SAMA5D3 can run at 536MHz. I still need to figure out the
PLL settings to get that speed.
If the CPU speed changes, then so must the NOR and SDRAM
initialization!
2013-7-30: I have been unable to execute this configuration from NOR
FLASH by closing the BMS jumper (J9). As far as I can tell, this
jumper does nothing on my board??? I have been using the norboot
configuration to start the program in NOR FLASH (see just above).
See "Creating and Using NORBOOT" above.
2013-7-31: The OS test configuration is basically functional, but
takes a very long time in the round-robin scheduler test computing
prime numbers. This test is supposed to be slow -- like several
seconds -- but not many minutes. No idea why yet. The best guess
would be an excessive number of context switches.
2013-7-31: Using delay loop calibration from the hello configuration.
That configuration runs out of internal SRAM and, as a result, this
configuration needs to be recalibrated.
