42a0796615
sched/semaphore: Add nxsem_post() which is identical to sem_post() except that it never modifies the errno variable. Changed all references to sem_post in the OS to nxsem_post().
sched/semaphore: Add nxsem_destroy() which is identical to sem_destroy() except that it never modifies the errno variable. Changed all references to sem_destroy() in the OS to nxsem_destroy().
libc/semaphore and sched/semaphore: Add nxsem_getprotocol() and nxsem_setprotocola which are identical to sem_getprotocol() and set_setprotocol() except that they never modifies the errno variable. Changed all references to sem_setprotocol in the OS to nxsem_setprotocol(). sem_getprotocol() was not used in the OS
959 lines
26 KiB
C
959 lines
26 KiB
C
/****************************************************************************
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* drivers/ioexpander/pca9555.c
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*
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* Copyright (C) 2015, 2016 Gregory Nutt. All rights reserved.
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* Author: Sebastien Lorquet <sebastien@lorquet.fr>
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*
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* References:
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* "16-bit I2C-bus and SMBus I/O port with interrupt product datasheet",
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* Rev. 08 - 22 October 2009, NXP
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <semaphore.h>
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#include <assert.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/irq.h>
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#include <nuttx/i2c/i2c_master.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/ioexpander/ioexpander.h>
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#include "pca9555.h"
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#if defined(CONFIG_IOEXPANDER_PCA9555)
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#ifndef CONFIG_I2C
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# warning I2C support is required (CONFIG_I2C)
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#endif
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static inline int pca9555_write(FAR struct pca9555_dev_s *pca,
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FAR const uint8_t *wbuffer, int wbuflen);
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static inline int pca9555_writeread(FAR struct pca9555_dev_s *pca,
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FAR const uint8_t *wbuffer, int wbuflen, FAR uint8_t *rbuffer,
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int rbuflen);
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static int pca9555_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int dir);
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static int pca9555_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int opt, void *val);
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static int pca9555_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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bool value);
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static int pca9555_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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FAR bool *value);
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static int pca9555_readbuf(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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FAR bool *value);
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#ifdef CONFIG_IOEXPANDER_MULTIPIN
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static int pca9555_multiwritepin(FAR struct ioexpander_dev_s *dev,
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FAR uint8_t *pins, FAR bool *values, int count);
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static int pca9555_multireadpin(FAR struct ioexpander_dev_s *dev,
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FAR uint8_t *pins, FAR bool *values, int count);
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static int pca9555_multireadbuf(FAR struct ioexpander_dev_s *dev,
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FAR uint8_t *pins, FAR bool *values, int count);
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#endif
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#ifdef CONFIG_IOEXPANDER_INT_ENABLE
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static FAR void *pca9555_attach(FAR struct ioexpander_dev_s *dev,
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ioe_pinset_t pinset, ioe_callback_t callback, FAR void *arg);
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static int pca9555_detach(FAR struct ioexpander_dev_s *dev,
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FAR void *handle);
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#endif
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/****************************************************************************
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* Private Data
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****************************************************************************/
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#ifndef CONFIG_PCA9555_MULTIPLE
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/* If only a single PCA9555 device is supported, then the driver state
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* structure may as well be pre-allocated.
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*/
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static struct pca9555_dev_s g_pca9555;
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/* Otherwise, we will need to maintain allocated driver instances in a list */
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#else
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static struct pca9555_dev_s *g_pca9555list;
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#endif
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/* I/O expander vtable */
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static const struct ioexpander_ops_s g_pca9555_ops =
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{
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pca9555_direction,
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pca9555_option,
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pca9555_writepin,
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pca9555_readpin,
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pca9555_readbuf
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#ifdef CONFIG_IOEXPANDER_MULTIPIN
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, pca9555_multiwritepin
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, pca9555_multireadpin
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, pca9555_multireadbuf
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#endif
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#ifdef CONFIG_IOEXPANDER_INT_ENABLE
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, pca9555_attach
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, pca9555_detach
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#endif
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};
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: pca9555_lock
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*
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* Description:
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* Get exclusive access to the PCA9555
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*
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****************************************************************************/
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static void pca9555_lock(FAR struct pca9555_dev_s *pca)
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{
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while (sem_wait(&pca->exclsem) < 0)
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{
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/* EINTR is the only expected error from sem_wait() */
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DEBUGASSERT(errno == EINTR);
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}
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}
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#define pca9555_unlock(p) nxsem_post(&(p)->exclsem)
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/****************************************************************************
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* Name: pca9555_write
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*
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* Description:
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* Write to the I2C device.
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*
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****************************************************************************/
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static inline int pca9555_write(FAR struct pca9555_dev_s *pca,
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FAR const uint8_t *wbuffer, int wbuflen)
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{
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struct i2c_msg_s msg;
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int ret;
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/* Setup for the transfer */
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msg.frequency = pca->config->frequency;
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msg.addr = pca->config->address;
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msg.flags = 0;
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msg.buffer = (FAR uint8_t *)wbuffer; /* Override const */
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msg.length = wbuflen;
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/* Then perform the transfer. */
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ret = I2C_TRANSFER(pca->i2c, &msg, 1);
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return (ret >= 0) ? OK : ret;
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}
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/****************************************************************************
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* Name: pca9555_writeread
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*
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* Description:
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* Write to then read from the I2C device.
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*
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****************************************************************************/
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static inline int pca9555_writeread(FAR struct pca9555_dev_s *pca,
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FAR const uint8_t *wbuffer, int wbuflen,
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FAR uint8_t *rbuffer, int rbuflen)
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{
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struct i2c_config_s config;
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/* Set up the configuration and perform the write-read operation */
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config.frequency = pca->config->frequency;
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config.address = pca->config->address;
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config.addrlen = 7;
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return i2c_writeread(pca->i2c, &config, wbuffer, wbuflen, rbuffer, rbuflen);
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}
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/****************************************************************************
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* Name: pca9555_setbit
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*
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* Description:
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* Write a bit in a register pair
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*
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****************************************************************************/
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static int pca9555_setbit(FAR struct pca9555_dev_s *pca, uint8_t addr,
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uint8_t pin, int bitval)
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{
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uint8_t buf[2];
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int ret;
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if (pin > 15)
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{
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return -ENXIO;
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}
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else if (pin > 7)
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{
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addr++;
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pin -= 8;
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}
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buf[0] = addr;
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#ifdef CONFIG_PCA9555_SHADOW_MODE
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/* Get the shadowed register value */
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buf[1] = pca->sreg[addr];
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#else
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/* Get the register value from the IO-Expander */
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ret = pca9555_writeread(pca, &buf[0], 1, &buf[1], 1);
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if (ret < 0)
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{
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return ret;
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}
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#endif
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if (bitval)
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{
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buf[1] |= (1 << pin);
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}
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else
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{
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buf[1] &= ~(1 << pin);
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}
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#ifdef CONFIG_PCA9555_SHADOW_MODE
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/* Save the new register value in the shadow register */
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pca->sreg[addr] = buf[1];
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#endif
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ret = pca9555_write(pca, buf, 2);
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#ifdef CONFIG_PCA9555_RETRY
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if (ret != OK)
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{
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/* Try again (only once) */
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ret = pca9555_write(pca, buf, 2);
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}
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#endif
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return ret;
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}
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/****************************************************************************
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* Name: pca9555_getbit
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*
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* Description:
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* Get a bit from a register pair
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*
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****************************************************************************/
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static int pca9555_getbit(FAR struct pca9555_dev_s *pca, uint8_t addr,
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uint8_t pin, FAR bool *val)
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{
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uint8_t buf;
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int ret;
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if (pin > 15)
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{
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return -ENXIO;
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}
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else if (pin > 7)
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{
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addr += 1;
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pin -= 8;
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}
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ret = pca9555_writeread(pca, &addr, 1, &buf, 1);
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if (ret < 0)
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{
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return ret;
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}
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#ifdef CONFIG_PCA9555_SHADOW_MODE
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/* Save the new register value in the shadow register */
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pca->sreg[addr] = buf;
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#endif
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*val = (buf >> pin) & 1;
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return OK;
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}
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/****************************************************************************
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* Name: pca9555_direction
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*
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* Description:
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* Set the direction of an ioexpander pin. Required.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin to alter in this call
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* dir - One of the IOEXPANDER_DIRECTION_ macros
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int pca9555_direction(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int direction)
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{
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FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
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int ret;
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/* Get exclusive access to the PCA555 */
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pca9555_lock(pca);
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ret = pca9555_setbit(pca, PCA9555_REG_CONFIG, pin,
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(direction == IOEXPANDER_DIRECTION_IN));
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pca9555_unlock(pca);
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return ret;
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}
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/****************************************************************************
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* Name: pca9555_option
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*
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* Description:
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* Set pin options. Required.
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* Since all IO expanders have various pin options, this API allows setting
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* pin options in a flexible way.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin to alter in this call
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* opt - One of the IOEXPANDER_OPTION_ macros
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* val - The option's value
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int pca9555_option(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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int opt, FAR void *val)
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{
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FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
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int ret = -EINVAL;
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if (opt == IOEXPANDER_OPTION_INVERT)
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{
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int ival = (int)((intptr_t)val);
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/* Get exclusive access to the PCA555 */
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pca9555_lock(pca);
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ret = pca9555_setbit(pca, PCA9555_REG_POLINV, pin, ival);
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pca9555_unlock(pca);
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}
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return ret;
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}
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/****************************************************************************
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* Name: pca9555_writepin
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*
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* Description:
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* Set the pin level. Required.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin to alter in this call
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* val - The pin level. Usually TRUE will set the pin high,
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* except if OPTION_INVERT has been set on this pin.
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int pca9555_writepin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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bool value)
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{
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FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
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int ret;
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/* Get exclusive access to the PCA555 */
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pca9555_lock(pca);
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ret = pca9555_setbit(pca, PCA9555_REG_OUTPUT, pin, value);
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pca9555_unlock(pca);
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return ret;
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}
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/****************************************************************************
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* Name: pca9555_readpin
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*
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* Description:
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* Read the actual PIN level. This can be different from the last value written
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* to this pin. Required.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin
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* valptr - Pointer to a buffer where the pin level is stored. Usually TRUE
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* if the pin is high, except if OPTION_INVERT has been set on this pin.
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int pca9555_readpin(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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FAR bool *value)
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{
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FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
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int ret;
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/* Get exclusive access to the PCA555 */
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pca9555_lock(pca);
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ret = pca9555_getbit(pca, PCA9555_REG_INPUT, pin, value);
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pca9555_unlock(pca);
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return ret;
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}
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/****************************************************************************
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* Name: pca9555_readbuf
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*
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* Description:
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* Read the buffered pin level.
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* This can be different from the actual pin state. Required.
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*
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* Input Parameters:
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* dev - Device-specific state data
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* pin - The index of the pin
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* valptr - Pointer to a buffer where the level is stored.
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*
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* Returned Value:
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* 0 on success, else a negative error code
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*
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****************************************************************************/
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static int pca9555_readbuf(FAR struct ioexpander_dev_s *dev, uint8_t pin,
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FAR bool *value)
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{
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FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
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int ret;
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/* Get exclusive access to the PCA555 */
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pca9555_lock(pca);
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ret = pca9555_getbit(pca, PCA9555_REG_OUTPUT, pin, value);
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pca9555_unlock(pca);
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return ret;
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}
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|
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#ifdef CONFIG_IOEXPANDER_MULTIPIN
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|
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/****************************************************************************
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* Name: pca9555_getmultibits
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*
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* Description:
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* Read multiple bits from PCA9555 registers.
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*
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****************************************************************************/
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static int pca9555_getmultibits(FAR struct pca9555_dev_s *pca, uint8_t addr,
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FAR uint8_t *pins, FAR bool *values,
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int count)
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{
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uint8_t buf[2];
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int ret = OK;
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int i;
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int index;
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int pin;
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ret = pca9555_writeread(pca, &addr, 1, buf, 2);
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if (ret < 0)
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{
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return ret;
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}
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#ifdef CONFIG_PCA9555_SHADOW_MODE
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/* Save the new register value in the shadow register */
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pca->sreg[addr] = buf[0];
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pca->sreg[addr+1] = buf[1];
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#endif
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/* Read the requested bits */
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for (i = 0; i < count; i++)
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{
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index = 0;
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pin = pins[i];
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if (pin > 15)
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{
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return -ENXIO;
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}
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else if (pin > 7)
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{
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index = 1;
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pin -= 8;
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}
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values[i] = (buf[index] >> pin) & 1;
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}
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return OK;
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}
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/****************************************************************************
|
|
* Name: pca9555_multiwritepin
|
|
*
|
|
* Description:
|
|
* Set the pin level for multiple pins. This routine may be faster than
|
|
* individual pin accesses. Optional.
|
|
*
|
|
* Input Parameters:
|
|
* dev - Device-specific state data
|
|
* pins - The list of pin indexes to alter in this call
|
|
* val - The list of pin levels.
|
|
*
|
|
* Returned Value:
|
|
* 0 on success, else a negative error code
|
|
*
|
|
****************************************************************************/
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|
|
|
static int pca9555_multiwritepin(FAR struct ioexpander_dev_s *dev,
|
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FAR uint8_t *pins, FAR bool *values,
|
|
int count)
|
|
{
|
|
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
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uint8_t addr = PCA9555_REG_OUTPUT;
|
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uint8_t buf[3];
|
|
int ret;
|
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int i;
|
|
int index;
|
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int pin;
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|
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/* Get exclusive access to the PCA555 */
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|
|
pca9555_lock(pca);
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|
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/* Start by reading both registers, whatever the pins to change. We could
|
|
* attempt to read one port only if all pins were on the same port, but
|
|
* this would not save much.
|
|
*/
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|
|
|
#ifndef CONFIG_PCA9555_SHADOW_MODE
|
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ret = pca9555_writeread(pca, &addr, 1, &buf[1], 2);
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|
if (ret < 0)
|
|
{
|
|
pca9555_unlock(pca);
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return ret;
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}
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#else
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/* In Shadow-Mode we "read" the pin status from the shadow registers */
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buf[1] = pca->sreg[addr];
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buf[2] = pca->sreg[addr+1];
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#endif
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|
|
|
/* Apply the user defined changes */
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|
|
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for (i = 0; i < count; i++)
|
|
{
|
|
index = 1;
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pin = pins[i];
|
|
if (pin > 15)
|
|
{
|
|
pca9555_unlock(pca);
|
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return -ENXIO;
|
|
}
|
|
else if (pin > 7)
|
|
{
|
|
index = 2;
|
|
pin -= 8;
|
|
}
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|
|
|
if (values[i])
|
|
{
|
|
buf[index] |= (1 << pin);
|
|
}
|
|
else
|
|
{
|
|
buf[index] &= ~(1 << pin);
|
|
}
|
|
}
|
|
|
|
/* Now write back the new pins states */
|
|
|
|
buf[0] = addr;
|
|
#ifdef CONFIG_PCA9555_SHADOW_MODE
|
|
/* Save the new register values in the shadow register */
|
|
pca->sreg[addr] = buf[1];
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pca->sreg[addr+1] = buf[2];
|
|
#endif
|
|
ret = pca9555_write(pca, buf, 3);
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|
|
|
pca9555_unlock(pca);
|
|
return ret;
|
|
}
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|
|
|
/****************************************************************************
|
|
* Name: pca9555_multireadpin
|
|
*
|
|
* Description:
|
|
* Read the actual level for multiple pins. This routine may be faster than
|
|
* individual pin accesses. Optional.
|
|
*
|
|
* Input Parameters:
|
|
* dev - Device-specific state data
|
|
* pin - The list of pin indexes to read
|
|
* valptr - Pointer to a buffer where the pin levels are stored.
|
|
*
|
|
* Returned Value:
|
|
* 0 on success, else a negative error code
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int pca9555_multireadpin(FAR struct ioexpander_dev_s *dev,
|
|
FAR uint8_t *pins, FAR bool *values,
|
|
int count)
|
|
{
|
|
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
|
|
int ret;
|
|
|
|
/* Get exclusive access to the PCA555 */
|
|
|
|
pca9555_lock(pca);
|
|
ret = pca9555_getmultibits(pca, PCA9555_REG_INPUT,
|
|
pins, values, count);
|
|
pca9555_unlock(pca);
|
|
return ret;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: pca9555_multireadbuf
|
|
*
|
|
* Description:
|
|
* Read the buffered level of multiple pins. This routine may be faster than
|
|
* individual pin accesses. Optional.
|
|
*
|
|
* Input Parameters:
|
|
* dev - Device-specific state data
|
|
* pin - The index of the pin
|
|
* valptr - Pointer to a buffer where the buffered levels are stored.
|
|
*
|
|
* Returned Value:
|
|
* 0 on success, else a negative error code
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int pca9555_multireadbuf(FAR struct ioexpander_dev_s *dev,
|
|
FAR uint8_t *pins, FAR bool *values,
|
|
int count)
|
|
{
|
|
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
|
|
int ret;
|
|
|
|
/* Get exclusive access to the PCA555 */
|
|
|
|
pca9555_lock(pca);
|
|
ret = pca9555_getmultibits(pca, PCA9555_REG_OUTPUT,
|
|
pins, values, count);
|
|
pca9555_unlock(pca);
|
|
return ret;
|
|
}
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_PCA9555_INT_ENABLE
|
|
|
|
/****************************************************************************
|
|
* Name: pca9555_attach
|
|
*
|
|
* Description:
|
|
* Attach and enable a pin interrupt callback function.
|
|
*
|
|
* Input Parameters:
|
|
* dev - Device-specific state data
|
|
* pinset - The set of pin events that will generate the callback
|
|
* callback - The pointer to callback function. NULL will detach the
|
|
* callback.
|
|
* arg - User-provided callback argument
|
|
*
|
|
* Returned Value:
|
|
* A non-NULL handle value is returned on success. This handle may be
|
|
* used later to detach and disable the pin interrupt.
|
|
*
|
|
****************************************************************************/
|
|
|
|
static FAR void *pca9555_attach(FAR struct ioexpander_dev_s *dev,
|
|
ioe_pinset_t pinset, ioe_callback_t callback,
|
|
FAR void *arg)
|
|
{
|
|
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
|
|
FAR void *handle = NULL;
|
|
int i;
|
|
|
|
/* Get exclusive access to the PCA555 */
|
|
|
|
pca9555_lock(pca);
|
|
|
|
/* Find and available in entry in the callback table */
|
|
|
|
for (i = 0; i < CONFIG_PCA9555_INT_NCALLBACKS; i++)
|
|
{
|
|
/* Is this entry available (i.e., no callback attached) */
|
|
|
|
if (pca->cb[i].cbfunc == NULL)
|
|
{
|
|
/* Yes.. use this entry */
|
|
|
|
pca->cb[i].pinset = pinset;
|
|
pca->cb[i].cbfunc = callback;
|
|
pca->cb[i].cbarg = arg;
|
|
handle = &pca->cb[i];
|
|
break;
|
|
}
|
|
}
|
|
|
|
/* Add this callback to the table */
|
|
|
|
pca9555_unlock(pca);
|
|
return handle;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: pca9555_detach
|
|
*
|
|
* Description:
|
|
* Detach and disable a pin interrupt callback function.
|
|
*
|
|
* Input Parameters:
|
|
* dev - Device-specific state data
|
|
* handle - The non-NULL opaque value return by pca9555_attch()
|
|
*
|
|
* Returned Value:
|
|
* 0 on success, else a negative error code
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int pca9555_detach(FAR struct ioexpander_dev_s *dev, FAR void *handle)
|
|
{
|
|
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)dev;
|
|
FAR struct pca9555_callback_s *cb = (FAR struct pca9555_callback_s *)handle;
|
|
|
|
DEBUGASSERT(pca != NULL && cb != NULL);
|
|
DEBUGASSERT((uintptr_t)cb >= (uintptr_t)&pca->cb[0] &&
|
|
(uintptr_t)cb <= (uintptr_t)&pca->cb[CONFIG_TCA64XX_INT_NCALLBACKS-1]);
|
|
UNUSED(pca);
|
|
|
|
cb->pinset = 0;
|
|
cb->cbfunc = NULL;
|
|
cb->cbarg = NULL;
|
|
return OK;
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: pca9555_irqworker
|
|
*
|
|
* Description:
|
|
* Handle GPIO interrupt events (this function actually executes in the
|
|
* context of the worker thread).
|
|
*
|
|
****************************************************************************/
|
|
|
|
static void pca9555_irqworker(void *arg)
|
|
{
|
|
FAR struct pca9555_dev_s *pca = (FAR struct pca9555_dev_s *)arg;
|
|
uint8_t addr = PCA9555_REG_INPUT;
|
|
uint8_t buf[2];
|
|
ioe_pinset_t pinset;
|
|
int ret;
|
|
int i;
|
|
|
|
/* Read inputs */
|
|
|
|
ret = pca9555_writeread(pca, &addr, 1, buf, 2);
|
|
if (ret == OK)
|
|
{
|
|
#ifdef CONFIG_PCA9555_SHADOW_MODE
|
|
/* Don't forget to update the shadow registers at this point */
|
|
|
|
pca->sreg[addr] = buf[0];
|
|
pca->sreg[addr+1] = buf[1];
|
|
#endif
|
|
/* Create a 16-bit pinset */
|
|
|
|
pinset = ((unsigned int)buf[0] << 8) | buf[1];
|
|
|
|
/* Perform pin interrupt callbacks */
|
|
|
|
for (i = 0; i < CONFIG_PCA9555_INT_NCALLBACKS; i++)
|
|
{
|
|
/* Is this entry valid (i.e., callback attached)? If so, did
|
|
* any of the requested pin interrupts occur?
|
|
*/
|
|
|
|
if (pca->cb[i].cbfunc != NULL)
|
|
{
|
|
/* Did any of the requested pin interrupts occur? */
|
|
|
|
ioe_pinset_t match = pinset & pca->cb[i].pinset;
|
|
if (match != 0)
|
|
{
|
|
/* Yes.. perform the callback */
|
|
|
|
(void)pca->cb[i].cbfunc(&pca->dev, match,
|
|
pca->cb[i].cbarg);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
/* Re-enable interrupts */
|
|
|
|
pca->config->enable(pca->config, TRUE);
|
|
}
|
|
|
|
/****************************************************************************
|
|
* Name: pca9555_interrupt
|
|
*
|
|
* Description:
|
|
* Handle GPIO interrupt events (this function executes in the
|
|
* context of the interrupt).
|
|
*
|
|
****************************************************************************/
|
|
|
|
static int pca9555_interrupt(int irq, FAR void *context)
|
|
{
|
|
#ifdef CONFIG_PCA9555_MULTIPLE
|
|
/* To support multiple devices,
|
|
* retrieve the pca structure using the irq number.
|
|
*/
|
|
|
|
# warning Missing logic
|
|
|
|
#else
|
|
register FAR struct pca9555_dev_s *pca = &g_pca9555;
|
|
#endif
|
|
|
|
/* In complex environments, we cannot do I2C transfers from the interrupt
|
|
* handler because semaphores are probably used to lock the I2C bus. In
|
|
* this case, we will defer processing to the worker thread. This is also
|
|
* much kinder in the use of system resources and is, therefore, probably
|
|
* a good thing to do in any event.
|
|
*/
|
|
|
|
/* Notice that further GPIO interrupts are disabled until the work is
|
|
* actually performed. This is to prevent overrun of the worker thread.
|
|
* Interrupts are re-enabled in pca9555_irqworker() when the work is
|
|
* completed.
|
|
*/
|
|
|
|
if (work_available(&pca->work))
|
|
{
|
|
pca->config->enable(pca->config, FALSE);
|
|
work_queue(HPWORK, &pca->work, pca9555_irqworker,
|
|
(FAR void *)pca, 0);
|
|
}
|
|
|
|
return OK;
|
|
}
|
|
|
|
#endif
|
|
|
|
/****************************************************************************
|
|
* Public Functions
|
|
****************************************************************************/
|
|
|
|
/****************************************************************************
|
|
* Name: pca9555_initialize
|
|
*
|
|
* Description:
|
|
* Initialize a PCA9555 I2C device.
|
|
*
|
|
* TODO: Actually support more than one device.
|
|
*
|
|
****************************************************************************/
|
|
|
|
FAR struct ioexpander_dev_s *pca9555_initialize(FAR struct i2c_master_s *i2cdev,
|
|
FAR struct pca9555_config_s *config)
|
|
{
|
|
FAR struct pca9555_dev_s *pcadev;
|
|
|
|
DEBUGASSERT(i2cdev != NULL && config != NULL);
|
|
|
|
#ifdef CONFIG_PCA9555_MULTIPLE
|
|
/* Allocate the device state structure */
|
|
|
|
pcadev = (FAR struct pca9555_dev_s *)kmm_zalloc(sizeof(struct pca9555_dev_s));
|
|
if (!pcadev)
|
|
{
|
|
return NULL;
|
|
}
|
|
|
|
/* And save the device structure in the list of PCA9555 so that we can
|
|
* find it later.
|
|
*/
|
|
|
|
pcadev->flink = g_pca9555list;
|
|
g_pca9555list = pcadev;
|
|
|
|
#else
|
|
/* Use the one-and-only PCA9555 driver instance */
|
|
|
|
pcadev = &g_pca9555;
|
|
#endif
|
|
|
|
/* Initialize the device state structure */
|
|
|
|
pcadev->i2c = i2cdev;
|
|
pcadev->dev.ops = &g_pca9555_ops;
|
|
pcadev->config = config;
|
|
|
|
#ifdef CONFIG_PCA9555_INT_ENABLE
|
|
pcadev->config->attach(pcadev->config, pca9555_interrupt);
|
|
pcadev->config->enable(pcadev->config, TRUE);
|
|
#endif
|
|
|
|
nxsem_init(&pcadev->exclsem, 0, 1);
|
|
return &pcadev->dev;
|
|
}
|
|
|
|
#endif /* CONFIG_IOEXPANDER_PCA9555 */
|