Gregory Nutt 588d2b506f Xtensa ESP32: Oddly, an rsync barrier when writing to co-processor register corrects problem.		2016-12-21 08:04:48 -06:00
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core.h	Add logic to attach inter-CPU interrupts. Fix some compilation errors.	2016-10-30 16:15:04 -06:00
xtensa_coproc.h	Xtensa ESP32: Oddly, an rsync barrier when writing to co-processor register corrects problem.	2016-12-21 08:04:48 -06:00
xtensa_corebits.h	Xtensa: Add interrupt enable/disable controls. Add dummy timer and IRQ initialization.	2016-10-23 08:00:17 -06:00
xtensa_specregs.h	Xtensa: Add interrupt enable/disable controls. Add dummy timer and IRQ initialization.	2016-10-23 08:00:17 -06:00