2a228e8650
Squashed commit of the following:
arch/arm/include: Add interrupt IRQ numbers.
tools/: Add support for the S32K1XX family.
86 lines
3.9 KiB
C
86 lines
3.9 KiB
C
/************************************************************************************
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* arch/arm/include/x32k1xx/chip.h
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*
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* Copyright (C) 2019 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_INCLUDE_S32K1XX_CHIP_H
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#define __ARCH_ARM_INCLUDE_S32K1XX_CHIP_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* NVIC priority levels *************************************************************/
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/* Each priority field holds a priority value. The lower the value, the greater the
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* priority of the corresponding interrupt.
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*/
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#if defined(CONFIG_ARCH_CORTEXM4)
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/* The Cortex-M4F core supports 16 programmable interrupt priority levels. */
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# define NVIC_SYSH_PRIORITY_MIN 0xf0 /* All bits[7:4] set is minimum priority */
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# define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
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# define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
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# define NVIC_SYSH_PRIORITY_STEP 0x10 /* Steps between priorities */
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#elif defined(CONFIG_ARCH_CORTEXM0)
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/* The Cortex-M0+ core supports 4 programmable interrupt priority levels. */
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# define NVIC_SYSH_PRIORITY_MIN 0xc0 /* All bits[7:4] set is minimum priority */
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# define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
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# define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
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# define NVIC_SYSH_PRIORITY_STEP 0x40 /* Steps between priorities */
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#endif
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_INCLUDE_S32K1XX_CHIP_H */
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