Jukka Laitinen 6a5d00f68c arch/risc-v/src/mpfs: Add CFG_DDR_SGMII_PHY_RPC156 register setting for DDR training ... Decreasing the value may increase DQ/DQS window size. Keep the default value (1) for the existing board configurations. Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>		2023-08-17 17:50:37 +08:00
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.gitignore
board_liberodefs.h	arch/risc-v/src/mpfs: Add CFG_DDR_SGMII_PHY_RPC156 register setting for DDR training	2023-08-17 17:50:37 +08:00
board_memorymap.h
board.h
boot_romfsimg.h