Xiang Xiao 80277d1630 Refine the preprocessor conditional guard style (#190)		2020-01-31 19:07:39 +01:00
..
fe310	Remove exra whitespace from files (#189)	2020-01-31 09:24:49 -06:00
gap8	This commit brings in support for the GAP8 architecture. The GAP8 is a 1+8-core DSP-like RISC-V MCU. Also included is support for the Gapuino GAP8 evaluation board.	2018-10-30 09:38:50 -06:00
k210	Remove exra whitespace from files (#189)	2020-01-31 09:24:49 -06:00
nr5m100	Remove exra whitespace from files (#189)	2020-01-31 09:24:49 -06:00
rv32im	Refine the preprocessor conditional guard style (#190)	2020-01-31 19:07:39 +01:00
rv64gc	Refine the preprocessor conditional guard style (#190)	2020-01-31 19:07:39 +01:00
.gitignore	Remove exra whitespace from files (#189)	2020-01-31 09:24:49 -06:00
arch.h	Remove exra whitespace from files (#189)	2020-01-31 09:24:49 -06:00
inttypes.h	Add architecture-specific inttypes.h	2016-10-27 16:01:38 -04:00
irq.h	Feature k210 smp (#71)	2020-01-10 08:04:41 -06:00
limits.h	Squashed commit of the following:	2019-12-31 09:06:20 -06:00
spinlock.h	Fix typos and some incorrect comments	2020-01-20 09:32:36 -03:00
stdarg.h	Add support for the RISC-V architecture and configs/nr5m100-nexys4 board. I will be making the FPGA code for this available soon (within a week I would say). The board support on this is pretty thin, but it seems like maybe a good idea to get the base RISC-V stuff in since there are people interested in it.	2016-10-16 09:47:07 -06:00
syscall.h	Remove exra whitespace from files (#189)	2020-01-31 09:24:49 -06:00
types.h	Feature k210 smp (#71)	2020-01-10 08:04:41 -06:00