Jinliang Li a5bfbca869 arm/armv8-r: invalidate d-cache on boot ... Pass CP15_CACHE_INVALIDATE argument with r1 register to cp15_dcache_op_level. cache level is 0(L1 D-Cache) with r0 register. prototype: void cp15_dcache_op_level(uint32_t level, int op) Signed-off-by: Jinliang Li <lijinliang1@lixiang.com>		2024-08-16 13:41:19 +08:00
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include	types.h: fix windows build error	2024-08-14 22:36:57 +08:00
src	arm/armv8-r: invalidate d-cache on boot	2024-08-16 13:41:19 +08:00
CMakeLists.txt
Kconfig	arm:Select ram vector on armv6m	2024-08-12 00:09:56 +08:00