169 lines
5.2 KiB
C
169 lines
5.2 KiB
C
/****************************************************************************
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* arch/arm/src/armv7-m/arm_initialstate.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <string.h>
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#include <nuttx/arch.h>
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#include <arch/armv7-m/nvicpri.h>
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#include "arm_internal.h"
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#include "psr.h"
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#include "exc_return.h"
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: up_initial_state
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*
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* Description:
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* A new thread is being started and a new TCB
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* has been created. This function is called to initialize
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* the processor specific portions of the new TCB.
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*
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* This function must setup the initial architecture registers
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* and/or stack so that execution will begin at tcb->start
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* on the next context switch.
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*
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****************************************************************************/
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void up_initial_state(struct tcb_s *tcb)
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{
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struct xcptcontext *xcp = &tcb->xcp;
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/* Initialize the initial exception register context structure */
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memset(xcp, 0, sizeof(struct xcptcontext));
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/* Initialize the idle thread stack */
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if (tcb->pid == IDLE_PROCESS_ID)
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{
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tcb->stack_alloc_ptr = (void *)(g_idle_topstack -
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CONFIG_IDLETHREAD_STACKSIZE);
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tcb->stack_base_ptr = tcb->stack_alloc_ptr;
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tcb->adj_stack_size = CONFIG_IDLETHREAD_STACKSIZE;
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#ifdef CONFIG_STACK_COLORATION
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/* If stack debug is enabled, then fill the stack with a
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* recognizable value that we can use later to test for high
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* water marks.
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*/
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arm_stack_color(tcb->stack_alloc_ptr, 0);
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#endif /* CONFIG_STACK_COLORATION */
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return;
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}
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/* Initialize the context registers to stack top */
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xcp->regs = (void *)((uint32_t)tcb->stack_base_ptr +
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tcb->adj_stack_size -
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XCPTCONTEXT_SIZE);
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/* Initialize the xcp registers */
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memset(xcp->regs, 0, XCPTCONTEXT_SIZE);
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/* Save the initial stack pointer */
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xcp->regs[REG_SP] = (uint32_t)tcb->stack_base_ptr +
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tcb->adj_stack_size;
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#ifdef CONFIG_ARMV7M_STACKCHECK
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/* Set the stack limit value */
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xcp->regs[REG_R10] = (uint32_t)tcb->stack_alloc_ptr + 64;
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#endif
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/* Save the task entry point (stripping off the thumb bit) */
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xcp->regs[REG_PC] = (uint32_t)tcb->start & ~1;
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/* Specify thumb mode */
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xcp->regs[REG_XPSR] = ARMV7M_XPSR_T;
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/* If this task is running PIC, then set the PIC base register to the
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* address of the allocated D-Space region.
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*/
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#ifdef CONFIG_PIC
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if (tcb->dspace != NULL)
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{
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/* Set the PIC base register (probably R10) to the address of the
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* alloacated D-Space region.
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*/
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xcp->regs[REG_PIC] = (uint32_t)tcb->dspace->region;
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}
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#ifdef CONFIG_NXFLAT
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/* Make certain that bit 0 is set in the main entry address. This
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* is only an issue when NXFLAT is enabled. NXFLAT doesn't know
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* anything about thumb; the addresses that NXFLAT sets are based
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* on file header info and won't have bit 0 set.
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*/
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tcb->entry.main = (main_t)((uint32_t)tcb->entry.main | 1);
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#endif
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#endif /* CONFIG_PIC */
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/* All tasks start via a stub function in kernel space. So all
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* tasks must start in privileged thread mode. If CONFIG_BUILD_PROTECTED
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* is defined, then that stub function will switch to unprivileged
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* mode before transferring control to the user task.
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*/
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xcp->regs[REG_EXC_RETURN] = EXC_RETURN_PRIVTHR;
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#ifdef CONFIG_ARCH_FPU
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xcp->regs[REG_FPSCR] = 0; /* REVISIT: Initial FPSCR should be configurable */
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#endif /* CONFIG_ARCH_FPU */
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/* Enable or disable interrupts, based on user configuration */
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#ifdef CONFIG_SUPPRESS_INTERRUPTS
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#ifdef CONFIG_ARMV7M_USEBASEPRI
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xcp->regs[REG_BASEPRI] = NVIC_SYSH_DISABLE_PRIORITY;
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#else
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xcp->regs[REG_PRIMASK] = 1;
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#endif
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#else /* CONFIG_SUPPRESS_INTERRUPTS */
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#ifdef CONFIG_ARMV7M_USEBASEPRI
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xcp->regs[REG_BASEPRI] = NVIC_SYSH_PRIORITY_MIN;
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#endif
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#endif /* CONFIG_SUPPRESS_INTERRUPTS */
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}
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