hujun5 a4fece3450 spin_lock: inline spin_lock ... test: We can use qemu for testing. compiling make distclean -j20; ./tools/configure.sh -l qemu-armv8a:nsh_smp ;make -j20 running qemu-system-aarch64 -cpu cortex-a53 -smp 4 -nographic -machine virt,virtualization=on,gic-version=3 -net none -chardev stdio,id=con,mux=on -serial chardev:con -mon chardev=con,mode=readline -kernel ./nuttx		2024-07-15 02:29:30 +08:00
..
hardware
.gitignore
bl602_allocateheap.c	arch/risc-v: Make bl602 allocate idle stack after ebss	2024-05-06 15:04:24 -03:00
bl602_boot2.h
bl602_config.h
bl602_dma.c
bl602_dma.h
bl602_efuse.c
bl602_efuse.h
bl602_flash.c
bl602_flash.h
bl602_glb.c
bl602_glb.h
bl602_gpio.c
bl602_gpio.h
bl602_hbn.c
bl602_hbn.h
bl602_head.S	arch/risc-v: Make bl602 allocate idle stack after ebss	2024-05-06 15:04:24 -03:00
bl602_i2c.c
bl602_i2c.h
bl602_irq_dispatch.c	arch/risc-v: initial qemu-rv64ilp32 support	2024-06-14 19:50:00 +08:00
bl602_irq.c	arch/riscv: force using encoding macro for CSR access	2024-04-11 10:43:48 +08:00
bl602_lowputc.c
bl602_lowputc.h
bl602_netdev.c
bl602_netdev.h
bl602_oneshot_lowerhalf.c
bl602_oneshot_lowerhalf.h
bl602_os_hal.c	Replace all asserts in kernel code with ASSERT	2024-05-17 10:18:16 -03:00
bl602_os_hal.h
bl602_pwm_lowerhalf.c
bl602_pwm_lowerhalf.h
bl602_romapi.h
bl602_rtc_lowerhalf.c
bl602_rtc.c
bl602_rtc.h
bl602_serial.c	spin_lock: inline spin_lock	2024-07-15 02:29:30 +08:00
bl602_spi.c
bl602_spi.h
bl602_spiflash.c
bl602_spiflash.h
bl602_start.c	arch/risc-v: remove g_cpux_idlestack	2024-05-11 17:57:59 +02:00
bl602_systemreset.c
bl602_systemreset.h
bl602_tim_lowerhalf.c
bl602_tim_lowerhalf.h
bl602_tim.c
bl602_tim.h
bl602_timerisr.c
bl602_wdt_lowerhalf.c
bl602_wdt_lowerhalf.h
chip.h
Kconfig
Make.defs