355 lines
16 KiB
C
355 lines
16 KiB
C
/****************************************************************************
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* arch/arm/include/kinetis/kinetis_pmc.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H
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#define __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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/* Note:
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* It is envisioned that in the long term as a chip is added. The author of
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* the new chip definitions will either find the exact configuration in an
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* existing chip define and add the new chip to it Or add the PMC feature
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* configuration #defines to the chip ifdef list below. In either case the
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* author should mark it as "Verified to Document Number:" taken from the
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* reference manual.
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*
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* To maintain backward compatibility to the version of NuttX prior to
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* 2/22/2017, the catch all KINETIS_PMC_VERSION_UKN configuration is assigned
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* to all the chips that did not have any conditional compilation based on
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* KINETIS_K64 or KINETIS_K66. This is a "No worse" than the original code
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* solution. N.B. Each original chip "if"definitions have been left intact so
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* that the complete legacy definitions prior to 2/22/2017 may be filled in
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* completely when vetted.
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*/
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/* PMC Register Configuration
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*
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* KINETIS_PMC_HAS_REGSC - SoC has REGSC Register
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* KINETIS_PMC_HAS_REGSC_ACKISO - SoC has REGSC[ACKISO]
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* KINETIS_PMC_HAS_REGSC_VLPRS - SoC has REGSC[VLPRS]
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* KINETIS_PMC_HAS_REGSC_VLPO - SoC has REGSC[VLPO]
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* KINETIS_PMC_HAS_REGSC_REGFPM - SoC has REGSC[REGFPM]
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* KINETIS_PMC_HAS_REGSC_BGEN - SoC has REGSC[BGEN]
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* KINETIS_PMC_HAS_REGSC_TRAMPO - SoC has REGSC[TRAMPO]
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* KINETIS_PMC_HAS_REGSC_REGONS - SoC has REGSC[REGONS]
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*
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* KINETIS_PMC_HAS_HVDSC1 - SoC has HVDSC1 Register
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* KINETIS_PMC_HAS_SRAMCTL - SoC has SRAMCTL Register
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*/
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/* Describe the version of the PMC
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*
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* These defines are not related to any NXP reference but are merely
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* a way to label the versions we are using
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*/
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#define KINETIS_PMC_VERSION_UKN (-1) /* What was in nuttx prior to 2/22/2017 */
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#define KINETIS_PMC_VERSION_01 1 /* Verified to Document Number: K60P144M150SF3RM Rev. 3, November 2014 */
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#define KINETIS_PMC_VERSION_04 4 /* Verified to Document Numbers:
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* K20P64M72SF1RM Rev. 1.1, Dec 2012
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* K64P144M120SF5RM Rev. 2, January 2014
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* K66P144M180SF5RMV2 Rev. 2, May 2015 */
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#define KINETIS_PMC_VERSION_05 5 /* Verified to Document Number: K28P210M150SF5RM Rev. 4, August 2017 */
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/* MK20DX/DN---VLH5
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*
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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* PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
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* FREQ CNT FLASH FLASH
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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* MK20DN32VLH5 50 MHz 64 LQFP 32 KB 32 KB — 8 KB 40
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* MK20DX32VLH5 50 MHz 64 LQFP 64 KB 32 KB 2 KB 8 KB 40
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* MK20DN64VLH5 50 MHz 64 LQFP 64 KB 64 KB — 16 KB 40
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* MK20DX64VLH5 50 MHz 64 LQFP 96 KB 64 KB 2 KB 16 KB 40
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* MK20DN128VLH5 50 MHz 64 LQFP 128 KB 128 KB — 16 KB 40
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* MK20DX128VLH5 50 MHz 64 LQFP 160 KB 128 KB 2 KB 16 KB 40
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*/
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#if defined(CONFIG_ARCH_CHIP_MK20DN32VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DX32VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DN64VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DX64VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DN128VLH5) || \
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defined(CONFIG_ARCH_CHIP_MK20DX128VLH5)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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/* MK20DX---VLH7
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*
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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* PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
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* FREQ CNT FLASH FLASH
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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* MK20DX64VLH7 72 MHz 64 LQFP 96 KB 64 KB 2 KB 16 KB 40
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* MK20DX128VLH7 72 MHz 64 LQFP 160 KB 128 KB 2 KB 32 KB 40
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* MK20DX256VLH7 72 MHz 64 LQFP 288 KB 256 KB 2 KB 64 KB 40
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* ------------- ------ --- ------- ------ ------- ------ ----- ----
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*/
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#elif defined(CONFIG_ARCH_CHIP_MK20DX64VLH7) || defined(CONFIG_ARCH_CHIP_MK20DX128VLH7) || \
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defined(CONFIG_ARCH_CHIP_MK20DX256VLH7)
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/* Verified to Document Number: K20P64M72SF1RM Rev. 1.1, Dec 2012 */
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
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/* PMC Register Configuration */
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# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
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# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
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# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
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# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC does not have REGSC[VLPRS] */
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# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC does not have REGSC[VLPO] */
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# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC does not have REGSC[REGFPM] */
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# define KINETIS_PMC_HAS_REGSC_BGEN 1 /* SoC has REGSC[BGEN] */
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# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC does not have REGSC[TRAMPO] */
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# undef KINETIS_PMC_HAS_HVDSC1 /* SoC does not have HVDSC1 Register */
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# undef KINETIS_PMC_HAS_SRAMCTL /* SoC does not have SRAMCTL Register */
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/* MK28FN2M0---15-
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*
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* --------------- ------- --- ------- ------ ------- ------ -----
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* PART NUMBER CPU PIN PACKAGE PROGRAM EEPROM SRAM GPIO
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* FREQ CNT FLASH
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* --------------- ------- --- ------- ------ ------- ------ -----
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* MK28FN2M0VMI15 150 MHz 169 MAPBGA 2 MB None 1 MB 120
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* MK28FN2M0CAU15R 150 MHz 210 WLCSP 2 MB None 1 MB 120
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* --------------- ------- --- ------- ------ ------- ------ -----
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*/
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#elif defined(CONFIG_ARCH_CHIP_MK28FN2M0VMI15) || defined(CONFIG_ARCH_CHIP_MK28FN2M0CAU15R)
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/* Verified to Document Number: K28P210M150SF5RM Rev. 4, August 2017 */
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_05
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/* PMC Register Configuration */
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# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
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# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
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# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
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# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC does not have REGSC[VLPRS] */
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# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC does not have REGSC[VLPO] */
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# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC does not have REGSC[REGFPM] */
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# define KINETIS_PMC_HAS_REGSC_BGEN 1 /* SoC has REGSC[BGEN] */
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# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC does not have REGSC[TRAMPO] */
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# define KINETIS_PMC_HAS_HVDSC1 1 /* SoC has HVDSC1 Register */
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# define KINETIS_PMC_HAS_SRAMCTL 1 /* SoC has SRAMCTL Register */
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#elif defined(CONFIG_ARCH_CHIP_MK40X64VFX50) || defined(CONFIG_ARCH_CHIP_MK40X64VLH50) || \
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defined(CONFIG_ARCH_CHIP_MK40X64VLK50) || defined(CONFIG_ARCH_CHIP_MK40X64VMB50)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40X128VFX50) || defined(CONFIG_ARCH_CHIP_MK40X128VLH50) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VLK50) || defined(CONFIG_ARCH_CHIP_MK40X128VMB50) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VLL50) || defined(CONFIG_ARCH_CHIP_MK40X128VML50) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VFX72) || defined(CONFIG_ARCH_CHIP_MK40X128VLH72) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VLK72) || defined(CONFIG_ARCH_CHIP_MK40X128VMB72) || \
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defined(CONFIG_ARCH_CHIP_MK40X128VLL72) || defined(CONFIG_ARCH_CHIP_MK40X128VML72)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40X256VLK72) || defined(CONFIG_ARCH_CHIP_MK40X256VMB72) || \
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defined(CONFIG_ARCH_CHIP_MK40X256VLL72) || defined(CONFIG_ARCH_CHIP_MK40X256VML72)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40X128VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X128VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40X256VLQ100) || defined(CONFIG_ARCH_CHIP_MK40X256VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK40N512VLK100) || defined(CONFIG_ARCH_CHIP_MK40N512VMB100) || \
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defined(CONFIG_ARCH_CHIP_MK40N512VLL100) || defined(CONFIG_ARCH_CHIP_MK40N512VML100) || \
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defined(CONFIG_ARCH_CHIP_MK40N512VLQ100) || defined(CONFIG_ARCH_CHIP_MK40N512VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N256VLL100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60X256VLL100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N512VLL100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N256VML100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60X256VML100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N512VML100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N256VLQ100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60X256VLQ100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N512VLQ100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N256VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60X256VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60N512VMD100)
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_UKN
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#elif defined(CONFIG_ARCH_CHIP_MK60FN1M0VLQ12)
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/* Verified to Document Number: K60P144M100SF2V2RM Rev. 2 Jun 2012 */
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_01
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/* PMC Register Configuration */
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# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
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# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
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# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
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# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC does not have REGSC[VLPRS] */
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# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC does not have REGSC[VLPO] */
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# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC does not have REGSC[REGFPM] */
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# undef KINETIS_PMC_HAS_REGSC_BGEN /* SoC does not have REGSC[BGEN] */
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# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC does not have REGSC[TRAMPO] */
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# undef KINETIS_PMC_HAS_HVDSC1 /* SoC does not have HVDSC1 Register */
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# undef KINETIS_PMC_HAS_SRAMCTL /* SoC does not have SRAMCTL Register */
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#elif defined(CONFIG_ARCH_CHIP_MK64FN1M0VLL12) || defined(CONFIG_ARCH_CHIP_MK64FX512VLL12) || \
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defined(CONFIG_ARCH_CHIP_MK64FX512VDC12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VDC12) || \
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defined(CONFIG_ARCH_CHIP_MK64FX512VLQ12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VLQ12) || \
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defined(CONFIG_ARCH_CHIP_MK64FX512VMD12) || defined(CONFIG_ARCH_CHIP_MK64FN1M0VMD12)
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/* Verified to Document Number: K64P144M120SF5RM Rev. 2, January 2014 */
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
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/* PMC Register Configuration */
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# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
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# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
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# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
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# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC does not have REGSC[VLPRS] */
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# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC does not have REGSC[VLPO] */
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# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC does not have REGSC[REGFPM] */
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# define KINETIS_PMC_HAS_REGSC_BGEN 1 /* SoC has REGSC[BGEN] */
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# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC does not have REGSC[TRAMPO] */
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# undef KINETIS_PMC_HAS_HVDSC1 /* SoC does not have HVDSC1 Register */
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# undef KINETIS_PMC_HAS_SRAMCTL /* SoC does not have SRAMCTL Register */
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/* MK66F N/X 1M0/2M0 V MD/LQ 18
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*
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* --------------- ------- --- ------- ------- ------ ------ ------ -----
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* PART NUMBER CPU PIN PACKAGE TOTAL PROGRAM EEPROM SRAM GPIO
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* FREQ CNT FLASH FLASH
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* --------------- ------- --- ------- ------- ------ ------ ------ -----
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* MK66FN2M0VMD18 180 MHz 144 MAPBGA 2 MB — — KB 260 KB 100
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* MK66FX1M0VMD18 180 MHz 144 MAPBGA 1.25 MB 1 MB 4 KB 256 KB 100
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* MK66FN2M0VLQ18 180 MHz 144 LQFP 2 MB — — KB 260 KB 100
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* MK66FX1M0VLQ18 180 MHz 144 LQFP 1.25 MB 1 MB 4 KB 256 KB 100
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*/
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#elif defined(CONFIG_ARCH_CHIP_MK66FN2M0VMD18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VMD18) || \
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defined(CONFIG_ARCH_CHIP_MK66FN2M0VLQ18) || defined(CONFIG_ARCH_CHIP_MK66FX1M0VLQ18)
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/* Verified to Document Number: K66P144M180SF5RMV2 Rev. 2, May 2015 */
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# define KINETIS_PMC_VERSION KINETIS_PMC_VERSION_04
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/* PMC Register Configuration */
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# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
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# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
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# define KINETIS_PMC_HAS_REGSC_ACKISO 1 /* SoC has REGSC[ACKISO] */
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# undef KINETIS_PMC_HAS_REGSC_VLPRS /* SoC does not have REGSC[VLPRS] */
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# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC does not have REGSC[VLPO] */
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# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC does not have REGSC[REGFPM] */
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# define KINETIS_PMC_HAS_REGSC_BGEN 1 /* SoC has REGSC[BGEN] */
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# undef KINETIS_PMC_HAS_REGSC_TRAMPO /* SoC does not have REGSC[TRAMPO] */
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# undef KINETIS_PMC_HAS_HVDSC1 /* SoC does not have HVDSC1 Register */
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# undef KINETIS_PMC_HAS_SRAMCTL /* SoC does not have SRAMCTL Register */
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#else
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# error "Unsupported Kinetis chip"
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#endif
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/* Use the catch all configuration for the PMC based on
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* the implementations in NuttX prior to 2/3/2017
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*/
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#if KINETIS_PMC_VERSION == KINETIS_PMC_VERSION_UKN
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/* PMC Register Configuration */
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# define KINETIS_PMC_HAS_REGSC 1 /* SoC has REGSC Register */
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# define KINETIS_PMC_HAS_REGSC_REGONS 1 /* SoC has REGSC[REGONS] */
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# undef KINETIS_PMC_HAS_REGSC_ACKISO /* SoC does not have REGSC[ACKISO] */
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# define KINETIS_PMC_HAS_REGSC_VLPRS 1 /* SoC has REGSC[VLPRS] */
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# undef KINETIS_PMC_HAS_REGSC_VLPO /* SoC does not have REGSC[VLPO] */
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# undef KINETIS_PMC_HAS_REGSC_REGFPM /* SoC does not have REGSC[REGFPM] */
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# undef KINETIS_PMC_HAS_REGSC_BGEN /* SoC does not have REGSC[BGEN] */
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# define KINETIS_PMC_HAS_REGSC_TRAMPO 1 /* SoC has REGSC[TRAMPO] */
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# undef KINETIS_PMC_HAS_HVDSC1 /* SoC does not have HVDSC1 Register */
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# undef KINETIS_PMC_HAS_SRAMCTL /* SoC does not have SRAMCTL Register */
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#endif
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#if !defined(KINETIS_PMC_VERSION)
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# error "No KINETIS_PMC_VERSION defined!"
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#endif
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#endif /* __ARCH_ARM_INCLUDE_KINETIS_KINETIS_PMC_H */
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