Gregory Nutt b1001b4e50 Update TODO list regarding non-queuing of signal actions; Add comments in code at areas where the issue applies.		2019-02-04 08:35:03 -06:00
..
gap8	This commit brings in support for the GAP8 architecture. The GAP8 is a 1+8-core DSP-like RISC-V MCU. Also included is support for the Gapuino GAP8 evaluation board.	2018-10-30 09:38:50 -06:00
nr5m100	arch/: Make sure the up_irq_enable() is available on all architectures. I will not be able to test all of these new versions of this function so this may break things for awhile.	2018-06-06 09:25:40 -06:00
rv32im	Update TODO list regarding non-queuing of signal actions; Add comments in code at areas where the issue applies.	2019-02-04 08:35:03 -06:00
arch.h	arch/: Remove dangling space at the end of lines.	2017-06-28 13:16:48 -06:00
inttypes.h	Add architecture-specific inttypes.h	2016-10-27 16:01:38 -04:00
irq.h	This commit brings in support for the GAP8 architecture. The GAP8 is a 1+8-core DSP-like RISC-V MCU. Also included is support for the Gapuino GAP8 evaluation board.	2018-10-30 09:38:50 -06:00
limits.h	This commit brings in support for the GAP8 architecture. The GAP8 is a 1+8-core DSP-like RISC-V MCU. Also included is support for the Gapuino GAP8 evaluation board.	2018-10-30 09:38:50 -06:00
stdarg.h	Add support for the RISC-V architecture and configs/nr5m100-nexys4 board. I will be making the FPGA code for this available soon (within a week I would say). The board support on this is pretty thin, but it seems like maybe a good idea to get the base RISC-V stuff in since there are people interested in it.	2016-10-16 09:47:07 -06:00
syscall.h	Add support for the RISC-V architecture and configs/nr5m100-nexys4 board. I will be making the FPGA code for this available soon (within a week I would say). The board support on this is pretty thin, but it seems like maybe a good idea to get the base RISC-V stuff in since there are people interested in it.	2016-10-16 09:47:07 -06:00
types.h	Add support for the RISC-V architecture and configs/nr5m100-nexys4 board. I will be making the FPGA code for this available soon (within a week I would say). The board support on this is pretty thin, but it seems like maybe a good idea to get the base RISC-V stuff in since there are people interested in it.	2016-10-16 09:47:07 -06:00