6a3c2aded6
* Simplify EINTR/ECANCEL error handling 1. Add semaphore uninterruptible wait function 2 .Replace semaphore wait loop with a single uninterruptible wait 3. Replace all sem_xxx to nxsem_xxx * Unify the void cast usage 1. Remove void cast for function because many place ignore the returned value witout cast 2. Replace void cast for variable with UNUSED macro
722 lines
24 KiB
C
722 lines
24 KiB
C
/************************************************************************************
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* drivers/mtd/at25.c
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* Driver for SPI-based AT25DF321 (32Mbit) flash.
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*
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* Copyright (C) 2009-2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Petteri Aimonen <jpa@nx.mail.kapsi.fi>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/kmalloc.h>
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#include <nuttx/signal.h>
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#include <nuttx/fs/ioctl.h>
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#include <nuttx/spi/spi.h>
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#include <nuttx/mtd/mtd.h>
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* Configuration ********************************************************************/
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#ifndef CONFIG_AT25_SPIMODE
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# define CONFIG_AT25_SPIMODE SPIDEV_MODE0
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#endif
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#ifndef CONFIG_AT25_SPIFREQUENCY
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# define CONFIG_AT25_SPIFREQUENCY 20000000
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#endif
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/* AT25 Registers *******************************************************************/
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/* Identification register values */
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#define AT25_MANUFACTURER 0x1f
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#define AT25_AT25DF081A_TYPE 0x45 /* 8 M-bit */
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#define AT25_AT25DF321_TYPE 0x47 /* 32 M-bit */
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/* AT25DF081A capacity is 1,048,575 bytes:
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* (16 sectors) * (65,536 bytes per sector)
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* (4096 pages) * (256 bytes per page)
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*/
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#define AT25_AT25DF081A_SECTOR_SHIFT 12 /* Sector size 1 << 12 = 4096 */
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#define AT25_AT25DF081A_NSECTORS 256
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#define AT25_AT25DF081A_PAGE_SHIFT 9 /* Page size 1 << 8 = 256 */
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#define AT25_AT25DF081A_NPAGES 2048
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/* AT25DF321 capacity is 4,194,304 bytes:
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* (64 sectors) * (65,536 bytes per sector)
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* (16384 pages) * (256 bytes per page)
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*/
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#define AT25_AT25DF321_SECTOR_SHIFT 12 /* Sector size 1 << 12 = 4096 */
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#define AT25_AT25DF321_NSECTORS 1024
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#define AT25_AT25DF321_PAGE_SHIFT 9 /* Page size 1 << 9 = 512 */
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#define AT25_AT25DF321_NPAGES 8192
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/* Instructions */
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/* Command Value N Description Addr Dummy Data */
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#define AT25_WREN 0x06 /* 1 Write Enable 0 0 0 */
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#define AT25_WRDI 0x04 /* 1 Write Disable 0 0 0 */
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#define AT25_RDID 0x9f /* 1 Read Identification 0 0 1-3 */
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#define AT25_RDSR 0x05 /* 1 Read Status Register 0 0 >=1 */
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#define AT25_WRSR 0x01 /* 1 Write Status Register 0 0 1 */
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#define AT25_READ 0x03 /* 1 Read Data Bytes 3 0 >=1 */
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#define AT25_FAST_READ 0x0b /* 1 Higher speed read 3 1 >=1 */
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#define AT25_PP 0x02 /* 1 Page Program 3 0 1-256 */
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#define AT25_SE 0x20 /* 1 Sector Erase 3 0 0 */
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#define AT25_BE 0xc7 /* 1 Bulk Erase 0 0 0 */
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#define AT25_DP 0xb9 /* 2 Deep power down 0 0 0 */
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#define AT25_RES 0xab /* 2 Read Electronic Signature 0 3 >=1 */
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/* Status register bit definitions */
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#define AT25_SR_BUSY (1 << 0) /* Bit 0: Ready/Busy Status */
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#define AT25_SR_WEL (1 << 1) /* Bit 1: Write enable latch bit */
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#define AT25_SR_SWP_SHIFT (2) /* Bits 2-3: Software protection */
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#define AT25_SR_SWP_MASK (3 << AT25_SR_SWP_SHIFT)
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#define AT25_SR_WPP (1 << 4) /* Bit 4: Write Protect (/WP) Pin Status */
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#define AT25_SR_EPE (1 << 5) /* Bit 5: Erase/program error */
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/* Bit 6: Reserved */
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#define AT25_SR_SPRL (1 << 7) /* Bit 7: Sector Protection Registers Locked */
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#define AT25_SR_UNPROT 0x00 /* Global unprotect command */
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#define AT25_DUMMY 0xa5
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/************************************************************************************
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* Private Types
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************************************************************************************/
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/* This type represents the state of the MTD device. The struct mtd_dev_s
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* must appear at the beginning of the definition so that you can freely
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* cast between pointers to struct mtd_dev_s and struct at25_dev_s.
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*/
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struct at25_dev_s
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{
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struct mtd_dev_s mtd; /* MTD interface */
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FAR struct spi_dev_s *dev; /* Saved SPI interface instance */
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uint8_t sectorshift; /* 16 or 18 */
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uint8_t pageshift; /* 8 */
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uint16_t nsectors; /* 128 or 64 */
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uint32_t npages; /* 32,768 or 65,536 */
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};
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/************************************************************************************
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* Private Function Prototypes
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************************************************************************************/
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/* Helpers */
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static void at25_lock(FAR struct spi_dev_s *dev);
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static inline void at25_unlock(FAR struct spi_dev_s *dev);
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static inline int at25_readid(struct at25_dev_s *priv);
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static void at25_waitwritecomplete(struct at25_dev_s *priv);
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static void at25_writeenable(struct at25_dev_s *priv);
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static inline void at25_sectorerase(struct at25_dev_s *priv, off_t offset);
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static inline int at25_bulkerase(struct at25_dev_s *priv);
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static inline void at25_pagewrite(struct at25_dev_s *priv, FAR const uint8_t *buffer,
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off_t offset);
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/* MTD driver methods */
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static int at25_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks);
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static ssize_t at25_bread(FAR struct mtd_dev_s *dev, off_t startblock,
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size_t nblocks, FAR uint8_t *buf);
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static ssize_t at25_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
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size_t nblocks, FAR const uint8_t *buf);
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static ssize_t at25_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
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FAR uint8_t *buffer);
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static int at25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg);
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Name: at25_lock
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************************************************************************************/
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static void at25_lock(FAR struct spi_dev_s *dev)
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{
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/* On SPI busses where there are multiple devices, it will be necessary to
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* lock SPI to have exclusive access to the busses for a sequence of
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* transfers. The bus should be locked before the chip is selected.
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*
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* This is a blocking call and will not return until we have exclusiv access to
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* the SPI buss. We will retain that exclusive access until the bus is unlocked.
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*/
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SPI_LOCK(dev, true);
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/* After locking the SPI bus, the we also need call the setfrequency, setbits, and
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* setmode methods to make sure that the SPI is properly configured for the device.
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* If the SPI buss is being shared, then it may have been left in an incompatible
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* state.
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*/
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SPI_SETMODE(dev, CONFIG_AT25_SPIMODE);
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SPI_SETBITS(dev, 8);
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SPI_HWFEATURES(dev, 0);
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SPI_SETFREQUENCY(dev, CONFIG_AT25_SPIFREQUENCY);
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}
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/************************************************************************************
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* Name: at25_unlock
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************************************************************************************/
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static inline void at25_unlock(FAR struct spi_dev_s *dev)
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{
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SPI_LOCK(dev, false);
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}
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/************************************************************************************
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* Name: at25_readid
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************************************************************************************/
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static inline int at25_readid(struct at25_dev_s *priv)
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{
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uint16_t manufacturer;
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uint16_t memory;
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finfo("priv: %p\n", priv);
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/* Lock the SPI bus, configure the bus, and select this FLASH part. */
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at25_lock(priv->dev);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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/* Send the "Read ID (RDID)" command and read the first three ID bytes */
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SPI_SEND(priv->dev, AT25_RDID);
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manufacturer = SPI_SEND(priv->dev, AT25_DUMMY);
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memory = SPI_SEND(priv->dev, AT25_DUMMY);
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/* Deselect the FLASH and unlock the bus */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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at25_unlock(priv->dev);
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finfo("manufacturer: %02x memory: %02x\n",
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manufacturer, memory);
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/* Check for a valid manufacturer and memory type */
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if (manufacturer == AT25_MANUFACTURER && memory == AT25_AT25DF081A_TYPE)
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{
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priv->sectorshift = AT25_AT25DF081A_SECTOR_SHIFT;
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priv->nsectors = AT25_AT25DF081A_NSECTORS;
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priv->pageshift = AT25_AT25DF081A_PAGE_SHIFT;
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priv->npages = AT25_AT25DF081A_NPAGES;
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return OK;
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}
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else if (manufacturer == AT25_MANUFACTURER && memory == AT25_AT25DF321_TYPE)
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{
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priv->sectorshift = AT25_AT25DF321_SECTOR_SHIFT;
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priv->nsectors = AT25_AT25DF321_NSECTORS;
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priv->pageshift = AT25_AT25DF321_PAGE_SHIFT;
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priv->npages = AT25_AT25DF321_NPAGES;
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return OK;
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}
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return -ENODEV;
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}
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/************************************************************************************
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* Name: at25_waitwritecomplete
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************************************************************************************/
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static void at25_waitwritecomplete(struct at25_dev_s *priv)
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{
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uint8_t status;
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/* Loop as long as the memory is busy with a write cycle */
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do
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{
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/* Select this FLASH part */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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/* Send "Read Status Register (RDSR)" command */
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SPI_SEND(priv->dev, AT25_RDSR);
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/* Send a dummy byte to generate the clock needed to shift out the status */
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status = SPI_SEND(priv->dev, AT25_DUMMY);
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/* Deselect the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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/* Given that writing could take up to few tens of milliseconds, and erasing
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* could take more. The following short delay in the "busy" case will allow
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* other peripherals to access the SPI bus.
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*/
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if ((status & AT25_SR_BUSY) != 0)
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{
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at25_unlock(priv->dev);
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nxsig_usleep(10000);
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at25_lock(priv->dev);
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}
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}
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while ((status & AT25_SR_BUSY) != 0);
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if (status & AT25_SR_EPE)
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{
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ferr("ERROR: Write error, status: 0x%02x\n", status);
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}
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finfo("Complete, status: 0x%02x\n", status);
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}
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/************************************************************************************
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* Name: at25_writeenable
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************************************************************************************/
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static void at25_writeenable(struct at25_dev_s *priv)
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{
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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SPI_SEND(priv->dev, AT25_WREN);
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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finfo("Enabled\n");
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}
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/************************************************************************************
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* Name: at25_sectorerase
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************************************************************************************/
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static inline void at25_sectorerase(struct at25_dev_s *priv, off_t sector)
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{
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off_t offset = sector << priv->sectorshift;
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finfo("sector: %08lx\n", (long)sector);
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/* Wait for any preceding write to complete. We could simplify things by
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* perform this wait at the end of each write operation (rather than at
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* the beginning of ALL operations), but have the wait first will slightly
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* improve performance.
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*/
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at25_waitwritecomplete(priv);
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/* Send write enable instruction */
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at25_writeenable(priv);
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/* Select this FLASH part */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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/* Send the "Sector Erase (SE)" instruction */
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SPI_SEND(priv->dev, AT25_SE);
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/* Send the sector offset high byte first. For all of the supported
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* parts, the sector number is completely contained in the first byte
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* and the values used in the following two bytes don't really matter.
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*/
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SPI_SEND(priv->dev, (offset >> 16) & 0xff);
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SPI_SEND(priv->dev, (offset >> 8) & 0xff);
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SPI_SEND(priv->dev, offset & 0xff);
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/* Deselect the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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finfo("Erased\n");
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}
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/************************************************************************************
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* Name: at25_bulkerase
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************************************************************************************/
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static inline int at25_bulkerase(struct at25_dev_s *priv)
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{
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finfo("priv: %p\n", priv);
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/* Wait for any preceding write to complete. We could simplify things by
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* perform this wait at the end of each write operation (rather than at
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* the beginning of ALL operations), but have the wait first will slightly
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* improve performance.
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*/
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at25_waitwritecomplete(priv);
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/* Send write enable instruction */
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at25_writeenable(priv);
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/* Select this FLASH part */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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/* Send the "Bulk Erase (BE)" instruction */
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SPI_SEND(priv->dev, AT25_BE);
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/* Deselect the FLASH */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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finfo("Return: OK\n");
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return OK;
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}
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/************************************************************************************
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* Name: at25_pagewrite
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************************************************************************************/
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static inline void at25_pagewrite(struct at25_dev_s *priv, FAR const uint8_t *buffer,
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off_t page)
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{
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off_t offset = page << 8;
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finfo("page: %08lx offset: %08lx\n", (long)page, (long)offset);
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/* Wait for any preceding write to complete. We could simplify things by
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* perform this wait at the end of each write operation (rather than at
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* the beginning of ALL operations), but have the wait first will slightly
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* improve performance.
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*/
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at25_waitwritecomplete(priv);
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/* Enable the write access to the FLASH */
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at25_writeenable(priv);
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/* Select this FLASH part */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
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/* Send "Page Program (PP)" command */
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SPI_SEND(priv->dev, AT25_PP);
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/* Send the page offset high byte first. */
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SPI_SEND(priv->dev, (offset >> 16) & 0xff);
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SPI_SEND(priv->dev, (offset >> 8) & 0xff);
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SPI_SEND(priv->dev, offset & 0xff);
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/* Then write the specified number of bytes */
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SPI_SNDBLOCK(priv->dev, buffer, 256);
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/* Deselect the FLASH: Chip Select high */
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SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
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finfo("Written\n");
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}
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/************************************************************************************
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* Name: at25_erase
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************************************************************************************/
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static int at25_erase(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks)
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{
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FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
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size_t blocksleft = nblocks;
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finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
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/* Lock access to the SPI bus until we complete the erase */
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at25_lock(priv->dev);
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while (blocksleft-- > 0)
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{
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/* Erase each sector */
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at25_sectorerase(priv, startblock);
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startblock++;
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}
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at25_unlock(priv->dev);
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return (int)nblocks;
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}
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/************************************************************************************
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* Name: at25_bread
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************************************************************************************/
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static ssize_t at25_bread(FAR struct mtd_dev_s *dev, off_t startblock, size_t nblocks,
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FAR uint8_t *buffer)
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{
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FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
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ssize_t nbytes;
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finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
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/* On this device, we can handle the block read just like the byte-oriented read */
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nbytes = at25_read(dev, startblock << priv->pageshift,
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nblocks << priv->pageshift, buffer);
|
|
if (nbytes > 0)
|
|
{
|
|
return nbytes >> priv->pageshift;
|
|
}
|
|
|
|
return (int)nbytes;
|
|
}
|
|
|
|
/************************************************************************************
|
|
* Name: at25_bwrite
|
|
************************************************************************************/
|
|
|
|
static ssize_t at25_bwrite(FAR struct mtd_dev_s *dev, off_t startblock,
|
|
size_t nblocks, FAR const uint8_t *buffer)
|
|
{
|
|
FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
|
|
size_t blocksleft = nblocks;
|
|
|
|
finfo("startblock: %08lx nblocks: %d\n", (long)startblock, (int)nblocks);
|
|
|
|
/* Lock the SPI bus and write each page to FLASH */
|
|
|
|
at25_lock(priv->dev);
|
|
while (blocksleft-- > 0)
|
|
{
|
|
at25_pagewrite(priv, buffer, startblock * 2);
|
|
at25_pagewrite(priv, buffer + 256, startblock * 2 + 1);
|
|
buffer += 1 << priv->pageshift;
|
|
startblock++;
|
|
}
|
|
|
|
at25_unlock(priv->dev);
|
|
return nblocks;
|
|
}
|
|
|
|
/************************************************************************************
|
|
* Name: at25_read
|
|
************************************************************************************/
|
|
|
|
static ssize_t at25_read(FAR struct mtd_dev_s *dev, off_t offset, size_t nbytes,
|
|
FAR uint8_t *buffer)
|
|
{
|
|
FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
|
|
|
|
finfo("offset: %08lx nbytes: %d\n", (long)offset, (int)nbytes);
|
|
|
|
/* Lock the SPI bus NOW because the following call must be executed with
|
|
* the bus locked.
|
|
*/
|
|
|
|
at25_lock(priv->dev);
|
|
|
|
/* Wait for any preceding write to complete. We could simplify things by
|
|
* perform this wait at the end of each write operation (rather than at
|
|
* the beginning of ALL operations), but have the wait first will slightly
|
|
* improve performance.
|
|
*/
|
|
|
|
at25_waitwritecomplete(priv);
|
|
|
|
/* Select this FLASH part */
|
|
|
|
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
|
|
|
|
/* Send "Read from Memory " instruction */
|
|
|
|
SPI_SEND(priv->dev, AT25_READ);
|
|
|
|
/* Send the page offset high byte first. */
|
|
|
|
SPI_SEND(priv->dev, (offset >> 16) & 0xff);
|
|
SPI_SEND(priv->dev, (offset >> 8) & 0xff);
|
|
SPI_SEND(priv->dev, offset & 0xff);
|
|
|
|
/* Then read all of the requested bytes */
|
|
|
|
SPI_RECVBLOCK(priv->dev, buffer, nbytes);
|
|
|
|
/* Deselect the FLASH and unlock the SPI bus */
|
|
|
|
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
|
|
at25_unlock(priv->dev);
|
|
|
|
finfo("return nbytes: %d\n", (int)nbytes);
|
|
return nbytes;
|
|
}
|
|
|
|
/************************************************************************************
|
|
* Name: at25_ioctl
|
|
************************************************************************************/
|
|
|
|
static int at25_ioctl(FAR struct mtd_dev_s *dev, int cmd, unsigned long arg)
|
|
{
|
|
FAR struct at25_dev_s *priv = (FAR struct at25_dev_s *)dev;
|
|
int ret = -EINVAL; /* Assume good command with bad parameters */
|
|
|
|
finfo("cmd: %d \n", cmd);
|
|
|
|
switch (cmd)
|
|
{
|
|
case MTDIOC_GEOMETRY:
|
|
{
|
|
FAR struct mtd_geometry_s *geo =
|
|
(FAR struct mtd_geometry_s *)((uintptr_t)arg);
|
|
|
|
if (geo != NULL)
|
|
{
|
|
/* Populate the geometry structure with information need to know
|
|
* the capacity and how to access the device.
|
|
*
|
|
* NOTE: that the device is treated as though it where just an array
|
|
* of fixed size blocks. That is most likely not true, but the client
|
|
* will expect the device logic to do whatever is necessary to make it
|
|
* appear so.
|
|
*/
|
|
|
|
geo->blocksize = (1 << priv->pageshift);
|
|
geo->erasesize = (1 << priv->sectorshift);
|
|
geo->neraseblocks = priv->nsectors;
|
|
ret = OK;
|
|
|
|
finfo("blocksize: %d erasesize: %d neraseblocks: %d\n",
|
|
geo->blocksize, geo->erasesize, geo->neraseblocks);
|
|
}
|
|
}
|
|
break;
|
|
|
|
case MTDIOC_BULKERASE:
|
|
{
|
|
/* Erase the entire device */
|
|
|
|
at25_lock(priv->dev);
|
|
ret = at25_bulkerase(priv);
|
|
at25_unlock(priv->dev);
|
|
}
|
|
break;
|
|
|
|
case MTDIOC_XIPBASE:
|
|
default:
|
|
ret = -ENOTTY; /* Bad command */
|
|
break;
|
|
}
|
|
|
|
finfo("return %d\n", ret);
|
|
return ret;
|
|
}
|
|
|
|
/************************************************************************************
|
|
* Public Functions
|
|
************************************************************************************/
|
|
|
|
/************************************************************************************
|
|
* Name: at25_initialize
|
|
*
|
|
* Description:
|
|
* Create an initialize MTD device instance. MTD devices are not registered
|
|
* in the file system, but are created as instances that can be bound to
|
|
* other functions (such as a block or character driver front end).
|
|
*
|
|
************************************************************************************/
|
|
|
|
FAR struct mtd_dev_s *at25_initialize(FAR struct spi_dev_s *dev)
|
|
{
|
|
FAR struct at25_dev_s *priv;
|
|
int ret;
|
|
|
|
finfo("dev: %p\n", dev);
|
|
|
|
/* Allocate a state structure (we allocate the structure instead of using
|
|
* a fixed, static allocation so that we can handle multiple FLASH devices.
|
|
* The current implementation would handle only one FLASH part per SPI
|
|
* device (only because of the SPIDEV_FLASH(0) definition) and so would have
|
|
* to be extended to handle multiple FLASH parts on the same SPI bus.
|
|
*/
|
|
|
|
priv = (FAR struct at25_dev_s *)kmm_zalloc(sizeof(struct at25_dev_s));
|
|
if (priv)
|
|
{
|
|
/* Initialize the allocated structure (unsupported methods were
|
|
* nullified by kmm_zalloc).
|
|
*/
|
|
|
|
priv->mtd.erase = at25_erase;
|
|
priv->mtd.bread = at25_bread;
|
|
priv->mtd.bwrite = at25_bwrite;
|
|
priv->mtd.read = at25_read;
|
|
priv->mtd.ioctl = at25_ioctl;
|
|
priv->mtd.name = "at25";
|
|
priv->dev = dev;
|
|
|
|
/* Deselect the FLASH */
|
|
|
|
SPI_SELECT(dev, SPIDEV_FLASH(0), false);
|
|
|
|
/* Identify the FLASH chip and get its capacity */
|
|
|
|
ret = at25_readid(priv);
|
|
if (ret != OK)
|
|
{
|
|
/* Unrecognized! Discard all of that work we just did and return NULL */
|
|
|
|
ferr("ERROR: Unrecognized\n");
|
|
kmm_free(priv);
|
|
return NULL;
|
|
}
|
|
else
|
|
{
|
|
/* Unprotect all sectors */
|
|
|
|
at25_writeenable(priv);
|
|
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), true);
|
|
SPI_SEND(priv->dev, AT25_WRSR);
|
|
SPI_SEND(priv->dev, AT25_SR_UNPROT);
|
|
SPI_SELECT(priv->dev, SPIDEV_FLASH(0), false);
|
|
}
|
|
}
|
|
|
|
/* Return the implementation-specific state structure as the MTD device */
|
|
|
|
finfo("Return %p\n", priv);
|
|
return (FAR struct mtd_dev_s *)priv;
|
|
}
|