Jukka Laitinen 6a5d00f68c arch/risc-v/src/mpfs: Add CFG_DDR_SGMII_PHY_RPC156 register setting for DDR training ... Decreasing the value may increase DQ/DQS window size. Keep the default value (1) for the existing board configurations. Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>		2023-08-17 17:50:37 +08:00
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configs	riscv/mpfs: Set hart2 default entrypoint to -1 like the others	2023-07-26 19:58:05 -03:00
include	arch/risc-v/src/mpfs: Add CFG_DDR_SGMII_PHY_RPC156 register setting for DDR training	2023-08-17 17:50:37 +08:00
scripts	MPFS: Use NuttX SBI for Kernel mode	2023-06-07 01:48:15 +08:00
src	build: Replace "$(shell $(INCDIR) $(CC) ...)" with $(INCDIR_PREFIX)	2023-06-23 00:11:25 +03:00
Kconfig	Remove executable permission from source and build files.	2022-08-04 12:48:18 -03:00