Yanfeng Liu f69f0674f6 arch/risc-v: add status fields for VS and XS ... add defintions for vector extension and additional user-mode extension fields for MSTATUS and SSTATUS registers. Signed-off-by: Yanfeng Liu <yfliu2008@qq.com>		2024-01-28 06:38:25 -08:00
..
bl602
bl808	arch/riscv: Add support for Bouffalo Lab BL808 SoC (T-Head C906)	2023-12-12 08:50:03 -08:00
c906
esp32c3
esp32c6
espressif
fe310
hpm6750
jh7110	arch/risc-v: Add support for StarFive JH7110 SoC	2023-08-03 22:55:55 -07:00
k210
k230	risc-v/k230: kernel build for CanMV-K230 board	2023-12-31 07:26:45 -08:00
litex	risc-v/litex: fix typo in litex/irq.h	2024-01-06 04:15:52 -08:00
mpfs
qemu-rv
rv32m1
.gitignore
arch.h	risc-v/addrenv: Improve the commenting on struct arch_addrenv_s	2023-11-02 21:52:23 +08:00
barriers.h
csr.h	arch/risc-v: add status fields for VS and XS	2024-01-28 06:38:25 -08:00
elf.h	riscv/arch_elf.c: Handle PCREL_HI20/LO12_I/S relocations correctly	2023-12-12 17:32:36 -08:00
inttypes.h
irq.h	arch/risc-v: fix a few typos in comments	2023-12-31 07:25:51 -08:00
limits.h
mode.h	Update mode.h to add CSR_TVEC	2023-12-23 20:43:47 -08:00
setjmp.h
spinlock.h
stdarg.h
syscall.h
types.h