142 lines
6.5 KiB
C
142 lines
6.5 KiB
C
/****************************************************************************
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* arch/arm/include/eoss3/irq.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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****************************************************************************/
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#ifndef __ARCH_ARM_INCLUDE_EOSS3_IRQ_H
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#define __ARCH_ARM_INCLUDE_EOSS3_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <arch/eoss3/chip.h>
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/****************************************************************************
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* Pre-processor Prototypes
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****************************************************************************/
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/* Common Processor Exceptions (vectors 0-15) */
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#define EOSS3_IRQ_RESERVED (0) /* Reserved vector */
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/* Vector 0: Reset stack pointer val */
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/* Vector 1: Reset (unused) */
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#define EOSS3_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt */
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#define EOSS3_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
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#define EOSS3_IRQ_MEMFAULT (4) /* Vector 4: Memory management */
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#define EOSS3_IRQ_BUSFAULT (5) /* Vector 5: Bus fault */
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#define EOSS3_IRQ_USAGEFAULT (6) /* Vector 6: Usage fault */
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/* Vectors 7-10: Reserved */
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#define EOSS3_IRQ_SVCALL (11) /* Vector 11: SVC call */
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#define EOSS3_IRQ_DBGMONITOR (12) /* Vector 12: Debug Monitor */
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/* Vector 13: Reserved */
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#define EOSS3_IRQ_PENDSV (14) /* Vector 14: Pendable sys srv req */
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#define EOSS3_IRQ_SYSTICK (15) /* Vector 15: System tick */
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#define EOSS3_IRQ_EXTINT (16) /* Vector num of first ext interrupt */
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/* Chip-Specific External interrupts */
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#define EOSS3_IRQ_SW2 (EOSS3_IRQ_EXTINT + 0)
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#define EOSS3_IRQ_SW1 (EOSS3_IRQ_EXTINT + 1)
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#define EOSS3_IRQ_RSV1 (EOSS3_IRQ_EXTINT + 2)
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#define EOSS3_IRQ_FFE0MSG (EOSS3_IRQ_EXTINT + 3)
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#define EOSS3_IRQ_FBMSG (EOSS3_IRQ_EXTINT + 4)
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#define EOSS3_IRQ_GPIO (EOSS3_IRQ_EXTINT + 5)
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#define EOSS3_IRQ_SRAM_SLEEP (EOSS3_IRQ_EXTINT + 6)
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#define EOSS3_IRQ_UART (EOSS3_IRQ_EXTINT + 7)
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#define EOSS3_IRQ_TIMER (EOSS3_IRQ_EXTINT + 8)
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#define EOSS3_IRQ_CPUWD_INT (EOSS3_IRQ_EXTINT + 9)
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#define EOSS3_IRQ_CPUWD_RST (EOSS3_IRQ_EXTINT + 0)
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#define EOSS3_IRQ_BUS_TIMEOUT (EOSS3_IRQ_EXTINT + 11)
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#define EOSS3_IRQ_FPU (EOSS3_IRQ_EXTINT + 12)
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#define EOSS3_IRQ_PKFB (EOSS3_IRQ_EXTINT + 13)
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#define EOSS3_IRQ_RSV_I2S (EOSS3_IRQ_EXTINT + 14)
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#define EOSS3_IRQ_RSV_AUDIO (EOSS3_IRQ_EXTINT + 15)
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#define EOSS3_IRQ_SPI_MS (EOSS3_IRQ_EXTINT + 16)
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#define EOSS3_IRQ_CFG_DMA (EOSS3_IRQ_EXTINT + 17)
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#define EOSS3_IRQ_PMU_TIMER (EOSS3_IRQ_EXTINT + 18)
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#define EOSS3_IRQ_ADC_DONE (EOSS3_IRQ_EXTINT + 19)
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#define EOSS3_IRQ_RTC_ALARM (EOSS3_IRQ_EXTINT + 20)
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#define EOSS3_IRQ_RESET_INT (EOSS3_IRQ_EXTINT + 21)
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#define EOSS3_IRQ_FFE0 (EOSS3_IRQ_EXTINT + 22)
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#define EOSS3_IRQ_FFE_WDT (EOSS3_IRQ_EXTINT + 23)
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#define EOSS3_IRQ_AP_BOOT (EOSS3_IRQ_EXTINT + 24)
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#define EOSS3_IRQ_LDO30_PG (EOSS3_IRQ_EXTINT + 25)
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#define EOSS3_IRQ_LDO50_PG (EOSS3_IRQ_EXTINT + 26)
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#define EOSS3_IRQ_SRAM_TO (EOSS3_IRQ_EXTINT + 27)
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#define EOSS3_IRQ_LPSD (EOSS3_IRQ_EXTINT + 28)
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#define EOSS3_IRQ_DMIC (EOSS3_IRQ_EXTINT + 29)
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#define EOSS3_IRQ_RSV2 (EOSS3_IRQ_EXTINT + 20)
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#define EOSS3_IRQ_SDMA_DONE1 (EOSS3_IRQ_EXTINT + 31)
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#define EOSS3_IRQ_SDMA_DONE2 (EOSS3_IRQ_EXTINT + 32)
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#define EOSS3_IRQ_SDMA_DONE3 (EOSS3_IRQ_EXTINT + 33)
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#define EOSS3_IRQ_SDMA_DONE4 (EOSS3_IRQ_EXTINT + 34)
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#define EOSS3_IRQ_SDMA_DONE5 (EOSS3_IRQ_EXTINT + 35)
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#define EOSS3_IRQ_SDMA_DONE6 (EOSS3_IRQ_EXTINT + 36)
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#define EOSS3_IRQ_SDMA_DONE7 (EOSS3_IRQ_EXTINT + 37)
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#define EOSS3_IRQ_SDMA_DONE8 (EOSS3_IRQ_EXTINT + 38)
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#define EOSS3_IRQ_SDMA_DONE9 (EOSS3_IRQ_EXTINT + 39)
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#define EOSS3_IRQ_SDMA_DONE10 (EOSS3_IRQ_EXTINT + 40)
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#define EOSS3_IRQ_SDMA_DONE11 (EOSS3_IRQ_EXTINT + 41)
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#define EOSS3_IRQ_AP_PDM_CLK_ON (EOSS3_IRQ_EXTINT + 42)
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#define EOSS3_IRQ_AP_PDM_CLK_OFF (EOSS3_IRQ_EXTINT + 43)
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#define EOSS3_IRQ_DMAC0_BLK_DONE (EOSS3_IRQ_EXTINT + 44)
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#define EOSS3_IRQ_DMAC0_BUF_DONE (EOSS3_IRQ_EXTINT + 45)
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#define EOSS3_IRQ_DMAC1_BLK_DONE (EOSS3_IRQ_EXTINT + 46)
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#define EOSS3_IRQ_DMAC1_BUF_DONE (EOSS3_IRQ_EXTINT + 47)
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#define EOSS3_IRQ_SDMA_DONE0 (EOSS3_IRQ_EXTINT + 48)
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#define EOSS3_IRQ_SDMA_ERR (EOSS3_IRQ_EXTINT + 49)
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#define EOSS3_IRQ_I2S_SLV (EOSS3_IRQ_EXTINT + 50)
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#define EOSS3_IRQ_LPSD_VOICE_OFF (EOSS3_IRQ_EXTINT + 51)
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#define EOSS3_IRQ_DMIC_VOICE_OFF (EOSS3_IRQ_EXTINT + 52)
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#define EOSS3_NEXTINT (53)
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#define EOSS3_IRQ_NVECTORS (EOSS3_IRQ_EXTINT + EOSS3_NEXTINT)
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#define EOSS3_IRQ_INTERRUPTS EOSS3_IRQ_EXTINT
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#define NR_IRQS EOSS3_IRQ_NVECTORS
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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/****************************************************************************
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* Public Data
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****************************************************************************/
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif
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#endif /* #define __ARCH_ARM_INCLUDE_EOSS3_IRQ_H */
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