5cdd038df2
Squashed commit of the following:
arch/arm: Rename include/stm32f0l0 and src/stm32f0l0 to stm32f0l0g0.
Change all occurrences of lower-case stm32f0l0 to stm32f0l0g0.
Change all occurrences of upper-case STM32F0L0 to STM32F0L0G0.
335 lines
12 KiB
C
335 lines
12 KiB
C
/************************************************************************************
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* arch/arm/src/stm32/stm32_dma.h
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*
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* Copyright (C) 2009, 2011-2013, 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32F0L0G0_STM32_DMA_H
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#define __ARCH_ARM_SRC_STM32F0L0G0_STM32_DMA_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include "hardware/stm32_dma_v1.h"
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/************************************************************************************
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* Pre-processor Definitions
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************************************************************************************/
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/* These definitions provide the bit encoding of the 'status' parameter passed to the
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* DMA callback function (see dma_callback_t).
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*/
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#define DMA_STATUS_TEIF DMA_CHAN_TEIF_BIT /* Channel Transfer Error */
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#define DMA_STATUS_HTIF DMA_CHAN_HTIF_BIT /* Channel Half Transfer */
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#define DMA_STATUS_TCIF DMA_CHAN_TCIF_BIT /* Channel Transfer Complete */
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#define DMA_STATUS_ERROR (DMA_STATUS_TEIF)
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#define DMA_STATUS_SUCCESS (DMA_STATUS_TCIF | DMA_STATUS_HTIF)
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/* DMA_HANDLE provides an opaque are reference that can be used to represent a DMA
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* channel (F1) or a DMA stream (F4).
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*/
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typedef FAR void *DMA_HANDLE;
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/* Description:
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* This is the type of the callback that is used to inform the user of the
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* completion of the DMA.
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*
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* Input Parameters:
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* handle - Refers tot he DMA channel or stream
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* status - A bit encoded value that provides the completion status. See the
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* DMASTATUS_* definitions above.
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* arg - A user-provided value that was provided when stm32_dmastart() was
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* called.
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*/
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typedef void (*dma_callback_t)(DMA_HANDLE handle, uint8_t status, void *arg);
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#ifdef CONFIG_DEBUG_DMA_INFO
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struct stm32_dmaregs_s
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{
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uint32_t isr;
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uint32_t ccr;
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uint32_t cndtr;
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uint32_t cpar;
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uint32_t cmar;
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};
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#endif
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/************************************************************************************
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* Public Data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C"
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{
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/****************************************************************************
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* Name: stm32_dmachannel
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*
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* Description:
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* Allocate a DMA channel. This function gives the caller mutually
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* exclusive access to the DMA channel specified by the 'chan' argument.
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* DMA channels are shared on the STM32: Devices sharing the same DMA
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* channel cannot do DMA concurrently! See the DMACHAN_* definitions in
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* stm32_dma.h.
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*
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* If the DMA channel is not available, then stm32_dmachannel() will wait
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* until the holder of the channel relinquishes the channel by calling
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* stm32_dmafree(). WARNING: If you have two devices sharing a DMA
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* channel and the code never releases the channel, the stm32_dmachannel
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* call for the other will hang forever in this function! Don't let your
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* design do that!
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*
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* Hmm.. I suppose this interface could be extended to make a non-blocking
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* version. Feel free to do that if that is what you need.
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*
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* Input Parameters:
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* chan - Identifies the stream/channel resource
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* For the STM32 F1, this is simply the channel number as provided by
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* the DMACHAN_* definitions in chip/stm32f10xxx_dma.h.
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* For the STM32 F4, this is a bit encoded value as provided by the
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* the DMAMAP_* definitions in chip/stm32f40xxx_dma.h
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*
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* Returned Value:
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* Provided that 'chan' is valid, this function ALWAYS returns a non-NULL,
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* void* DMA channel handle. (If 'chan' is invalid, the function will
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* assert if debug is enabled or do something ignorant otherwise).
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*
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* Assumptions:
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* - The caller does not hold he DMA channel.
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* - The caller can wait for the DMA channel to be freed if it is no
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* available.
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*
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****************************************************************************/
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DMA_HANDLE stm32_dmachannel(unsigned int chan);
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/****************************************************************************
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* Name: stm32_dmafree
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*
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* Description:
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* Release a DMA channel. If another thread is waiting for this DMA channel
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* in a call to stm32_dmachannel, then this function will re-assign the
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* DMA channel to that thread and wake it up. NOTE: The 'handle' used
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* in this argument must NEVER be used again until stm32_dmachannel() is
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* called again to re-gain access to the channel.
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*
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* Returned Value:
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* None
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*
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* Assumptions:
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* - The caller holds the DMA channel.
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* - There is no DMA in progress
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*
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****************************************************************************/
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void stm32_dmafree(DMA_HANDLE handle);
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/****************************************************************************
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* Name: stm32_dmasetup
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*
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* Description:
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* Configure DMA before using
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*
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****************************************************************************/
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void stm32_dmasetup(DMA_HANDLE handle, uint32_t paddr, uint32_t maddr,
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size_t ntransfers, uint32_t ccr);
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/****************************************************************************
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* Name: stm32_dmastart
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*
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* Description:
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* Start the DMA transfer
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*
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* Assumptions:
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* - DMA handle allocated by stm32_dmachannel()
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* - No DMA in progress
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*
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****************************************************************************/
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void stm32_dmastart(DMA_HANDLE handle, dma_callback_t callback, void *arg,
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bool half);
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/****************************************************************************
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* Name: stm32_dmastop
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*
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* Description:
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* Cancel the DMA. After stm32_dmastop() is called, the DMA channel is
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* reset and stm32_dmasetup() must be called before stm32_dmastart() can be
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* called again
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*
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* Assumptions:
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* - DMA handle allocated by stm32_dmachannel()
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*
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****************************************************************************/
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void stm32_dmastop(DMA_HANDLE handle);
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/****************************************************************************
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* Name: stm32_dmaresidual
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*
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* Description:
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* Returns the number of bytes remaining to be transferred
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*
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* Assumptions:
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* - DMA handle allocated by stm32_dmachannel()
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*
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****************************************************************************/
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size_t stm32_dmaresidual(DMA_HANDLE handle);
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/****************************************************************************
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* Name: stm32_dmacapable
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*
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* Description:
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* Check if the DMA controller can transfer data to/from given memory
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* address with the given configuration. This depends on the internal
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* connections in the ARM bus matrix of the processor. Note that this
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* only applies to memory addresses, it will return false for any peripheral
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* address.
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*
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* Returned Value:
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* True, if transfer is possible.
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*
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****************************************************************************/
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#ifdef CONFIG_STM32F0L0G0_DMACAPABLE
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bool stm32_dmacapable(uintptr_t maddr, uint32_t count, uint32_t ccr);
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#else
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# define stm32_dmacapable(maddr, count, ccr) (true)
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#endif
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/****************************************************************************
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* Name: stm32_dmasample
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*
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* Description:
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* Sample DMA register contents
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*
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* Assumptions:
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* - DMA handle allocated by stm32_dmachannel()
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_DMA_INFO
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void stm32_dmasample(DMA_HANDLE handle, struct stm32_dmaregs_s *regs);
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#else
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# define stm32_dmasample(handle,regs)
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#endif
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/****************************************************************************
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* Name: stm32_dmadump
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*
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* Description:
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* Dump previously sampled DMA register contents
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*
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* Assumptions:
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* - DMA handle allocated by stm32_dmachannel()
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_DMA_INFO
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void stm32_dmadump(DMA_HANDLE handle, const struct stm32_dmaregs_s *regs,
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const char *msg);
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#else
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# define stm32_dmadump(handle,regs,msg)
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#endif
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/* High performance, zero latency DMA interrupts need some additional
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* interfaces.
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*
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* TODO: For now the interface is different for STM32 DMAv1 and STM32 DMAv2.
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* It should be unified somehow.
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*/
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#ifdef CONFIG_ARCH_HIPRI_INTERRUPT
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/****************************************************************************
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* Name: stm32_dma_intack
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*
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* Description:
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* Public visible interface to acknowledge interrupts on DMA channel
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*
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****************************************************************************/
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#if defined(HAVE_IP_DMA_V1)
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void stm32_dma_intack(unsigned int chndx, uint32_t isr);
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#elif defined(HAVE_IP_DMA_V2)
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void stm32_dma_intack(unsigned int controller, uint8_t stream, uint32_t isr);
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#endif
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/****************************************************************************
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* Name: stm32_dma_intget
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*
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* Description:
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* Public visible interface to get pending interrupts from DMA channel
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*
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****************************************************************************/
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#if defined(HAVE_IP_DMA_V1)
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uint32_t stm32_dma_intget(unsigned int chndx);
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#elif defined(HAVE_IP_DMA_V2)
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uint8_t stm32_dma_intget(unsigned int controller, uint8_t stream);
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#endif
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#endif /* CONFIG_ARCH_HIPRI_INTERRUPT */
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_SRC_STM32F0L0G0_STM32_DMA_H */
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