b0d24f53c4
Co-authored-by: Alan Carvalho de Assis <alan.carvalho@espressif.com> Signed-off-by: Gustavo Henrique Nihei <gustavo.nihei@espressif.com>
96 lines
3.2 KiB
C
96 lines
3.2 KiB
C
/****************************************************************************
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* arch/xtensa/src/esp32s3/hardware/esp32s3_rom_layout.h
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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#ifndef __ARCH_XTENSA_SRC_ESP32S3_HARDWARE_ESP32S3_ROM_LAYOUT_H
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#define __ARCH_XTENSA_SRC_ESP32S3_HARDWARE_ESP32S3_ROM_LAYOUT_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <stdint.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Structure and functions for returning ROM global layout
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*
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* This is for address symbols defined in the linker script,
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* which may change during ECOs.
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*/
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struct esp32s3_rom_layout_s
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{
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uintptr_t dram0_stack_shared_mem_start;
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uintptr_t dram0_rtos_reserved_start;
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uintptr_t stack_sentry;
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uintptr_t stack;
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uintptr_t stack_sentry_app;
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uintptr_t stack_app;
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/* BTDM data */
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uintptr_t data_start_btdm;
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uintptr_t data_end_btdm;
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uintptr_t bss_start_btdm;
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uintptr_t bss_end_btdm;
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uintptr_t data_start_btdm_rom;
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uintptr_t data_end_btdm_rom;
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uintptr_t data_start_interface_btdm;
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uintptr_t data_end_interface_btdm;
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uintptr_t bss_start_interface_btdm;
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uintptr_t bss_end_interface_btdm;
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/* PHY data */
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uintptr_t dram_start_phyrom;
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uintptr_t dram_end_phyrom;
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/* Wi-Fi data */
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uintptr_t dram_start_coexist;
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uintptr_t dram_end_coexist;
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uintptr_t dram_start_net80211;
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uintptr_t dram_end_net80211;
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uintptr_t dram_start_pp;
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uintptr_t dram_end_pp;
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uintptr_t data_start_interface_coexist;
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uintptr_t data_end_interface_coexist;
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uintptr_t bss_start_interface_coexist;
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uintptr_t bss_end_interface_coexist;
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uintptr_t data_start_interface_net80211;
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uintptr_t data_end_interface_net80211;
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uintptr_t bss_start_interface_net80211;
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uintptr_t bss_end_interface_net80211;
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uintptr_t data_start_interface_pp;
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uintptr_t data_end_interface_pp;
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uintptr_t bss_start_interface_pp;
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uintptr_t bss_end_interface_pp;
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uintptr_t dram_start_usbdev_rom;
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uintptr_t dram_end_usbdev_rom;
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uintptr_t dram_start_uart_rom;
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uintptr_t dram_end_uart_rom;
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};
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extern const struct esp32s3_rom_layout_s *ets_rom_layout_p;
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#endif /* __ARCH_XTENSA_SRC_ESP32S3_HARDWARE_ESP32S3_ROM_LAYOUT_H */
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