495 lines
13 KiB
C
495 lines
13 KiB
C
/****************************************************************************
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* boards/arm/stm32/nucleo-f429zi/src/stm32_spi.c
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*
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <errno.h>
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#include <debug.h>
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#include <sys/param.h>
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#include <nuttx/spi/spi.h>
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#include <arch/board/board.h>
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#include "arm_internal.h"
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#include "chip.h"
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#include "stm32_gpio.h"
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#include "stm32_spi.h"
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#include "nucleo-144.h"
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#if defined(CONFIG_SPI)
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#if defined(CONFIG_NUCLEO_SPI1_TEST)
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# if defined(CONFIG_NUCLEO_SPI1_TEST_MODE0)
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# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE0
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# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE1)
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# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE1
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# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE2)
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# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE2
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# elif defined(CONFIG_NUCLEO_SPI1_TEST_MODE3)
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# define CONFIG_NUCLEO_SPI1_TEST_MODE SPIDEV_MODE3
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# else
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# error "No CONFIG_NUCLEO_SPI1_TEST_MODEx defined"
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# endif
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#endif
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#if defined(CONFIG_NUCLEO_SPI2_TEST)
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# if defined(CONFIG_NUCLEO_SPI2_TEST_MODE0)
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# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE0
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# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE1)
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# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE1
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# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE2)
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# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE2
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# elif defined(CONFIG_NUCLEO_SPI2_TEST_MODE3)
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# define CONFIG_NUCLEO_SPI2_TEST_MODE SPIDEV_MODE3
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# else
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# error "No CONFIG_NUCLEO_SPI2_TEST_MODEx defined"
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# endif
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#endif
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#if defined(CONFIG_NUCLEO_SPI3_TEST)
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# if defined(CONFIG_NUCLEO_SPI3_TEST_MODE0)
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# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE0
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# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE1)
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# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE1
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# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE2)
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# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE2
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# elif defined(CONFIG_NUCLEO_SPI3_TEST_MODE3)
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# define CONFIG_NUCLEO_SPI3_TEST_MODE SPIDEV_MODE3
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# else
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# error "No CONFIG_NUCLEO_SPI3_TEST_MODEx defined"
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# endif
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#endif
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/****************************************************************************
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* Private Data
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****************************************************************************/
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#if defined(CONFIG_STM32_SPI1)
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static const uint32_t g_spi1gpio[] =
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{
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# if defined(GPIO_SPI1_CS0)
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GPIO_SPI1_CS0,
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# else
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0,
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# endif
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# if defined(GPIO_SPI1_CS1)
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GPIO_SPI1_CS1,
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# else
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0,
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# endif
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# if defined(GPIO_SPI1_CS2)
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GPIO_SPI1_CS2,
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# else
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0,
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# endif
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# if defined(GPIO_SPI1_CS3)
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GPIO_SPI1_CS3
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# else
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0
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# endif
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};
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#endif
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#if defined(CONFIG_STM32_SPI2)
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static const uint32_t g_spi2gpio[] =
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{
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# if defined(GPIO_SPI2_CS0)
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GPIO_SPI2_CS0,
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# else
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0,
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# endif
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# if defined(GPIO_SPI2_CS1)
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GPIO_SPI2_CS1,
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# else
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0,
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# endif
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# if defined(GPIO_SPI2_CS2)
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GPIO_SPI2_CS2,
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# else
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0,
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# endif
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# if defined(GPIO_SPI2_CS3)
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GPIO_SPI2_CS3
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# else
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0
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# endif
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};
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#endif
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#if defined(CONFIG_STM32_SPI3)
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static const uint32_t g_spi3gpio[] =
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{
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# if defined(GPIO_SPI3_CS0)
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GPIO_SPI3_CS0,
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# else
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0,
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# endif
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# if defined(GPIO_SPI3_CS1)
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GPIO_SPI3_CS1,
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# else
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0,
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# endif
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# if defined(GPIO_SPI3_CS2)
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GPIO_SPI3_CS2,
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# else
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0,
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# endif
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# if defined(GPIO_SPI3_CS3)
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GPIO_SPI3_CS3
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# else
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0
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# endif
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};
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#endif
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#if defined(CONFIG_NUCLEO_SPI_TEST)
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# if defined(CONFIG_STM32_SPI1)
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struct spi_dev_s *spi1;
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# endif
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# if defined(CONFIG_STM32_SPI2)
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struct spi_dev_s *spi2;
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# endif
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# if defined(CONFIG_STM32_SPI3)
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struct spi_dev_s *spi3;
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# endif
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_spidev_initialize
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the Nucleo-144 board.
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*
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****************************************************************************/
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void weak_function stm32_spidev_initialize(void)
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{
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/* Configure SPI CS GPIO for output */
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#if defined(CONFIG_STM32_SPI1)
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for (int i = 0; i < nitems(g_spi1gpio); i++)
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{
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if (g_spi1gpio[i] != 0)
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{
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stm32_configgpio(g_spi1gpio[i]);
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}
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}
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#endif
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#if defined(CONFIG_STM32_SPI2)
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for (int i = 0; i < nitems(g_spi2gpio); i++)
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{
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if (g_spi2gpio[i] != 0)
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{
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stm32_configgpio(g_spi2gpio[i]);
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}
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}
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#endif
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#if defined(CONFIG_STM32_SPI3)
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for (int i = 0; i < nitems(g_spi3gpio); i++)
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{
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if (g_spi3gpio[i] != 0)
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{
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stm32_configgpio(g_spi3gpio[i]);
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}
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}
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#endif
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}
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/****************************************************************************
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* Name: stm32_spi1/2/3/4/5/6select and stm32_spi1/2/3/4/5/6status
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*
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* Description:
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* The external functions, stm32_spi1/2/3/4/5/6select and
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* stm32_spi1/2/3/4/5/6status must be provided by board-specific logic.
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* They are implementations of the select and status methods of
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* the SPI interface defined by struct spi_ops_s
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* (see include/nuttx/spi/spi.h). All other methods
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* (including stm32_spibus_initialize()) are provided by common
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* STM32 logic. To use this common SPI logic on your board:
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*
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* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
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* pins.
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* 2. Provide stm32_spi1/2/3/4/5/6select() and stm32_spi1/2/3/4/5/6status()
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* functions in your board-specific logic. These functions will
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* perform chip selection and status operations using GPIOs in
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* the way your board is configured.
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* 3. Add a calls to stm32_spibus_initialize() in your low level
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* application initialization logic
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* 4. The handle returned by stm32_spibus_initialize() may then be
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* used to bind the SPI driver to higher level logic (e.g., calling
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* mmcsd_spislotinitialize(), for example, will bind the SPI
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* driver to the SPI MMC/SD driver).
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*
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****************************************************************************/
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#ifdef CONFIG_STM32_SPI1
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void stm32_spi1select(struct spi_dev_s *dev,
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uint32_t devid, bool selected)
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{
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uint32_t index = SPIDEVID_INDEX(devid);
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spiinfo("devid: %d CS: %s\n",
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(int)devid, selected ? "assert" : "de-assert");
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if (g_spi1gpio[index] != 0)
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{
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stm32_gpiowrite(g_spi1gpio[index], !selected);
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}
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}
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uint8_t stm32_spi1status(struct spi_dev_s *dev, uint32_t devid)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_STM32_SPI2
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void stm32_spi2select(struct spi_dev_s *dev,
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uint32_t devid, bool selected)
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{
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uint32_t index = SPIDEVID_INDEX(devid);
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spiinfo("devid: %d CS: %s\n",
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(int)devid, selected ? "assert" : "de-assert");
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if (g_spi2gpio[index] != 0)
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{
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stm32_gpiowrite(g_spi2gpio[index], !selected);
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}
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}
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uint8_t stm32_spi2status(struct spi_dev_s *dev, uint32_t devid)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_STM32_SPI3
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void stm32_spi3select(struct spi_dev_s *dev,
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uint32_t devid, bool selected)
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{
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uint32_t index = SPIDEVID_INDEX(devid);
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spiinfo("devid: %d CS: %s\n",
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(int)devid, selected ? "assert" : "de-assert");
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if (g_spi3gpio[index] != 0)
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{
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stm32_gpiowrite(g_spi3gpio[index], !selected);
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}
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}
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uint8_t stm32_spi3status(struct spi_dev_s *dev, uint32_t devid)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_STM32_SPI4
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void stm32_spi4select(struct spi_dev_s *dev,
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uint32_t devid, bool selected)
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{
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spiinfo("devid: %d CS: %s\n",
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(int)devid, selected ? "assert" : "de-assert");
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}
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uint8_t stm32_spi4status(struct spi_dev_s *dev, uint32_t devid)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_STM32_SPI5
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void stm32_spi5select(struct spi_dev_s *dev,
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uint32_t devid, bool selected)
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{
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spiinfo("devid: %d CS: %s\n",
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(int)devid, selected ? "assert" : "de-assert");
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}
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uint8_t stm32_spi5status(struct spi_dev_s *dev, uint32_t devid)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_STM32_SPI6
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void stm32_spi6select(struct spi_dev_s *dev,
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uint32_t devid, bool selected)
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{
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spiinfo("devid: %d CS: %s\n",
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(int)devid, selected ? "assert" : "de-assert");
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}
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uint8_t stm32_spi6status(struct spi_dev_s *dev, uint32_t devid)
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{
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return 0;
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}
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#endif
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/****************************************************************************
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* Name: stm32_spi1/2/3/4/5/6cmddata
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*
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* Description:
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* Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
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* or command (false). This function must be provided by platform-specific
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* logic. This is an implementation of the cmddata method of the SPI
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* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
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*
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* Input Parameters:
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*
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* spi - SPI device that controls the bus the device that requires the CMD/
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* DATA selection.
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* devid - If there are multiple devices on the bus, this selects which one
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* to select cmd or data. NOTE: This design restricts, for example,
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* one one SPI display per SPI bus.
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* cmd - true: select command; false: select data
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#ifdef CONFIG_SPI_CMDDATA
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#ifdef CONFIG_STM32_SPI1
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int stm32_spi1cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
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{
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return -ENODEV;
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}
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#endif
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#ifdef CONFIG_STM32_SPI2
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int stm32_spi2cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
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{
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return -ENODEV;
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}
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#endif
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#ifdef CONFIG_STM32_SPI3
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int stm32_spi3cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
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{
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return -ENODEV;
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}
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#endif
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#ifdef CONFIG_STM32_SPI4
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int stm32_spi4cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
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{
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return -ENODEV;
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}
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#endif
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#ifdef CONFIG_STM32_SPI5
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int stm32_spi5cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
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{
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return -ENODEV;
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}
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#endif
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#ifdef CONFIG_STM32_SPI6
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int stm32_spi6cmddata(struct spi_dev_s *dev, uint32_t devid, bool cmd)
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{
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return -ENODEV;
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}
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#endif
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#endif /* CONFIG_SPI_CMDDATA */
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#if defined(CONFIG_NUCLEO_SPI_TEST)
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int stm32_spidev_bus_test(void)
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{
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/* Configure and test SPI */
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uint8_t *tx = (uint8_t *)CONFIG_NUCLEO_SPI_TEST_MESSAGE;
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#if defined(CONFIG_NUCLEO_SPI1_TEST)
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spi1 = stm32_spibus_initialize(1);
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if (!spi1)
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{
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syslog(LOG_ERR, "ERROR Failed to initialize SPI port 1\n");
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return -ENODEV;
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}
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/* Default SPI1 to NUCLEO_SPI1_FREQ and mode */
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SPI_SETFREQUENCY(spi1, CONFIG_NUCLEO_SPI1_TEST_FREQ);
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SPI_SETBITS(spi1, CONFIG_NUCLEO_SPI1_TEST_BITS);
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SPI_SETMODE(spi1, CONFIG_NUCLEO_SPI1_TEST_MODE);
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SPI_EXCHANGE(spi1, tx, NULL, nitems(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
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#endif
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#if defined(CONFIG_NUCLEO_SPI2_TEST)
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spi2 = stm32_spibus_initialize(2);
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if (!spi2)
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{
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syslog(LOG_ERR, "ERROR Failed to initialize SPI port 2\n");
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return -ENODEV;
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}
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/* Default SPI2 to NUCLEO_SPI2_FREQ and mode */
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SPI_SETFREQUENCY(spi2, CONFIG_NUCLEO_SPI2_TEST_FREQ);
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SPI_SETBITS(spi2, CONFIG_NUCLEO_SPI2_TEST_BITS);
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SPI_SETMODE(spi2, CONFIG_NUCLEO_SPI2_TEST_MODE);
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SPI_EXCHANGE(spi2, tx, NULL, nitems(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
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#endif
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#if defined(CONFIG_NUCLEO_SPI3_TEST)
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spi3 = stm32_spibus_initialize(3);
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if (!spi3)
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{
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syslog(LOG_ERR, "ERROR Failed to initialize SPI port 2\n");
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return -ENODEV;
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}
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/* Default SPI3 to NUCLEO_SPI3_FREQ and mode */
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SPI_SETFREQUENCY(spi3, CONFIG_NUCLEO_SPI3_TEST_FREQ);
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SPI_SETBITS(spi3, CONFIG_NUCLEO_SPI3_TEST_BITS);
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SPI_SETMODE(spi3, CONFIG_NUCLEO_SPI3_TEST_MODE);
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SPI_EXCHANGE(spi3, tx, NULL, nitems(CONFIG_NUCLEO_SPI_TEST_MESSAGE));
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#endif
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return OK;
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}
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#endif /* NUCLEO_SPI_TEST */
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#endif /* defined(CONFIG_SPI) */
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