nuttx/arch/risc-v
Jukka Laitinen c269adbff1 arch/risc-v/src/mpfs/mpfs_ddr.c: Correct erroneous register addresses in DDR training
Writes to MPFS_CFG_DDR_SGMII_PHY_EXPERT_DFI_STATUS_OVERRIDE register were not done properly. Use correct address for writes.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>
2023-07-18 10:11:10 -03:00
..
include arch/risc-v/espressif: Add full GPIO support 2023-06-24 13:11:45 +08:00
src arch/risc-v/src/mpfs/mpfs_ddr.c: Correct erroneous register addresses in DDR training 2023-07-18 10:11:10 -03:00
Kconfig boards/litex/arty_a7: Support building fully linked executables. 2023-06-28 15:16:28 +08:00