Jukka Laitinen 6a5d00f68c arch/risc-v/src/mpfs: Add CFG_DDR_SGMII_PHY_RPC156 register setting for DDR training ...

Decreasing the value may increase DQ/DQS window size. Keep the default value
(1) for the existing board configurations.

Signed-off-by: Jukka Laitinen <jukkax@ssrc.tii.ae>

2023-08-17 17:50:37 +08:00

..

board_liberodefs.h

arch/risc-v/src/mpfs: Add CFG_DDR_SGMII_PHY_RPC156 register setting for DDR training

2023-08-17 17:50:37 +08:00

board.h

risc-v/mpfs: integrate fpga i2c driver

2023-05-29 20:45:01 +08:00