143 lines
6.6 KiB
C
143 lines
6.6 KiB
C
/****************************************************************************
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* arch/arm/include/stm32f0/irq.h
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*
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* Copyright (C) 2017 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Alan Carvalho de Assis <acassis@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/* This file should never be included directed but, rather, only indirectly
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* through nuttx/irq.h
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*/
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#ifndef __ARCH_ARM_INCLUDE_STM32F0_IRQ_H
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#define __ARCH_ARM_INCLUDE_STM32F0_IRQ_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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#endif
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#include <arch/stm32f0/chip.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* IRQ numbers. The IRQ number corresponds vector number and hence map
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* directly to bits in the NVIC. This does, however, waste several words of
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* memory in the IRQ to handle mapping tables.
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*/
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/* Common Processor Exceptions (vectors 0-15) */
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#define STM32F0_IRQ_RESERVED (0) /* Reserved vector (only used with CONFIG_DEBUG_FEATURES) */
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/* Vector 0: Reset stack pointer value */
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/* Vector 1: Reset (not handler as an IRQ) */
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#define STM32F0_IRQ_NMI (2) /* Vector 2: Non-Maskable Interrupt (NMI) */
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#define STM32F0_IRQ_HARDFAULT (3) /* Vector 3: Hard fault */
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/* Vectors 4-10: Reserved */
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#define STM32F0_IRQ_SVCALL (11) /* Vector 11: SVC call */
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/* Vector 12-13: Reserved */
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#define STM32F0_IRQ_PENDSV (14) /* Vector 14: Pendable system service request */
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#define STM32F0_IRQ_SYSTICK (15) /* Vector 15: System tick */
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/* External interrupts (vectors >= 16) */
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#define STM32F0_IRQ_EXTINT (16) /* Vector number of the first external interrupt */
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#define STM32F0_IRQ_WWDG (16) /* Vector 16: WWDG */
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#define STM32F0_IRQ_PVD_VDDIO2 (17) /* Vector 17: PVD_VDDIO2 */
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#define STM32F0_IRQ_RTC (18) /* Vector 18: RTC */
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#define STM32F0_IRQ_FLASH (19) /* Vector 19: FLASH */
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#define STM32F0_IRQ_RCC_CRS (20) /* Vector 20: RCC and CRS */
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#define STM32F0_IRQ_EXTI0_1 (21) /* Vector 21: EXTI0_1 */
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#define STM32F0_IRQ_EXTI2_3 (22) /* Vector 22: EXTI2_3 */
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#define STM32F0_IRQ_EXTI4_15 (23) /* Vector 23: EXTI4_15 */
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#define STM32F0_IRQ_TSC (24) /* Vector 24: TSC */
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#define STM32F0_IRQ_DMA_CH1 (25) /* Vector 25: DMA_CH1 */
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#define STM32F0_IRQ_DMA_CH23 (26) /* Vector 26: DMA_CH2_3 and DMA2_CH1_2 */
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#define STM32F0_IRQ_DMA_CH4567 (27) /* Vector 27: DMA_CH4_5_6_7 and DMA2_CH3_4_5 */
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#define STM32F0_IRQ_ADC_COMP (28) /* Vector 28: ADC_COMP */
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#define STM32F0_IRQ_TIM1_BRK (29) /* Vector 29: TIM1_BRK_UP_TRG_COM */
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#define STM32F0_IRQ_TIM1_CC (30) /* Vector 30: TIM1_CC */
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#define STM32F0_IRQ_TIM2 (31) /* Vector 31: TIM2 */
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#define STM32F0_IRQ_TIM3 (32) /* Vector 32: TIM3 */
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#define STM32F0_IRQ_TIM6_DAC (33) /* Vector 33: TIM6 and DAC */
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#define STM32F0_IRQ_TIM7 (34) /* Vector 34: TIM7 */
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#define STM32F0_IRQ_TIM14 (35) /* Vector 35: TIM14 */
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#define STM32F0_IRQ_TIM15 (36) /* Vector 36: TIM15 */
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#define STM32F0_IRQ_TIM16 (37) /* Vector 37: TIM16 */
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#define STM32F0_IRQ_TIM17 (38) /* Vector 38: TIM17 */
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#define STM32F0_IRQ_I2C1 (39) /* Vector 39: I2C1 */
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#define STM32F0_IRQ_I2C2 (40) /* Vector 40: I2C2 */
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#define STM32F0_IRQ_SPI1 (41) /* Vector 41: SPI1 */
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#define STM32F0_IRQ_SPI2 (42) /* Vector 42: SPI2 */
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#define STM32F0_IRQ_USART1 (43) /* Vector 43: USART1 */
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#define STM32F0_IRQ_USART2 (44) /* Vector 44: USART2 */
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#define STM32F0_IRQ_USART345678 (45) /* Vector 45: USART3_4_5_6_7_8 */
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#define STM32F0_IRQ_CEC_CAN (46) /* Vector 46: HDMI CEC and CAN */
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#define STM32F0_IRQ_USB (47) /* Vector 47: USB */
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#define NR_IRQS (48) /* 32 interrupts plus 16 exceptions */
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/****************************************************************************
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* Public Types
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****************************************************************************/
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#ifndef __ASSEMBLY__
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typedef void (*vic_vector_t)(uint32_t *regs);
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/****************************************************************************
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* Inline functions
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****************************************************************************/
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/****************************************************************************
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* Public Data
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_INCLUDE_STM32F0_IRQ_H */
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