121 lines
3.7 KiB
Plaintext
121 lines
3.7 KiB
Plaintext
############################################################################
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# arch/arm/src/a1x/Make.defs
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#
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# Licensed to the Apache Software Foundation (ASF) under one or more
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# contributor license agreements. See the NOTICE file distributed with
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# this work for additional information regarding copyright ownership. The
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# ASF licenses this file to you under the Apache License, Version 2.0 (the
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# "License"); you may not use this file except in compliance with the
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# License. You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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# License for the specific language governing permissions and limitations
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# under the License.
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#
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############################################################################
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# The vector table is the "head" object, i.e., the one that must forced into
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# the link in order to draw in all of the other components
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HEAD_ASRC = arm_vectortab.S
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ifeq ($(CONFIG_BUILD_KERNEL),y)
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crt0$(OBJEXT): crt0.c
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$(CC) $(CFLAGS) -c armv7-a$(DELIM)crt0.c -o crt0$(OBJEXT)
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STARTUP_OBJS = crt0$(OBJEXT)
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endif
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# Force the start-up logic to be at the beginning of the .text to simplify
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# debug.
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ifeq ($(CONFIG_PAGING),y)
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CMN_ASRCS = arm_pghead.S
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else
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CMN_ASRCS = arm_head.S
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endif
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# Common assembly language files
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CMN_ASRCS += arm_vectors.S arm_fpuconfig.S arm_fullcontextrestore.S
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CMN_ASRCS += arm_saveusercontext.S arm_vectoraddrexcptn.S
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CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
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CMN_ASRCS += cp15_coherent_dcache.S cp15_invalidate_dcache.S
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CMN_ASRCS += cp15_clean_dcache.S cp15_flush_dcache.S cp15_invalidate_dcache_all.S
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CMN_ASRCS += cp15_clean_dcache_all.S cp15_flush_dcache_all.S cp15_cache_size.S
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# Common C source files
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CMN_CSRCS = arm_initialize.c arm_interruptcontext.c arm_exit.c arm_createstack.c
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CMN_CSRCS += arm_releasestack.c arm_usestack.c arm_vfork.c arm_puts.c arm_mdelay.c
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CMN_CSRCS += arm_stackframe.c arm_udelay.c arm_modifyreg8.c arm_modifyreg16.c
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CMN_CSRCS += arm_modifyreg32.c
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CMN_CSRCS += arm_assert.c arm_blocktask.c arm_dataabort.c
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CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
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CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
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CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
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CMN_CSRCS += arm_unblocktask.c arm_undefinedinsn.c arm_tcbinfo.c
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CMN_CSRCS += arm_switchcontext.c
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# Use common heap allocation for now (may need to be customized later)
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CMN_CSRCS += arm_allocateheap.c
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# Configuration dependent C and assembly language files
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ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)
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CMN_CSRCS += arm_idle.c
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endif
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ifeq ($(CONFIG_PAGING),y)
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CMN_CSRCS += arm_allocpage.c arm_checkmapping.c arm_pginitialize.c
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CMN_CSRCS += arm_va2pte.c
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endif
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ifeq ($(CONFIG_BUILD_KERNEL),y)
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CMN_CSRCS += arm_task_start.c arm_pthread_start.c arm_signal_dispatch.c
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endif
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ifeq ($(CONFIG_ARCH_ADDRENV),y)
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CMN_CSRCS += arm_addrenv.c arm_addrenv_utils.c arm_pgalloc.c
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ifeq ($(CONFIG_ARCH_STACK_DYNAMIC),y)
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CMN_CSRCS += arm_addrenv_ustack.c
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endif
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ifeq ($(CONFIG_ARCH_KERNEL_STACK),y)
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CMN_CSRCS += arm_addrenv_kstack.c
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endif
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ifeq ($(CONFIG_MM_SHM),y)
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CMN_CSRCS += arm_addrenv_shm.c
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endif
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endif
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ifeq ($(CONFIG_MM_PGALLOC),y)
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CMN_CSRCS += arm_physpgaddr.c
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ifeq ($(CONFIG_ARCH_PGPOOL_MAPPING),y)
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CMN_CSRCS += arm_virtpgaddr.c
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endif
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endif
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CMN_CSRCS += arm_cache.c
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ifeq ($(CONFIG_ARCH_FPU),y)
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CMN_ASRCS += arm_savefpu.S arm_restorefpu.S
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endif
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ifeq ($(CONFIG_STACK_COLORATION),y)
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CMN_CSRCS += arm_checkstack.c
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endif
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# A1x-specific C source files
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CHIP_CSRCS = a1x_boot.c a1x_irq.c a1x_pio.c a1x_lowputc.c a1x_serial.c
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ifneq ($(CONFIG_SCHED_TICKLESS),y)
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CHIP_CSRCS += a1x_timerisr.c
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endif
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