0a288ac3db
configs: add support for nucleo-f103rb, nucleo-f207zg and nucleo-l152re Approved-by: GregoryN <gnutt@nuttx.org>
190 lines
7.2 KiB
C
190 lines
7.2 KiB
C
/****************************************************************************
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* configs/nucleo-f207zg/include/board.h
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* include/arch/board/board.h
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Mateusz Szafoni <raiden00@railab.me>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __CONFIG_NUCLEOF207ZG_INCLUDE_BOARD_H
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#define __CONFIG_NUCLEOF207ZG_INCLUDE_BOARD_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifndef __ASSEMBLY__
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# include <stdint.h>
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# include <stdbool.h>
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#endif
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#ifdef __KERNEL__
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# include "stm32.h"
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#endif
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* Clocking *****************************************************************/
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/* HSI - 16 MHz RC factory-trimmed
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* LSI - 32 KHz RC
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* HSE - 8 MHz from MCO output of ST-LINK
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* LSE - 32.768 kHz
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*/
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#define STM32_BOARD_XTAL 8000000ul
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#define STM32_HSI_FREQUENCY 16000000ul
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#define STM32_LSI_FREQUENCY 32000
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#define STM32_HSE_FREQUENCY STM32_BOARD_XTAL
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#define STM32_LSE_FREQUENCY 32768 /* X2 on board */
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/* Main PLL Configuration.
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*
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* Formulae:
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*
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* VCO input frequency = PLL input clock frequency / PLLM, 2 <= PLLM <= 63
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* VCO output frequency = VCO input frequency × PLLN, 50 <= PLLN <= 432
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* PLL output clock frequency = VCO frequency / PLLP, PLLP = 2, 4, 6, or 8
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* USB OTG FS clock frequency = VCO frequency / PLLQ, 2 <= PLLQ <= 15
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*
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* We will configure like this
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*
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* PLL source is HSE
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* PLL_VCO = (STM32_HSE_FREQUENCY / PLLM) * PLLN
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* = (8,000,000 / 2) * 100
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* = 400,000,000
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* SYSCLK = PLL_VCO / PLLP
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* = 400,000,000 / 4 = 100,000,000
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* RNG Clock
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* = PLL_VCO / PLLQ
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* = 400,000,000 / 8 = 50,000,000
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*
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*/
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#define STM32_PLLCFG_PLLM RCC_PLLCFG_PLLM(2)
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#define STM32_PLLCFG_PLLN RCC_PLLCFG_PLLN(100)
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#define STM32_PLLCFG_PLLP RCC_PLLCFG_PLLP_4
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#define STM32_PLLCFG_PLLQ RCC_PLLCFG_PLLQ(8)
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#define STM32_SYSCLK_FREQUENCY 100000000ul
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/* AHB clock (HCLK) is SYSCLK (100MHz) */
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#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK /* HCLK = SYSCLK / 1 */
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#define STM32_HCLK_FREQUENCY STM32_SYSCLK_FREQUENCY
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#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* Same as above, to satisfy compiler */
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/* APB1 clock (PCLK1) is HCLK/2 (50MHz) */
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#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2 /* PCLK1 = HCLK / 2 */
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#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2)
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/* Timers driven from APB1 will be twice PCLK1 */
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/* REVISIT */
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#define STM32_APB1_TIM5_CLKIN (2*STM32_PCLK1_FREQUENCY)
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#define STM32_APB1_TIM6_CLKIN (2*STM32_PCLK1_FREQUENCY)
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/* APB2 clock (PCLK2) is HCLK (100MHz) */
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#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK /* PCLK2 = HCLK */
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#define STM32_PCLK2_FREQUENCY (STM32_HCLK_FREQUENCY)
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/* TODO: Timers */
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/* LED definitions **********************************************************/
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/* The Nucleo-144 board has numerous LEDs but only three, LD1 a Green LED, LD2 a Blue
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* LED and LD3 a Red LED, that can be controlled by software. The following
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* definitions assume the default Solder Bridges are installed.
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*
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* If CONFIG_ARCH_LEDS is not defined, then the user can control the LEDs in any way.
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* The following definitions are used to access individual LEDs.
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*/
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/* LED index values for use with board_userled() */
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#define BOARD_LED1 0
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#define BOARD_LED2 1
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#define BOARD_LED3 2
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#define BOARD_NLEDS 3
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#define BOARD_LED_GREEN BOARD_LED1
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#define BOARD_LED_BLUE BOARD_LED2
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#define BOARD_LED_RED BOARD_LED3
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/* LED bits for use with board_userled_all() */
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#define BOARD_LED1_BIT (1 << BOARD_LED1)
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#define BOARD_LED2_BIT (1 << BOARD_LED2)
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#define BOARD_LED3_BIT (1 << BOARD_LED3)
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/* If CONFIG_ARCH_LEDS is defined, the usage by the board port is defined in
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* include/board.h and src/stm32_leds.c. The LEDs are used to encode OS-related
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* events as follows:
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*
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*
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* SYMBOL Meaning LED state
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* Red Green Blue
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* ---------------------- -------------------------- ------ ------ ----*/
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#define LED_STARTED 0 /* NuttX has been started OFF OFF OFF */
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#define LED_HEAPALLOCATE 1 /* Heap has been allocated OFF OFF ON */
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#define LED_IRQSENABLED 2 /* Interrupts enabled OFF ON OFF */
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#define LED_STACKCREATED 3 /* Idle stack created OFF ON ON */
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#define LED_INIRQ 4 /* In an interrupt N/C N/C GLOW */
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#define LED_SIGNAL 5 /* In a signal handler N/C GLOW N/C */
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#define LED_ASSERTION 6 /* An assertion failed GLOW N/C GLOW */
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#define LED_PANIC 7 /* The system has crashed Blink OFF N/C */
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#define LED_IDLE 8 /* MCU is is sleep mode ON OFF OFF */
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/* Button definitions *******************************************************/
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/* The NUCLEO board supports one button: Pushbutton B1, labeled "User", is
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* connected to GPIO PC13. A high value will be sensed when the button is depressed.
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*/
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#define BUTTON_USER 0
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#define NUM_BUTTONS 1
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#define BUTTON_USER_BIT (1 << BUTTON_USER)
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/* Alternate function pin selections ****************************************/
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/* USART3 (Nucleo Virtual Console) */
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#define GPIO_USART3_RX GPIO_USART3_RX_3 /* PD9 */
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#define GPIO_USART3_TX GPIO_USART3_TX_3 /* PD8 */
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#endif /* __CONFIG_NUCLEO_F207ZG_INCLUDE_BOARD_H */
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