Huang Qi d0210c1174 riscv_tcbinfo: Fix register ordering for PC
X0 is always 0 but still should be transfered to the client, but it don't existed in thread context, use any other register for it, and its value will be omitted by gdb client.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>
2024-07-08 21:13:25 +08:00
..
2024-07-05 13:17:02 +08:00
2024-05-11 17:57:59 +02:00
2024-06-28 17:52:56 +08:00