2012-03-10 01:15:45 +01:00
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README
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======
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This README discusses issues unique to NuttX configurations for the
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2012-04-08 00:32:35 +02:00
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STMicro STM3220G-EVAL development board.
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2012-03-10 01:15:45 +01:00
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Contents
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========
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- Ethernet
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2017-11-26 18:36:03 +01:00
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- LEDs
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2012-03-10 01:15:45 +01:00
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- PWM
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- CAN
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2012-04-08 00:32:35 +02:00
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- FSMC SRAM
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2012-05-28 21:48:26 +02:00
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- I/O Expanders
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2012-04-08 00:32:35 +02:00
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- STM3220G-EVAL-specific Configuration Options
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2012-03-10 01:15:45 +01:00
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- Configurations
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Ethernet
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========
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The Ethernet driver is configured to use the MII interface:
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Board Jumper Settings:
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Jumper Description
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JP8 To enable MII, JP8 should not be fitted.
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JP6 2-3: Enable MII interface mode
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JP5 2-3: Provide 25 MHz clock for MII or 50 MHz clock for RMII by MCO at PA8
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SB1 Not used with MII
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LEDs
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====
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The STM3220G-EVAL board has four LEDs labeled LD1, LD2, LD3 and LD4 on the
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board.. These LEDs are not used by the board port unless CONFIG_ARCH_LEDS is
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defined. In that case, the usage by the board port is defined in
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include/board.h and src/up_leds.c. The LEDs are used to encode OS-related\
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events as follows:
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2012-05-28 21:48:26 +02:00
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SYMBOL Meaning LED1* LED2 LED3 LED4
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------------------- ----------------------- ------- ------- ------- ------
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LED_STARTED NuttX has been started ON OFF OFF OFF
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LED_HEAPALLOCATE Heap has been allocated OFF ON OFF OFF
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LED_IRQSENABLED Interrupts enabled ON ON OFF OFF
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LED_STACKCREATED Idle stack created OFF OFF ON OFF
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LED_INIRQ In an interrupt** ON N/C N/C OFF
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LED_SIGNAL In a signal handler*** N/C ON N/C OFF
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LED_ASSERTION An assertion failed ON ON N/C OFF
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LED_PANIC The system has crashed N/C N/C N/C ON
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LED_IDLE STM32 is is sleep mode (Optional, not used)
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2012-03-10 01:15:45 +01:00
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* If LED1, LED2, LED3 are statically on, then NuttX probably failed to boot
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and these LEDs will give you some indication of where the failure was
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** The normal state is LED3 ON and LED1 faintly glowing. This faint glow
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2015-04-23 22:04:43 +02:00
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is because of timer interrupts that result in the LED being illuminated
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2012-03-10 01:15:45 +01:00
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on a small proportion of the time.
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*** LED2 may also flicker normally if signals are processed.
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PWM
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===
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The STM3220G-Eval has no real on-board PWM devices, but the board can be
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configured to output a pulse train using timer output pins. The following
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pins have been use to generate PWM output (see board.h for some other
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candidates):
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TIM4 CH2. Pin PD13 is used by the FSMC (FSMC_A18) and is also connected
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to the Motor Control Connector (CN5) just for this purpose. If FSMC is
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not enabled, then FSMC_A18 will not be used (and will be tri-stated from
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the LCD).
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CONFIGURATION:
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CONFIG_STM32_TIM4=y
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CONFIG_PWM=n
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CONFIG_PWM_PULSECOUNT=n
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CONFIG_STM32_TIM4_PWM=y
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CONFIG_STM32_TIM4_CHANNEL=2
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ACCESS:
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Daughterboard Extension Connector, CN3, pin 32
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Ground is available on CN3, pin1
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NOTE: TIM4 hardware will not support pulse counting.
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TIM8 CH4: Pin PC9 is used by the microSD card (MicroSDCard_D1) and I2S
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(I2S_CKIN) but can be completely disconnected from both by opening JP16.
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CONFIGURATION:
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CONFIG_STM32_TIM8=y
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CONFIG_PWM=n
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CONFIG_PWM_PULSECOUNT=y
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CONFIG_STM32_TIM8_PWM=y
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CONFIG_STM32_TIM8_CHANNEL=4
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ACCESS:
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Daughterboard Extension Connector, CN3, pin 17
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Ground is available on CN3, pin1
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CAN
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===
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Connector 10 (CN10) is DB-9 male connector that can be used with CAN1 or CAN2.
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JP10 connects CAN1_RX or CAN2_RX to the CAN transceiver
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JP3 connects CAN1_TX or CAN2_TX to the CAN transceiver
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CAN signals are then available on CN10 pins:
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CN10 Pin 7 = CANH
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CN10 Pin 2 = CANL
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Mapping to STM32 GPIO pins:
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PD0 = FSMC_D2 & CAN1_RX
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PD1 = FSMC_D3 & CAN1_TX
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PB13 = ULPI_D6 & CAN2_TX
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PB5 = ULPI_D7 & CAN2_RX
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Configuration Options:
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CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
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CONFIG_STM32_CAN2 must also be defined)
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CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
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Standard 11-bit IDs.
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CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
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Default: 8
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CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
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Default: 4
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CONFIG_STM32_CAN1 - Enable support for CAN1
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CONFIG_STM32_CAN2 - Enable support for CAN2
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2018-06-28 22:47:14 +02:00
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CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
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is defined.
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CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
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is defined.
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2018-06-28 23:44:42 +02:00
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CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
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Default: 6
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CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
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Default: 7
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2016-06-15 23:45:27 +02:00
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CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
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2012-03-10 01:15:45 +01:00
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dump of all CAN registers.
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2012-05-28 21:48:26 +02:00
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FSMC SRAM
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=========
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On-board SRAM
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-------------
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A 16 Mbit SRAM is connected to the STM32F407IGH6 FSMC bus which shares the same
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I/Os with the CAN1 bus. Jumper settings:
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JP1: Connect PE4 to SRAM as A20
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JP2: onnect PE3 to SRAM as A19
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JP3 and JP10 must not be fitted for SRAM and LCD application. JP3 and JP10
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select CAN1 or CAN2 if fitted; neither if not fitted.
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The on-board SRAM can be configured by setting
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CONFIG_STM32_FSMC=y
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2019-05-27 15:21:52 +02:00
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CONFIG_STM32_EXTERNAL_RAM=y
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2012-05-28 21:48:26 +02:00
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CONFIG_HEAP2_BASE=0x64000000
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2012-09-06 01:02:43 +02:00
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CONFIG_HEAP2_SIZE=2097152
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2012-05-28 21:48:26 +02:00
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CONFIG_MM_REGIONS=2
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Configuration Options
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---------------------
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Internal SRAM is available in all members of the STM32 family. In addition
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to internal SRAM, SRAM may also be available through the FSMC. In order to
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use FSMC SRAM, the following additional things need to be present in the
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NuttX configuration file:
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2019-05-27 15:21:52 +02:00
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CONFIG_STM32_FSMC=y : Enables the FSMC
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CONFIG_STM32_EXTERNAL_RAM=y : Indicates that SRAM is available via the
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FSMC (as opposed to an LCD or FLASH).
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CONFIG_HEAP2_BASE : The base address of the SRAM in the FSMC
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address space
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CONFIG_HEAP2_SIZE : The size of the SRAM in the FSMC
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address space
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CONFIG_MM_REGIONS : Must be set to a large enough value to
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include the FSMC SRAM
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2012-05-28 21:48:26 +02:00
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SRAM Configurations
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-------------------
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There are 2 possible SRAM configurations:
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Configuration 1. System SRAM (only)
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CONFIG_MM_REGIONS == 1
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Configuration 2. System SRAM and FSMC SRAM
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CONFIG_MM_REGIONS == 2
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2019-05-27 15:21:52 +02:00
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CONFIG_STM32_EXTERNAL_RAM defined
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2012-05-28 21:48:26 +02:00
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I/O Expanders
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=============
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2012-05-29 02:54:22 +02:00
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The STM3220G-EVAL has two STMPE811QTR I/O expanders on board both connected to
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2012-05-28 21:48:26 +02:00
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the STM32 via I2C1. They share a common interrupt line: PI2.
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2012-05-29 02:54:22 +02:00
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STMPE811 U24, I2C address 0x41 (7-bit)
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2012-05-28 21:48:26 +02:00
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------ ---- ---------------- --------------------------------------------
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STPE11 PIN BOARD SIGNAL BOARD CONNECTION
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------ ---- ---------------- --------------------------------------------
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Y- TouchScreen_Y- LCD Connector XL
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X- TouchScreen_X- LCD Connector XR
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Y+ TouchScreen_Y+ LCD Connector XD
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X+ TouchScreen_X+ LCD Connector XU
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IN3 EXP_IO9
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IN2 EXP_IO10
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IN1 EXP_IO11
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IN0 EXP_IO12
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2012-05-29 02:54:22 +02:00
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STMPE811 U29, I2C address 0x44 (7-bit)
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2012-05-28 21:48:26 +02:00
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------ ---- ---------------- --------------------------------------------
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STPE11 PIN BOARD SIGNAL BOARD CONNECTION
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------ ---- ---------------- --------------------------------------------
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Y- EXP_IO1
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X- EXP_IO2
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Y+ EXP_IO3
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X+ EXP_IO4
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IN3 EXP_IO5
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IN2 EXP_IO6
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IN1 EXP_IO7
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IN0 EXP_IO8
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2012-03-10 01:15:45 +01:00
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STM3220G-EVAL-specific Configuration Options
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============================================
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH - Identifies the arch/ subdirectory. This should
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be set to:
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH=arm
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_family - For use in C code:
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_ARM=y
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_architecture - For use in C code:
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_CORTEXM3=y
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_CHIP - Identifies the arch/*/chip subdirectory
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_CHIP=stm32
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_CHIP_name - For use in C code to identify the exact
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chip:
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_CHIP_STM32F207IG=y
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2012-03-10 01:15:45 +01:00
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CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG - Enables special STM32 clock
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configuration features.
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CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG=n
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2019-08-05 15:13:48 +02:00
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CONFIG_ARCH_BOARD - Identifies the boards/ subdirectory and
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2012-05-28 21:48:26 +02:00
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hence, the board that supports the particular chip or SoC.
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_BOARD=stm3220g_eval (for the STM3220G-EVAL development board)
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_BOARD_name - For use in C code
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_BOARD_STM3220G_EVAL=y
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_LOOPSPERMSEC - Must be calibrated for correct operation
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of delay loops
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ENDIAN_BIG - define if big endian (default is little
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endian)
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2012-03-10 01:15:45 +01:00
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2013-07-26 18:09:17 +02:00
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CONFIG_RAM_SIZE - Describes the installed DRAM (SRAM in this case):
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2012-03-10 01:15:45 +01:00
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2013-07-26 18:09:17 +02:00
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CONFIG_RAM_SIZE=0x00010000 (64Kb)
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2012-03-10 01:15:45 +01:00
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2013-07-26 18:09:17 +02:00
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CONFIG_RAM_START - The start address of installed DRAM
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2012-03-10 01:15:45 +01:00
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2013-07-26 18:09:17 +02:00
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CONFIG_RAM_START=0x20000000
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2012-03-10 01:15:45 +01:00
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2012-04-08 00:32:35 +02:00
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In addition to internal SRAM, SRAM may also be available through the FSMC.
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In order to use FSMC SRAM, the following additional things need to be
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present in the NuttX configuration file:
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2019-05-27 15:21:52 +02:00
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CONFIG_STM32_EXTERNAL_RAM - Indicates that SRAM is available via the
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2012-04-08 00:32:35 +02:00
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FSMC (as opposed to an LCD or FLASH).
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2012-03-10 01:15:45 +01:00
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2012-09-06 01:02:43 +02:00
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CONFIG_HEAP2_BASE - The base address of the SRAM in the FSMC address space (hex)
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2012-04-08 00:32:35 +02:00
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2012-09-06 01:02:43 +02:00
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CONFIG_HEAP2_SIZE - The size of the SRAM in the FSMC address space (decimal)
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2012-04-08 00:32:35 +02:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to boards that
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have LEDs
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_INTERRUPTSTACK - This architecture supports an interrupt
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stack. If defined, this symbol is the size of the interrupt
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stack in bytes. If not defined, the user task stacks will be
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used during interrupt handling.
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_STACKDUMP - Do stack dumps after assertions
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2012-03-10 01:15:45 +01:00
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2012-05-28 21:48:26 +02:00
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CONFIG_ARCH_LEDS - Use LEDs to show state. Unique to board architecture.
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2012-03-10 01:15:45 +01:00
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Individual subsystems can be enabled:
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2012-05-28 21:48:26 +02:00
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AHB1
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----
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CONFIG_STM32_CRC
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CONFIG_STM32_BKPSRAM
|
|
|
|
CONFIG_STM32_DMA1
|
|
|
|
CONFIG_STM32_DMA2
|
|
|
|
CONFIG_STM32_ETHMAC
|
|
|
|
CONFIG_STM32_OTGHS
|
|
|
|
|
|
|
|
AHB2
|
|
|
|
----
|
|
|
|
CONFIG_STM32_DCMI
|
|
|
|
CONFIG_STM32_CRYP
|
|
|
|
CONFIG_STM32_HASH
|
|
|
|
CONFIG_STM32_RNG
|
|
|
|
CONFIG_STM32_OTGFS
|
|
|
|
|
|
|
|
AHB3
|
|
|
|
----
|
|
|
|
CONFIG_STM32_FSMC
|
|
|
|
|
|
|
|
APB1
|
|
|
|
----
|
|
|
|
CONFIG_STM32_TIM2
|
|
|
|
CONFIG_STM32_TIM3
|
|
|
|
CONFIG_STM32_TIM4
|
|
|
|
CONFIG_STM32_TIM5
|
|
|
|
CONFIG_STM32_TIM6
|
|
|
|
CONFIG_STM32_TIM7
|
|
|
|
CONFIG_STM32_TIM12
|
|
|
|
CONFIG_STM32_TIM13
|
|
|
|
CONFIG_STM32_TIM14
|
|
|
|
CONFIG_STM32_WWDG
|
|
|
|
CONFIG_STM32_IWDG
|
|
|
|
CONFIG_STM32_SPI2
|
|
|
|
CONFIG_STM32_SPI3
|
|
|
|
CONFIG_STM32_USART2
|
|
|
|
CONFIG_STM32_USART3
|
|
|
|
CONFIG_STM32_UART4
|
|
|
|
CONFIG_STM32_UART5
|
|
|
|
CONFIG_STM32_I2C1
|
|
|
|
CONFIG_STM32_I2C2
|
|
|
|
CONFIG_STM32_I2C3
|
|
|
|
CONFIG_STM32_CAN1
|
|
|
|
CONFIG_STM32_CAN2
|
|
|
|
CONFIG_STM32_DAC1
|
|
|
|
CONFIG_STM32_DAC2
|
|
|
|
CONFIG_STM32_PWR -- Required for RTC
|
|
|
|
|
|
|
|
APB2
|
|
|
|
----
|
|
|
|
CONFIG_STM32_TIM1
|
|
|
|
CONFIG_STM32_TIM8
|
|
|
|
CONFIG_STM32_USART1
|
|
|
|
CONFIG_STM32_USART6
|
|
|
|
CONFIG_STM32_ADC1
|
|
|
|
CONFIG_STM32_ADC2
|
|
|
|
CONFIG_STM32_ADC3
|
|
|
|
CONFIG_STM32_SDIO
|
|
|
|
CONFIG_STM32_SPI1
|
|
|
|
CONFIG_STM32_SYSCFG
|
|
|
|
CONFIG_STM32_TIM9
|
|
|
|
CONFIG_STM32_TIM10
|
|
|
|
CONFIG_STM32_TIM11
|
2012-03-10 01:15:45 +01:00
|
|
|
|
|
|
|
Timer devices may be used for different purposes. One special purpose is
|
|
|
|
to generate modulated outputs for such things as motor control. If CONFIG_STM32_TIMn
|
|
|
|
is defined (as above) then the following may also be defined to indicate that
|
|
|
|
the timer is intended to be used for pulsed output modulation, ADC conversion,
|
|
|
|
or DAC conversion. Note that ADC/DAC require two definition: Not only do you have
|
|
|
|
to assign the timer (n) for used by the ADC or DAC, but then you also have to
|
|
|
|
configure which ADC or DAC (m) it is assigned to.
|
|
|
|
|
2012-05-28 21:48:26 +02:00
|
|
|
CONFIG_STM32_TIMn_PWM Reserve timer n for use by PWM, n=1,..,14
|
|
|
|
CONFIG_STM32_TIMn_ADC Reserve timer n for use by ADC, n=1,..,14
|
|
|
|
CONFIG_STM32_TIMn_ADCm Reserve timer n to trigger ADCm, n=1,..,14, m=1,..,3
|
|
|
|
CONFIG_STM32_TIMn_DAC Reserve timer n for use by DAC, n=1,..,14
|
|
|
|
CONFIG_STM32_TIMn_DACm Reserve timer n to trigger DACm, n=1,..,14, m=1,..,2
|
2012-03-10 01:15:45 +01:00
|
|
|
|
|
|
|
For each timer that is enabled for PWM usage, we need the following additional
|
|
|
|
configuration settings:
|
|
|
|
|
2012-05-28 21:48:26 +02:00
|
|
|
CONFIG_STM32_TIMx_CHANNEL - Specifies the timer output channel {1,..,4}
|
2012-03-10 01:15:45 +01:00
|
|
|
|
|
|
|
NOTE: The STM32 timers are each capable of generating different signals on
|
|
|
|
each of the four channels with different duty cycles. That capability is
|
|
|
|
not supported by this driver: Only one output channel per timer.
|
|
|
|
|
|
|
|
JTAG Enable settings (by default JTAG-DP and SW-DP are disabled):
|
|
|
|
|
2012-05-28 21:48:26 +02:00
|
|
|
CONFIG_STM32_JTAG_FULL_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
|
|
|
|
CONFIG_STM32_JTAG_NOJNTRST_ENABLE - Enables full SWJ (JTAG-DP + SW-DP)
|
|
|
|
but without JNTRST.
|
|
|
|
CONFIG_STM32_JTAG_SW_ENABLE - Set JTAG-DP disabled and SW-DP enabled
|
2012-03-10 01:15:45 +01:00
|
|
|
|
|
|
|
STM3220xxx specific device driver settings
|
|
|
|
|
2012-05-28 21:48:26 +02:00
|
|
|
CONFIG_U[S]ARTn_SERIAL_CONSOLE - selects the USARTn (n=1,2,3) or UART
|
2012-03-10 01:15:45 +01:00
|
|
|
m (m=4,5) for the console and ttys0 (default is the USART1).
|
2012-05-28 21:48:26 +02:00
|
|
|
CONFIG_U[S]ARTn_RXBUFSIZE - Characters are buffered as received.
|
|
|
|
This specific the size of the receive buffer
|
|
|
|
CONFIG_U[S]ARTn_TXBUFSIZE - Characters are buffered before
|
|
|
|
being sent. This specific the size of the transmit buffer
|
|
|
|
CONFIG_U[S]ARTn_BAUD - The configure BAUD of the UART. Must be
|
|
|
|
CONFIG_U[S]ARTn_BITS - The number of bits. Must be either 7 or 8.
|
|
|
|
CONFIG_U[S]ARTn_PARTIY - 0=no parity, 1=odd parity, 2=even parity
|
|
|
|
CONFIG_U[S]ARTn_2STOP - Two stop bits
|
|
|
|
|
|
|
|
CONFIG_STM32_SPI_INTERRUPTS - Select to enable interrupt driven SPI
|
|
|
|
support. Non-interrupt-driven, poll-waiting is recommended if the
|
|
|
|
interrupt rate would be to high in the interrupt driven case.
|
2022-07-15 20:04:43 +02:00
|
|
|
CONFIG_STM32_SPIx_DMA - Use DMA to improve SPIx transfer performance.
|
2012-05-28 21:48:26 +02:00
|
|
|
Cannot be used with CONFIG_STM32_SPI_INTERRUPT.
|
|
|
|
|
|
|
|
CONFIG_SDIO_DMA - Support DMA data transfers. Requires CONFIG_STM32_SDIO
|
|
|
|
and CONFIG_STM32_DMA2.
|
2020-02-23 09:50:23 +01:00
|
|
|
CONFIG_STM32_SDIO_PRI - Select SDIO interrupt priority. Default: 128
|
2017-01-31 18:52:00 +01:00
|
|
|
CONFIG_STM32_SDIO_DMAPRIO - Select SDIO DMA interrupt priority.
|
2012-05-28 21:48:26 +02:00
|
|
|
Default: Medium
|
2017-01-31 16:16:01 +01:00
|
|
|
CONFIG_STM32_SDIO_WIDTH_D1_ONLY - Select 1-bit transfer mode. Default:
|
2012-05-28 21:48:26 +02:00
|
|
|
4-bit transfer mode.
|
|
|
|
|
|
|
|
CONFIG_STM32_PHYADDR - The 5-bit address of the PHY on the board
|
|
|
|
CONFIG_STM32_MII - Support Ethernet MII interface
|
|
|
|
CONFIG_STM32_MII_MCO1 - Use MCO1 to clock the MII interface
|
|
|
|
CONFIG_STM32_MII_MCO2 - Use MCO2 to clock the MII interface
|
|
|
|
CONFIG_STM32_RMII - Support Ethernet RMII interface
|
2020-02-23 09:50:23 +01:00
|
|
|
CONFIG_STM32_AUTONEG - Use PHY autonegotiation to determine speed and mode
|
2012-05-28 21:48:26 +02:00
|
|
|
CONFIG_STM32_ETHFD - If CONFIG_STM32_AUTONEG is not defined, then this
|
|
|
|
may be defined to select full duplex mode. Default: half-duplex
|
|
|
|
CONFIG_STM32_ETH100MBPS - If CONFIG_STM32_AUTONEG is not defined, then this
|
|
|
|
may be defined to select 100 MBps speed. Default: 10 Mbps
|
|
|
|
CONFIG_STM32_PHYSR - This must be provided if CONFIG_STM32_AUTONEG is
|
|
|
|
defined. The PHY status register address may diff from PHY to PHY. This
|
|
|
|
configuration sets the address of the PHY status register.
|
|
|
|
CONFIG_STM32_PHYSR_SPEED - This must be provided if CONFIG_STM32_AUTONEG is
|
|
|
|
defined. This provides bit mask indicating 10 or 100MBps speed.
|
|
|
|
CONFIG_STM32_PHYSR_100MBPS - This must be provided if CONFIG_STM32_AUTONEG is
|
|
|
|
defined. This provides the value of the speed bit(s) indicating 100MBps speed.
|
|
|
|
CONFIG_STM32_PHYSR_MODE - This must be provided if CONFIG_STM32_AUTONEG is
|
|
|
|
defined. This provide bit mask indicating full or half duplex modes.
|
|
|
|
CONFIG_STM32_PHYSR_FULLDUPLEX - This must be provided if CONFIG_STM32_AUTONEG is
|
|
|
|
defined. This provides the value of the mode bits indicating full duplex mode.
|
|
|
|
CONFIG_STM32_ETH_PTP - Precision Time Protocol (PTP). Not supported
|
|
|
|
but some hooks are indicated with this condition.
|
2012-03-10 01:15:45 +01:00
|
|
|
|
|
|
|
STM3220G-EVAL CAN Configuration
|
|
|
|
|
2012-05-28 21:48:26 +02:00
|
|
|
CONFIG_CAN - Enables CAN support (one or both of CONFIG_STM32_CAN1 or
|
|
|
|
CONFIG_STM32_CAN2 must also be defined)
|
|
|
|
CONFIG_CAN_FIFOSIZE - The size of the circular buffer of CAN messages.
|
|
|
|
Default: 8
|
|
|
|
CONFIG_CAN_NPENDINGRTR - The size of the list of pending RTR requests.
|
|
|
|
Default: 4
|
|
|
|
CONFIG_CAN_LOOPBACK - A CAN driver may or may not support a loopback
|
|
|
|
mode for testing. The STM32 CAN driver does support loopback mode.
|
2018-06-28 22:47:14 +02:00
|
|
|
CONFIG_STM32_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN1
|
|
|
|
is defined.
|
|
|
|
CONFIG_STM32_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_STM32_CAN2
|
|
|
|
is defined.
|
2018-06-28 23:44:42 +02:00
|
|
|
CONFIG_STM32_CAN_TSEG1 - The number of CAN time quanta in segment 1.
|
|
|
|
Default: 6
|
|
|
|
CONFIG_STM32_CAN_TSEG2 - the number of CAN time quanta in segment 2.
|
|
|
|
Default: 7
|
2016-06-15 23:45:27 +02:00
|
|
|
CONFIG_STM32_CAN_REGDEBUG - If CONFIG_DEBUG_FEATURES is set, this will generate an
|
2012-05-28 21:48:26 +02:00
|
|
|
dump of all CAN registers.
|
2012-03-10 01:15:45 +01:00
|
|
|
|
|
|
|
STM3220G-EVAL LCD Hardware Configuration
|
|
|
|
|
2012-08-20 18:06:39 +02:00
|
|
|
STM32 USB OTG FS Host Driver Support
|
|
|
|
|
|
|
|
Pre-requisites
|
2014-03-03 18:58:35 +01:00
|
|
|
|
2012-08-20 18:06:39 +02:00
|
|
|
CONFIG_USBHOST - Enable general USB host support
|
|
|
|
CONFIG_STM32_OTGFS - Enable the STM32 USB OTG FS block
|
|
|
|
CONFIG_STM32_SYSCFG - Needed
|
2014-03-03 18:58:35 +01:00
|
|
|
|
2012-08-20 18:06:39 +02:00
|
|
|
Options:
|
2014-03-03 18:58:35 +01:00
|
|
|
|
2012-08-20 18:06:39 +02:00
|
|
|
CONFIG_STM32_OTGFS_RXFIFO_SIZE - Size of the RX FIFO in 32-bit words.
|
|
|
|
Default 128 (512 bytes)
|
|
|
|
CONFIG_STM32_OTGFS_NPTXFIFO_SIZE - Size of the non-periodic Tx FIFO
|
|
|
|
in 32-bit words. Default 96 (384 bytes)
|
|
|
|
CONFIG_STM32_OTGFS_PTXFIFO_SIZE - Size of the periodic Tx FIFO in 32-bit
|
|
|
|
words. Default 96 (384 bytes)
|
2012-08-22 20:13:04 +02:00
|
|
|
CONFIG_STM32_OTGFS_DESCSIZE - Maximum size of a descriptor. Default: 128
|
2012-08-20 18:06:39 +02:00
|
|
|
CONFIG_STM32_OTGFS_SOFINTR - Enable SOF interrupts. Why would you ever
|
|
|
|
want to do that?
|
|
|
|
CONFIG_STM32_USBHOST_REGDEBUG - Enable very low-level register access
|
2016-06-11 22:14:08 +02:00
|
|
|
debug. Depends on CONFIG_DEBUG_FEATURES.
|
2012-08-21 22:14:42 +02:00
|
|
|
CONFIG_STM32_USBHOST_PKTDUMP - Dump all incoming and outgoing USB
|
2016-06-11 22:14:08 +02:00
|
|
|
packets. Depends on CONFIG_DEBUG_FEATURES.
|
2012-08-21 22:14:42 +02:00
|
|
|
|
2012-03-10 01:15:45 +01:00
|
|
|
Configurations
|
|
|
|
==============
|
|
|
|
|
2013-02-03 00:56:54 +01:00
|
|
|
Each STM3220G-EVAL configuration is maintained in a sub-directory and
|
2012-03-10 01:15:45 +01:00
|
|
|
can be selected as follow:
|
|
|
|
|
2019-08-06 00:53:39 +02:00
|
|
|
tools/configure.sh stm3220g-eval:<subdir>
|
2012-03-10 01:15:45 +01:00
|
|
|
|
|
|
|
Where <subdir> is one of the following:
|
|
|
|
|
|
|
|
dhcpd:
|
|
|
|
-----
|
|
|
|
|
2020-02-23 09:50:23 +01:00
|
|
|
This builds the DHCP server using the apps/examples/dhcpd application
|
2012-03-10 01:15:45 +01:00
|
|
|
(for execution from FLASH.) See apps/examples/README.txt for information
|
2014-03-03 20:21:55 +01:00
|
|
|
about the dhcpd example.
|
2012-03-10 01:15:45 +01:00
|
|
|
|
2014-03-03 20:21:55 +01:00
|
|
|
NOTES:
|
|
|
|
|
|
|
|
1. This configuration uses the mconf-based configuration tool. To
|
|
|
|
change this configurations using that tool, you should:
|
|
|
|
|
|
|
|
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
|
2015-06-28 16:08:57 +02:00
|
|
|
see additional README.txt files in the NuttX tools repository.
|
2014-03-03 20:21:55 +01:00
|
|
|
|
|
|
|
b. Execute 'make menuconfig' in nuttx/ in order to start the
|
|
|
|
reconfiguration process.
|
|
|
|
|
|
|
|
2. The server address is 10.0.0.1 and it serves IP addresses in the range
|
|
|
|
10.0.0.2 through 10.0.0.17 (all of which, of course, are configurable).
|
|
|
|
|
|
|
|
3. Default build environment (also easily reconfigured):
|
|
|
|
|
|
|
|
CONFIG_HOST_WINDOWS=y
|
|
|
|
CONFIG_WINDOWS_CYGWIN=y
|
2022-04-18 18:02:33 +02:00
|
|
|
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABI=y
|
2012-03-10 01:15:45 +01:00
|
|
|
|
|
|
|
nettest:
|
|
|
|
-------
|
|
|
|
|
|
|
|
This configuration directory may be used to verify networking performance
|
2020-02-22 19:31:14 +01:00
|
|
|
using the STM32's Ethernet controller. It uses apps/examples/nettest to exercise the
|
2012-03-10 01:15:45 +01:00
|
|
|
TCP/IP network.
|
|
|
|
|
2012-10-04 19:36:07 +02:00
|
|
|
CONFIG_EXAMPLES_NETTEST_SERVER=n : Target is configured as the client
|
|
|
|
CONFIG_EXAMPLES_NETTEST_PERFORMANCE=y : Only network performance is verified.
|
|
|
|
CONFIG_EXAMPLES_NETTEST_IPADDR=(10<<24|0<<16|0<<8|2) : Target side is IP: 10.0.0.2
|
|
|
|
CONFIG_EXAMPLES_NETTEST_DRIPADDR=(10<<24|0<<16|0<<8|1) : Host side is IP: 10.0.0.1
|
|
|
|
CONFIG_EXAMPLES_NETTEST_CLIENTIP=(10<<24|0<<16|0<<8|1) : Server address used by which ever is client.
|
2012-03-10 01:15:45 +01:00
|
|
|
|
2014-03-03 18:58:35 +01:00
|
|
|
NOTES:
|
|
|
|
|
|
|
|
1. This configuration uses the mconf-based configuration tool. To
|
|
|
|
change this configuration using that tool, you should:
|
|
|
|
|
|
|
|
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
|
2015-06-28 16:08:57 +02:00
|
|
|
see additional README.txt files in the NuttX tools repository.
|
2014-03-03 18:58:35 +01:00
|
|
|
|
|
|
|
b. Execute 'make menuconfig' in nuttx/ in order to start the
|
|
|
|
reconfiguration process.
|
|
|
|
|
|
|
|
2. Default build environment:
|
|
|
|
|
2014-03-03 20:21:55 +01:00
|
|
|
CONFIG_HOST_WINDOWS=y : Windows
|
|
|
|
CONFIG_WINDOWS_CYGWIN=y : Under Cygwin
|
2022-04-18 18:02:33 +02:00
|
|
|
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
|
2014-03-03 18:58:35 +01:00
|
|
|
|
|
|
|
Than can, of course, be easily changes by reconfiguring per Note 1.
|
|
|
|
|
2012-03-10 01:15:45 +01:00
|
|
|
nsh:
|
|
|
|
---
|
|
|
|
Configures the NuttShell (nsh) located at apps/examples/nsh. The
|
|
|
|
Configuration enables both the serial and telnet NSH interfaces.
|
|
|
|
|
2022-04-18 18:02:33 +02:00
|
|
|
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABI=y : GNU EABI toolchain for Windows
|
2012-05-29 00:17:36 +02:00
|
|
|
CONFIG_NSH_DHCPC=n : DHCP is disabled
|
|
|
|
CONFIG_NSH_IPADDR=(192<<24|168<<16|13<<8|161) : Target IP address 192.168.8.161
|
|
|
|
CONFIG_NSH_DRIPADDR=(192<<24|168<<16|13<<8|1) : Host IP address 192.168.8.1
|
2012-03-10 01:15:45 +01:00
|
|
|
|
|
|
|
NOTES:
|
2014-03-04 18:19:46 +01:00
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
1. This configuration uses the mconf-based configuration tool. To
|
|
|
|
change this configurations using that tool, you should:
|
|
|
|
|
|
|
|
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
|
2015-06-28 16:08:57 +02:00
|
|
|
see additional README.txt files in the NuttX tools repository.
|
2014-03-01 15:03:45 +01:00
|
|
|
|
|
|
|
b. Execute 'make menuconfig' in nuttx/ in order to start the
|
|
|
|
reconfiguration process.
|
|
|
|
|
|
|
|
2. This example assumes that a network is connected. During its
|
2012-03-10 01:15:45 +01:00
|
|
|
initialization, it will try to negotiate the link speed. If you have
|
|
|
|
no network connected when you reset the board, there will be a long
|
|
|
|
delay (maybe 30 seconds?) before anything happens. That is the timeout
|
|
|
|
before the networking finally gives up and decides that no network is
|
|
|
|
available.
|
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
3. This example supports the ADC test (apps/examples/adc) but this must
|
2012-03-10 01:15:45 +01:00
|
|
|
be manually enabled by selecting:
|
|
|
|
|
|
|
|
CONFIG_ADC=y : Enable the generic ADC infrastructure
|
|
|
|
CONFIG_STM32_ADC3=y : Enable ADC3
|
|
|
|
CONFIG_STM32_TIM1=y : Enable Timer 1
|
|
|
|
CONFIG_STM32_TIM1_ADC=y : Indicate that timer 1 will be used to trigger an ADC
|
|
|
|
CONFIG_STM32_TIM1_ADC3=y : Assign timer 1 to drive ADC3 sampling
|
|
|
|
CONFIG_STM32_ADC3_SAMPLE_FREQUENCY=100 : Select a sampling frequency
|
|
|
|
|
|
|
|
See also apps/examples/README.txt
|
|
|
|
|
|
|
|
General debug for analog devices (ADC/DAC):
|
|
|
|
|
|
|
|
CONFIG_DEBUG_ANALOG
|
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
4. This example supports the PWM test (apps/examples/pwm) but this must
|
2012-03-10 01:15:45 +01:00
|
|
|
be manually enabled by selecting eeither
|
|
|
|
|
|
|
|
CONFIG_PWM=y : Enable the generic PWM infrastructure
|
|
|
|
CONFIG_PWM_PULSECOUNT=n : Disable to support for TIM1/8 pulse counts
|
|
|
|
CONFIG_STM32_TIM4=y : Enable TIM4
|
|
|
|
CONFIG_STM32_TIM4_PWM=y : Use TIM4 to generate PWM output
|
|
|
|
CONFIG_STM32_TIM4_CHANNEL=2 : Select output on TIM4, channel 2
|
|
|
|
|
|
|
|
If CONFIG_STM32_FSMC is disabled, output will appear on CN3, pin 32.
|
|
|
|
Ground is available on CN3, pin1.
|
|
|
|
|
|
|
|
Or..
|
|
|
|
|
|
|
|
CONFIG_PWM=y : Enable the generic PWM infrastructure
|
|
|
|
CONFIG_PWM_PULSECOUNT=y : Enable to support for TIM1/8 pulse counts
|
|
|
|
CONFIG_STM32_TIM8=y : Enable TIM8
|
|
|
|
CONFIG_STM32_TIM8_PWM=y : Use TIM8 to generate PWM output
|
|
|
|
CONFIG_STM32_TIM8_CHANNEL=4 : Select output on TIM8, channel 4
|
|
|
|
|
|
|
|
If CONFIG_STM32_FSMC is disabled, output will appear on CN3, pin 17
|
|
|
|
Ground is available on CN23 pin1.
|
|
|
|
|
|
|
|
See also include/board.h and apps/examples/README.txt
|
|
|
|
|
|
|
|
Special PWM-only debug options:
|
|
|
|
|
2016-06-16 01:23:56 +02:00
|
|
|
CONFIG_DEBUG_PWM_INFO
|
2012-03-10 01:15:45 +01:00
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
5. This example supports the CAN loopback test (apps/examples/can) but this
|
2012-03-10 01:15:45 +01:00
|
|
|
must be manually enabled by selecting:
|
|
|
|
|
|
|
|
CONFIG_CAN=y : Enable the generic CAN infrastructure
|
2015-05-24 01:08:35 +02:00
|
|
|
CONFIG_CAN_EXTID=y or n : Enable to support extended ID frames
|
2012-03-10 01:15:45 +01:00
|
|
|
CONFIG_STM32_CAN1=y : Enable CAN1
|
|
|
|
CONFIG_CAN_LOOPBACK=y : Enable CAN loopback mode
|
|
|
|
|
|
|
|
See also apps/examples/README.txt
|
|
|
|
|
|
|
|
Special CAN-only debug options:
|
|
|
|
|
2016-06-15 23:45:27 +02:00
|
|
|
CONFIG_DEBUG_CAN_INFO
|
|
|
|
CONFIG_STM32_CAN_REGDEBUG
|
2012-03-10 01:15:45 +01:00
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
6. This example can support an FTP client. In order to build in FTP client
|
2014-03-06 20:00:50 +01:00
|
|
|
support simply reconfigure NuttX, adding:
|
2012-03-10 01:15:45 +01:00
|
|
|
|
2014-03-06 20:00:50 +01:00
|
|
|
CONFIG_NETUTILS_FTPC=y
|
|
|
|
CONFIG_EXAMPLES_FTPC=y
|
2012-03-10 01:15:45 +01:00
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
7. This example can support an FTP server. In order to build in FTP server
|
2014-03-06 20:00:50 +01:00
|
|
|
support simply add the following lines in the NuttX configuration file:
|
2012-03-10 01:15:45 +01:00
|
|
|
|
2014-03-06 20:00:50 +01:00
|
|
|
CONFIG_NETUTILS_FTPD=y
|
|
|
|
CONFIG_EXAMPLES_FTPD=y
|
2012-03-10 01:15:45 +01:00
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
8. This example supports the watchdog timer test (apps/examples/watchdog)
|
2012-05-29 00:17:36 +02:00
|
|
|
but this must be manually enabled by selecting:
|
|
|
|
|
|
|
|
CONFIG_WATCHDOG=y : Enables watchdog timer driver support
|
|
|
|
CONFIG_STM32_WWDG=y : Enables the WWDG timer facility, OR
|
|
|
|
CONFIG_STM32_IWDG=y : Enables the IWDG timer facility (but not both)
|
|
|
|
|
|
|
|
The WWDG watchdog is driven off the (fast) 42MHz PCLK1 and, as result,
|
|
|
|
has a maximum timeout value of 49 milliseconds. For WWDG watchdog, you
|
2019-09-04 01:00:22 +02:00
|
|
|
should also add the following to the configuration file:
|
2012-05-29 00:17:36 +02:00
|
|
|
|
|
|
|
CONFIG_EXAMPLES_WATCHDOG_PINGDELAY=20
|
|
|
|
CONFIG_EXAMPLES_WATCHDOG_TIMEOUT=49
|
|
|
|
|
|
|
|
The IWDG timer has a range of about 35 seconds and should not be an issue.
|
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
9. Adding LCD and graphics support:
|
2012-05-29 00:17:36 +02:00
|
|
|
|
2014-03-06 20:00:50 +01:00
|
|
|
Enable the application configurations that you want to use. As examples:
|
2012-05-29 00:17:36 +02:00
|
|
|
|
2014-03-06 20:00:50 +01:00
|
|
|
CONFIG_EXAMPLES_NX=y : Pick one or more
|
|
|
|
CONFIG_EXAMPLES_NXHELLO=y :
|
|
|
|
CONFIG_EXAMPLES_NXIMAGE=y :
|
|
|
|
CONFIG_EXAMPLES_NXLINES=y :
|
2012-05-29 00:17:36 +02:00
|
|
|
|
|
|
|
defconfig (nuttx/.config):
|
|
|
|
|
2014-03-06 20:00:50 +01:00
|
|
|
CONFIG_STM32_FSMC=y : FSMC support is required for the LCD
|
2019-09-20 02:19:18 +02:00
|
|
|
CONFIG_NX=y : Enable graphics support
|
2014-03-06 20:00:50 +01:00
|
|
|
CONFIG_MM_REGIONS=2 : When FSMC is enabled, so is the on-board SRAM memory region
|
2012-05-29 00:17:36 +02:00
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
10. USB OTG FS Device or Host Support
|
2014-03-03 18:58:35 +01:00
|
|
|
|
2014-03-06 20:00:50 +01:00
|
|
|
CONFIG_USBDEV : Enable USB device support, OR
|
|
|
|
CONFIG_USBHOST : Enable USB host support (but not both)
|
2012-08-29 19:41:43 +02:00
|
|
|
|
2014-03-06 20:00:50 +01:00
|
|
|
CONFIG_STM32_OTGFS : Enable the STM32 USB OTG FS block
|
|
|
|
CONFIG_STM32_SYSCFG : Needed for all USB OTF FS support
|
2012-08-29 19:41:43 +02:00
|
|
|
|
2014-03-06 20:00:50 +01:00
|
|
|
CONFIG_SCHED_WORKQUEUE : Worker thread support is required for the mass
|
|
|
|
storage class (both host and device).
|
|
|
|
CONFIG_NSH_ARCHINIT : Architecture specific USB initialization
|
|
|
|
is needed
|
2012-08-29 19:41:43 +02:00
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
11. This configuration requires that jumper JP22 be set to enable RS-232 operation.
|
2012-03-10 01:15:45 +01:00
|
|
|
|
|
|
|
nsh2:
|
|
|
|
-----
|
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
This is an alternative NSH configuration. One limitation of the STM3220G-EVAL
|
2012-03-10 01:15:45 +01:00
|
|
|
board is that you cannot have both a UART-based NSH console and SDIO support.
|
|
|
|
The nsh2 differs from the nsh configuration in the following ways:
|
|
|
|
|
|
|
|
-CONFIG_STM32_USART3=y : USART3 is disabled
|
2014-03-01 15:03:45 +01:00
|
|
|
+CONFIG_STM32_USART3=n
|
2012-03-10 01:15:45 +01:00
|
|
|
|
|
|
|
-CONFIG_STM32_SDIO=n : SDIO is enabled
|
|
|
|
+CONFIG_STM32_SDIO=y
|
|
|
|
|
2012-04-08 00:32:35 +02:00
|
|
|
Logically, these are the only differences: This configuration has SDIO (and
|
2012-03-10 01:15:45 +01:00
|
|
|
the SD card) enabled and the serial console disabled. There is ONLY a
|
|
|
|
Telnet console!.
|
|
|
|
|
|
|
|
There are some special settings to make life with only a Telnet
|
|
|
|
|
|
|
|
CONFIG_RAMLOG=y - Enable the RAM-based logging feature.
|
2020-02-17 19:10:15 +01:00
|
|
|
CONFIG_CONSOLE_SYSLOG=y - Use the RAM logger as the default console.
|
2012-03-10 01:15:45 +01:00
|
|
|
This means that any console output from non-Telnet threads will
|
|
|
|
go into the circular buffer in RAM.
|
|
|
|
CONFIG_RAMLOG_SYSLOG - This enables the RAM-based logger as the
|
|
|
|
system logger. This means that (1) in addition to the console
|
|
|
|
output from other tasks, ALL of the debug output will also to
|
|
|
|
to the circular buffer in RAM, and (2) NSH will now support a
|
|
|
|
command called 'dmesg' that can be used to dump the RAM log.
|
|
|
|
|
|
|
|
There are a few other configuration differences as necessary to support
|
|
|
|
this different device configuration. Just the do the 'diff' if you are
|
|
|
|
curious.
|
|
|
|
|
|
|
|
NOTES:
|
2014-03-03 20:21:55 +01:00
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
1. This configuration uses the mconf-based configuration tool. To
|
|
|
|
change this configurations using that tool, you should:
|
|
|
|
|
|
|
|
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
|
2015-06-28 16:08:57 +02:00
|
|
|
see additional README.txt files in the NuttX tools repository.
|
2014-03-01 15:03:45 +01:00
|
|
|
|
|
|
|
b. Execute 'make menuconfig' in nuttx/ in order to start the
|
|
|
|
reconfiguration process.
|
|
|
|
|
|
|
|
2. See the notes for the nsh configuration. Most also apply to the nsh2
|
2012-03-10 01:15:45 +01:00
|
|
|
configuration.
|
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
3. RS-232 is disabled, but Telnet is still available for use as a console.
|
2012-04-08 00:32:35 +02:00
|
|
|
Since RS-232 and SDIO use the same pins (one controlled by JP22), RS232
|
|
|
|
and SDIO cannot be used concurrently.
|
2012-03-10 01:15:45 +01:00
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
4. This configuration requires that jumper JP22 be set to enable SDIO
|
2012-07-12 18:11:43 +02:00
|
|
|
operation. To enable MicroSD Card, which shares same I/Os with RS-232,
|
|
|
|
JP22 is not fitted.
|
2012-03-10 01:15:45 +01:00
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
5. In order to use SDIO without overruns, DMA must be used.
|
2012-04-08 00:32:35 +02:00
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
6. Another SDIO/DMA issue. This one is probably a software bug. This is
|
2012-04-08 00:32:35 +02:00
|
|
|
the bug as stated in the TODO list:
|
|
|
|
|
|
|
|
"If you use a large I/O buffer to access the file system, then the
|
|
|
|
MMCSD driver will perform multiple block SD transfers. With DMA
|
|
|
|
ON, this seems to result in CRC errors detected by the hardware
|
2021-12-21 12:55:38 +01:00
|
|
|
during the transfer. Workaround: CONFIG_MMCSD_MULTIBLOCK_LIMIT=1"
|
2012-04-08 00:32:35 +02:00
|
|
|
|
2021-12-21 12:55:38 +01:00
|
|
|
For this reason, CONFIG_MMCSD_MULTIBLOCK_LIMIT=1 appears in the defconfig
|
2012-04-08 00:32:35 +02:00
|
|
|
file.
|
|
|
|
|
2014-03-01 15:03:45 +01:00
|
|
|
7. Another DMA-related concern. I see this statement in the reference
|
2012-04-08 00:32:35 +02:00
|
|
|
manual: "The burst configuration has to be selected in order to respect
|
|
|
|
the AHB protocol, where bursts must not cross the 1 KB address boundary
|
|
|
|
because the minimum address space that can be allocated to a single slave
|
|
|
|
is 1 KB. This means that the 1 KB address boundary should not be crossed
|
|
|
|
by a burst block transfer, otherwise an AHB error would be generated,
|
|
|
|
that is not reported by the DMA registers."
|
|
|
|
|
|
|
|
There is nothing in the DMA driver to prevent this now.
|
|
|
|
|
2012-05-30 00:20:52 +02:00
|
|
|
nxwm
|
|
|
|
----
|
|
|
|
This is a special configuration setup for the NxWM window manager
|
|
|
|
UnitTest. The NxWM window manager can be found here:
|
|
|
|
|
2018-09-16 17:39:20 +02:00
|
|
|
apps/graphics/NxWidgets/nxwm
|
2012-05-30 00:20:52 +02:00
|
|
|
|
|
|
|
The NxWM unit test can be found at:
|
|
|
|
|
2018-09-16 17:39:20 +02:00
|
|
|
apps/graphics/NxWidgets/UnitTests/nxwm
|
2012-05-30 00:20:52 +02:00
|
|
|
|
2012-12-21 21:09:32 +01:00
|
|
|
NOTES:
|
2014-03-03 18:58:35 +01:00
|
|
|
|
2012-12-21 21:09:32 +01:00
|
|
|
1. This configuration uses the mconf-based configuration tool. To
|
|
|
|
change this configuration using that tool, you should:
|
|
|
|
|
2013-01-09 13:55:13 +01:00
|
|
|
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
|
2015-06-28 16:08:57 +02:00
|
|
|
see additional README.txt files in the NuttX tools repository.
|
2012-12-21 21:09:32 +01:00
|
|
|
|
|
|
|
b. Execute 'make menuconfig' in nuttx/ in order to start the
|
|
|
|
reconfiguration process.
|
|
|
|
|
|
|
|
2. This configuration is currently set up to build under Cygwin on
|
2020-05-13 16:18:31 +02:00
|
|
|
a Windows machine using the ARM EABI GCC Windows toolchain.
|
2012-12-21 21:09:32 +01:00
|
|
|
That configuration can be easy changed as described in Note 1.
|
|
|
|
|
2012-03-10 01:15:45 +01:00
|
|
|
telnetd:
|
|
|
|
--------
|
|
|
|
|
|
|
|
A simple test of the Telnet daemon(see apps/netutils/README.txt,
|
|
|
|
apps/examples/README.txt, and apps/examples/telnetd). This is
|
|
|
|
the same daemon that is used in the nsh configuration so if you
|
|
|
|
use NSH, then you don't care about this. This test is good for
|
|
|
|
testing the Telnet daemon only because it works in a simpler
|
|
|
|
environment than does the nsh configuration.
|
2014-03-04 18:19:46 +01:00
|
|
|
|
|
|
|
NOTES:
|
|
|
|
|
|
|
|
1. This configuration uses the mconf-based configuration tool. To
|
|
|
|
change this configurations using that tool, you should:
|
|
|
|
|
|
|
|
a. Build and install the kconfig-mconf tool. See nuttx/README.txt
|
2015-06-28 16:08:57 +02:00
|
|
|
see additional README.txt files in the NuttX tools repository.
|
2014-03-04 18:19:46 +01:00
|
|
|
|
|
|
|
b. Execute 'make menuconfig' in nuttx/ in order to start the
|
|
|
|
reconfiguration process.
|
|
|
|
|
|
|
|
3. Default build environment (easily reconfigured):
|
|
|
|
|
|
|
|
CONFIG_HOST_WINDOWS=y
|
|
|
|
CONFIG_WINDOWS_CYGWIN=y
|
2022-04-18 18:02:33 +02:00
|
|
|
CONFIG_ARMV7M_TOOLCHAIN_GNU_EABI=y
|