2016-10-23 16:00:17 +02:00
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/****************************************************************************
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* arch/xtensa/src/esp32/esp32_timerisr.c
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <time.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <arch/xtensa/xtensa_specregs.h>
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#include <arch/board/board.h>
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#include "clock/clock.h"
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2016-10-23 18:06:30 +02:00
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#include "xtensa_timer.h"
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2016-10-23 16:00:17 +02:00
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#include "xtensa.h"
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2016-10-23 18:08:38 +02:00
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/****************************************************************************
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* Private data
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****************************************************************************/
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static uint32_t g_tick_divisor;
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2016-10-23 16:00:17 +02:00
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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2016-10-23 18:08:38 +02:00
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/****************************************************************************
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* Function: xtensa_getcount, xtensa_getcompare, xtensa_setcompare, and
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* xtensa_enable_timer
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*
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* Description:
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* Lower level operations on Xtensa special registers.
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*
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****************************************************************************/
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/* Return the current value of the cyle count register */
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static inline uint32_t xtensa_getcount(void)
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{
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uint32_t count;
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__asm__ __volatile__
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(
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"rsr %0, CCOUNT" : "=r"(count)
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);
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return count;
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}
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/* Return the old value of the compare register */
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static inline uint32_t xtensa_getcompare(void)
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{
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uint32_t compare;
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__asm__ __volatile__
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(
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"rsr %0, %1" : "=r"(compare) : "I"(XT_CCOMPARE)
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);
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return compare;
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}
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/* Set the value of the compare register */
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static inline void xtensa_setcompare(uint32_t compare)
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{
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__asm__ __volatile__
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(
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"wsr %0, %1" : : "r"(compare), "I"(XT_CCOMPARE)
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);
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}
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/* Enable the timer interrupt. NOTE: This is non-atomic but safe in this
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* context because this occurs early in the initialization sequence.
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*/
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static inline void xtensa_enable_timer(void)
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{
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__asm__ __volatile__
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(
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"movi a3, %0\n"
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"rsr a2, INTENABLE\n"
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"or a2, a2, a3\n"
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"wsr a2, INTENABLE\n"
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: : "I"(XT_TIMER_INTEN) : "a2", "a3"
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);
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}
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2016-10-23 16:00:17 +02:00
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/****************************************************************************
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* Function: esp32_timerisr
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*
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* Description:
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* The timer ISR will perform a variety of services for various portions
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* of the systems.
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*
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* Xtensa timers work by comparing a cycle counter with a preset value.
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* Once the match occurs an interrupt is generated, and the handler has to
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* set a new cycle count into the comparator. To avoid clock drift due to
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* interrupt latency, the new cycle count is computed from the old, not the
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* time the interrupt was serviced. However if a timer interrupt is ever
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* serviced more than one tick late, it is necessary to process multiple
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* ticks until the new cycle count is in the future, otherwise the next
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* timer interrupt would not occur until after the cycle counter had
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* wrapped (2^32 cycles later).
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*
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****************************************************************************/
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static int esp32_timerisr(int irq, uint32_t *regs)
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{
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uint32_t divisor;
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uint32_t compare;
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uint32_t diff;
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divisor = g_tick_divisor;
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do
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{
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/* Increment the compare register for the next tick */
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compare = xtensa_getcompare();
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xtensa_setcompare(compare + divisor);
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/* Process one timer tick */
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sched_process_timer();
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/* Check if we are falling behind and need to process multiple timer
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* interrupts.
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*/
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diff = xtensa_getcount() - compare;
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}
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while (diff < divisor);
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return OK;
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Function: xtensa_timer_initialize
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*
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* Description:
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* This function is called during start-up to initialize
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* the timer interrupt.
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*
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****************************************************************************/
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void xtensa_timer_initialize(void)
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{
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uint64_t divisor;
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uint32_t count;
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/* Configured the timer0 as the system timer.
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*
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* divisor = BOARD_CLOCK_FREQUENCY / ticks_per_sec
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* = BOARD_CLOCK_FREQUENCY / (ticks_per_usec * 1000000)
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* = (1000000 * BOARD_CLOCK_FREQUENCY) / ticks_per_usec
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*
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* A long long calculation is used to preserve accuracy in all cases.
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*/
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divisor = (1000000ull * (uint64_t)BOARD_CLOCK_FREQUENCY) / CONFIG_USEC_PER_TICK;
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DEBUGASSERT(divisor <= UINT32_MAX)
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g_tick_divisor = divisor;
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/* Set up periodic timer */
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count = xtensa_getcount();
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xtensa_setcompare(count + divisor);
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/* Attach the timer interrupt vector */
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(void)irq_attach(XTENSA_IRQ_TIMER0, (xcpt_t)esp32_timerisr);
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/* Enable the timer interrupt at the device level */
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xtensa_enable_timer();
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/* And enable the timer interrupt */
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up_enable_irq(XTENSA_IRQ_TIMER0);
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}
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