This is the initial commit the port to the SAMD5x/E5x MCU family and also support for the Adafruit Metro M4 board. It port is untested and unfinished. It currently will not even link due to some missing clock related logic.
Squashed commit of the following:
arch/arm/src/samd5e5: Clean-up EIC logic.
arch/arm/src/samd5e5: Fix some compilation issues; Still issues with the EIC logic from samd2x.
arch/arm/src/samd5e5: Fix some compilation issues; bring in some EIC logic from samd2x.
arch/arm/src/samd5e5: Add NVMCTRL header file, fix some compiler problems, misc. clean-up.
configs/metro-m4: Add LED support.
arch/arm/src/samd5e5: Bring in SAML21 clock configuration. This is a WIP; it cannot possible even compile yet.
arch/arm/src/samd5e5: Leverage Cortex-M4 interrupt and SysTick logic from the SAM3/4.
arch/arm/src/samd5e5: Add SERCOM utility function.
arch/arm/src/samd5e5: Bring all SERCOM USART logic from SAMD2L2 to SAMD5E5. This is a brute coy with nothing more than more that name changes and extension from 5 to 7 SERCOMs.
arch/arm/src/samd5e5: Add sam_config.h header file
arch/arm/src/samd5e5/: Add Generic Clock (GCLK) utility functions.
arch/arm/src/samd5e5: Add EVSYS register definition file
arch/arm/src/samd5e5 and configs/metro-m4: Use SERCOM3 for the Arduino serial shield as console.
arch/arm/src/samd5e5/chip: Add SERCOM USART, SPI, I2C master, and slave register defintions header files
arch/arm/src/samd5e5/chip: Add AES, PM, TRNG, and WDT header files.
arch/arm/src/samd5e5/chip: Add pin multiplexing header files.
Various fixes to configuration system; fix metro-m4/nsh defconfig file.
configs/metro-m4: Add initial support for the Adafruit Metro M4 board.
arch/arm/src/samd5e5: Add peripheral clock helpers.
arch/arm/src/samd5e5/chip: Add PAC register definition header file. Fix some errors in the memory map header file.
arch/arm/src/samd5e5: Add chip.h headerf file.
arch/arm/src/samd5e5: Add PORT register definitions and support from SAML21.
arch/arm/include/samd5e5: Add interrupt vector definitions.
arch/arm/src/samd5e5: Add some boilerplate files. Correct some typos.
arch/arm/src/samd5e5/chip/sam_eic.h: Add EIC register definitions.
arch/arm/src/samd5e5/chip: Add OSC32KCTRL and OSCCTRL register definitions.
arch/arm/src/samd5e5/chip: Add GCLK, MCLK, and RSTC header files.
arch/arm/src/samd5e5/chip/sam_cmcc.h: Add CMCC register definitions
arch/arm/src/samd5e5/chip/sam_supc.h: Add SUPC header file.
arch/arm/src/samd5e5: Add start-up logic.
arch/arm/src/samd5e5: Add Make.defs file
arch/arm/src/samd5e5/chip: Add memory map header file.
arch/arm/include/samd5e5: Add chip.h header file.
arch/arm/Kconfig and arch/arm/src/samd5e5/Kconfig: Add configuration logic for the SAMD5x/Ex family.
2018-07-26 20:08:58 +02:00
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README
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======
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This directory contains the port of NuttX to the Adafruit Metro M4. The
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Metro M4 uses a Arduino form factor and and pinout. It's powered with an
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ATSAMD51J19:
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o Cortex M4 core running at 120 MHz
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o Hardware DSP and floating point support
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o 512 KB flash, 192 KB RAM
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o 32-bit, 3.3V logic and power
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o Dual 1 MSPS DAC (A0 and A1)
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o Dual 1 MSPS ADC (8 analog pins)
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o 6 x hardware SERCOM (I2C, SPI or UART)
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o 16 x PWM outputs
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o Stereo I2S input/output with MCK pin
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o 10-bit Parallel capture controller (for camera/video in)
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o Built in crypto engines with AES (256 bit), true RNG, Pubkey controller
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o 64 QFN
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2018-08-03 23:26:44 +02:00
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Contents
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========
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o STATUS
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o Unlocking FLASH
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o Serial Console
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o LEDs
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2018-08-31 15:38:52 +02:00
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o Run from SRAM
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2018-08-03 23:26:44 +02:00
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o Configurations
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2018-07-26 20:54:22 +02:00
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STATUS
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======
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2018-07-26: The basic port was merged into master. It is still
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2018-09-02 15:31:16 +02:00
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incomplete and untested.
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2018-08-31 17:58:53 +02:00
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2018-09-02 15:31:16 +02:00
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2018-07-29: Code complete. Clock configuration complete. Unverified
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SERCOM USART, SPI, I2C, Port configuration, and DMA support have been
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added. I still have no hardware in hand to test.
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2018-08-31 17:58:53 +02:00
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2018-07-31 20:55:19 +02:00
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2018-07-20: Brought in the USB driver from the SAML21. It is the same
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USB IP with only small differences. There a a few, small open issues
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still to be resolved.
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2018-08-31 17:58:53 +02:00
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2018-08-01 22:10:34 +02:00
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2018-08-01: Hardware in hand. Initial attempts to program the board
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2018-08-31 17:58:53 +02:00
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using a Segger J-Link connected via SWD were unsuccessful because the
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Metro M4 comes with an application in FLASH and the FLASH locked. See
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"Unlocking FLASH with J-Link Commander" below. After unlocking the
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FLASH, I was able to successfully write the NuttX image.
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2018-08-02 14:28:15 +02:00
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Unfortunately, the board seems to have become unusable after the first
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NuttX image was written to FLASH. I am unable to connect the JTAG
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2018-09-02 15:31:16 +02:00
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debugger. The primary JTAG problem seems to be that it is now unable
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2018-08-02 21:58:04 +02:00
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to halt the CPU.
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2018-08-01 22:10:34 +02:00
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2018-08-31 17:58:53 +02:00
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Future me: This boot-up failure was do to bad clock initialization
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logic that caused infinite loops during clock configuration. Unlocking
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and erasing the FLASH is innocuous, but the JTAG will apparently not
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work if the clocks are not in a good state.
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2018-08-31 21:34:09 +02:00
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I would say that as a general practice, any changes to the clock
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configuration should be testing in SRAM first before risking the
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write to FLASH.
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2018-08-31 15:38:52 +02:00
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2018-08-03: Added a configuration option to run out of SRAM vs FLASH.
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2018-09-02 15:31:16 +02:00
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This is a safer way to do the initial board bring-up since it does
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not modify the FLASH image nor does it require unlocking the FLASH
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pages.
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2018-08-31 17:58:53 +02:00
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2018-09-02 15:31:16 +02:00
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2018-08-31: I finally have a new Metro M4 and have successfully
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debugged from SRAM (with FLASH unlocked and erased). Several
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2018-08-31 17:58:53 +02:00
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errors in clock configuration logic have been corrected and it now
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gets through clock configuration okay. It now hangs in the low-level
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2018-09-01 17:47:15 +02:00
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USART initialization.
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It hangs trying to enabled the SERCOM slow clock channel. The clock
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sequence is:
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1. 32.678KHz crystal -> XOSC32K
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This is configured and says that XOSC32K is ready.
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2. XOSCK32 -> GCLK3.
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This is configured and it says that is is ready (GENEN=1).
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3. GCLK3 ->SERCOM slow clock channel.
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This hangs when I try to enable the peripheral clock.
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2018-09-01 22:38:19 +02:00
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2018-09-01: I found a workaround by substituting OSCULP32K for XOSC32
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2018-09-02 15:31:16 +02:00
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as the source to GCLK3. With that workaround, the port gets past all
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clock and USART configuration. A new configuration option was added,
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2018-09-02 20:34:45 +02:00
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CONFIG_METRO_M4_32KHZXTAL. By default this workaround is in place.
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2018-09-01 23:29:08 +02:00
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But you can enable CONFIG_METRO_M4_32KHZXTAL if you want to further
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study the XOSC32K problem.
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With that workaround (and a bunch of other fixes), the basic NSH
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configuration appears fully function, indicating the the board bring-
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2018-09-02 15:31:16 +02:00
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up is complete.
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2018-08-03 15:43:57 +02:00
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2018-09-01 23:58:24 +02:00
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There are additional drivers ported from SAML21 which has, in most cases,
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identical peripherals. None of these drivers have been verified on the
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2018-09-02 01:03:31 +02:00
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SAMD51, However. These include: DMAC, I2C, SPI, and USB.
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2018-09-01 23:58:24 +02:00
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2019-02-25 20:08:54 +01:00
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WARNING: If you decide to invest the time to discover whey the XOSC32K
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clock source is not working, be certain to use the SRAM configuration.
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That configuration in FLASH is most likely lock up your board irrecoverably
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is there are any start-up errors!
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2018-08-01 22:10:34 +02:00
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Unlocking FLASH
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===============
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Options
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-------
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The Adafruit Metro M4 comes with a very nice bootloader resident in FLASH.
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so we have two options:
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1. Learn to play well with others. Make NuttX coexist and work in the
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memory partition available to it. Or,
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2. Be greedy, unlock the FLASH and overwrite the bootloader.
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I chose to do the last one. I used a Segger J-Link and here are the steps
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that I took. You can probably do these things in Atmel Studio (?) but for
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other debug environments, you would have to come up with the solution.
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Unlocking FLASH with J-Link Commander
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-------------------------------------
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1. Start J-Link Commander:
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SEGGER J-Link Commander V6.32i (Compiled Jul 24 2018 15:20:49)
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DLL version V6.32i, compiled Jul 24 2018 15:19:55
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Connecting to J-Link via USB...O.K.
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Firmware: J-Link V9 compiled Apr 20 2018 16:47:26
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Hardware version: V9.30
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S/N: 269303123
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License(s): FlashBP, GDB
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OEM: SEGGER-EDU
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VTref=3.296V
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Type "connect" to establish a target connection, '?' for help
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J-Link>con
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Please specify device / core. <Default>: ATSAMD51P19
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Type '?' for selection dialog
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Device>ATSAMD51P19
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Please specify target interface:
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J) JTAG (Default)
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S) SWD
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TIF>S
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Specify target interface speed [kHz]. <Default>: 4000 kHz
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Speed>
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Device "ATSAMD51P19" selected.
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Connecting to target via SWD
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Found SW-DP with ID 0x2BA01477
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Scanning AP map to find all available APs
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...etc. ...
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2. Look at The NVM "user page" memory at address 0x00804000:
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J-Link>mem8 804000, 10
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00804000 = 39 92 9A F6 80 FF EC AE FF FF FF FF FF FF FF FF
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The field NVM BOOT (also called BOOTPROT) is the field that locks the
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lower part of FLASH to support the boot loader. This is bits 26-29
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of the NVM user page:
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J-Link>mem32 804000, 1
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00804000 = F69A9239
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In binary 11|11 01|10 1001 1010 1001 0010 0011 1001, so NVM Boot 1101.
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To unlock the FLASH memory reserved for the bootloader, we need to
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change this field to 111 so that:
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2018-08-02 14:28:15 +02:00
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11|11 11|10 10|01 1010 1001 0010 0011 1001 = F7da9239, or
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00804000 = 39 92 9A FE 80 FF EC AE FF FF FF FF FF FF FF FF
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2018-08-01 22:10:34 +02:00
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is read.
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3. Modify the NVM "user page"
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I did this using the instructions for the SAMD21 found at
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https://roamingthings.de/use-j-link-to-change-the-boot-loader-protection-of-a-sam-d21/
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We will need to create a small Motorola S-REC file to write new values
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into NVM. See https://en.m.wikipedia.org/wiki/SREC_(file_format) for a
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description of the Motorola SREC format.
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I wrote a small program at configs/metro-m4-scripts/nvm.c that will
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generate this Motorola SREC file with the correct checksum. The file at
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configs/metro-m4-scripts/nvm.c is the output of that program.
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J-Link>mem8 804000,10
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00804000 = 39 92 9A F6 80 FF EC AE FF FF FF FF FF FF FF FF
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J-Link>loadfile D:\Spuda\Documents\projects\nuttx\master\nuttx\configs\metro-m4\scripts\nvm.srec
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Downloading file [D:\Spuda\Documents\projects\nuttx\master\nuttx\configs\metro-m4\scripts\nvm.srec]...
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J-Link: Flash download: Bank 1 @ 0x00804000: 1 range affected (16 bytes)
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J-Link: Flash download: Total time needed: 0.089s (Prepare: 0.035s, Compare: 0.011s, Erase: 0.000s, Program: 0.019s, Verify: 0.011s, Restore: 0.011s)
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O.K.
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J-Link>mem8 804000,10
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00804000 = 39 92 9A FE 80 FF EC AE FF FF FF FF FF FF FF FF
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You will, of course, have to change the path as appropriate for your system.
|
2018-07-26 20:54:22 +02:00
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2018-08-31 17:58:53 +02:00
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4. Erase FLASH (optional)
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J-Link>erase
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Erasing device (ATSAMD51P19)...
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J-Link: Flash download: Total time needed: 2.596s (Prepare: 0.031s, Compare: 0.000s, Erase: 2.553s, Program: 0.000s, Verify: 0.000s, Restore: 0.012s)
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J-Link: Flash download: Total time needed: 0.066s (Prepare: 0.038s, Compare: 0.000s, Erase: 0.016s, Program: 0.000s, Verify: 0.000s, Restore: 0.010s)
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Erasing done.
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J-Link>
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|
|
This is the initial commit the port to the SAMD5x/E5x MCU family and also support for the Adafruit Metro M4 board. It port is untested and unfinished. It currently will not even link due to some missing clock related logic.
Squashed commit of the following:
arch/arm/src/samd5e5: Clean-up EIC logic.
arch/arm/src/samd5e5: Fix some compilation issues; Still issues with the EIC logic from samd2x.
arch/arm/src/samd5e5: Fix some compilation issues; bring in some EIC logic from samd2x.
arch/arm/src/samd5e5: Add NVMCTRL header file, fix some compiler problems, misc. clean-up.
configs/metro-m4: Add LED support.
arch/arm/src/samd5e5: Bring in SAML21 clock configuration. This is a WIP; it cannot possible even compile yet.
arch/arm/src/samd5e5: Leverage Cortex-M4 interrupt and SysTick logic from the SAM3/4.
arch/arm/src/samd5e5: Add SERCOM utility function.
arch/arm/src/samd5e5: Bring all SERCOM USART logic from SAMD2L2 to SAMD5E5. This is a brute coy with nothing more than more that name changes and extension from 5 to 7 SERCOMs.
arch/arm/src/samd5e5: Add sam_config.h header file
arch/arm/src/samd5e5/: Add Generic Clock (GCLK) utility functions.
arch/arm/src/samd5e5: Add EVSYS register definition file
arch/arm/src/samd5e5 and configs/metro-m4: Use SERCOM3 for the Arduino serial shield as console.
arch/arm/src/samd5e5/chip: Add SERCOM USART, SPI, I2C master, and slave register defintions header files
arch/arm/src/samd5e5/chip: Add AES, PM, TRNG, and WDT header files.
arch/arm/src/samd5e5/chip: Add pin multiplexing header files.
Various fixes to configuration system; fix metro-m4/nsh defconfig file.
configs/metro-m4: Add initial support for the Adafruit Metro M4 board.
arch/arm/src/samd5e5: Add peripheral clock helpers.
arch/arm/src/samd5e5/chip: Add PAC register definition header file. Fix some errors in the memory map header file.
arch/arm/src/samd5e5: Add chip.h headerf file.
arch/arm/src/samd5e5: Add PORT register definitions and support from SAML21.
arch/arm/include/samd5e5: Add interrupt vector definitions.
arch/arm/src/samd5e5: Add some boilerplate files. Correct some typos.
arch/arm/src/samd5e5/chip/sam_eic.h: Add EIC register definitions.
arch/arm/src/samd5e5/chip: Add OSC32KCTRL and OSCCTRL register definitions.
arch/arm/src/samd5e5/chip: Add GCLK, MCLK, and RSTC header files.
arch/arm/src/samd5e5/chip/sam_cmcc.h: Add CMCC register definitions
arch/arm/src/samd5e5/chip/sam_supc.h: Add SUPC header file.
arch/arm/src/samd5e5: Add start-up logic.
arch/arm/src/samd5e5: Add Make.defs file
arch/arm/src/samd5e5/chip: Add memory map header file.
arch/arm/include/samd5e5: Add chip.h header file.
arch/arm/Kconfig and arch/arm/src/samd5e5/Kconfig: Add configuration logic for the SAMD5x/Ex family.
2018-07-26 20:08:58 +02:00
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|
|
Serial Console
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|
|
==============
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An Arduino compatible serial Shield is assumed (or equivalently, and
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external RS-232 or serial-to-USB adapter connected on Arduino pins D0 and
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D1):
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------ ----------------- -----------
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SHIELD SAMD5E5 FUNCTION
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------ ----------------- -----------
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D0 PA23 SERCOM3 PAD2 RXD
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D1 PA22 SERCOM3 PAD0 TXD
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LEDs
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|
|
|
====
|
|
|
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|
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|
|
The Adafruit Metro M4 has four LEDs, but only two are controllable by software:
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1. The red LED on the Arduino D13 pin, and
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2. A NeoPixel RGB LED.
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Currently, only the red LED is supported.
|
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------ ----------------- -----------
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|
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SHIELD SAMD5E5 FUNCTION
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|
|
|
------ ----------------- -----------
|
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D13 PA16 GPIO output
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2018-07-26 20:54:22 +02:00
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2018-08-31 15:38:52 +02:00
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Run from SRAM
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=============
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2018-08-03 23:26:44 +02:00
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I bricked my first Metro M4 board because there were problems in the
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bring-up logic. These problems left the chip in a bad state that was
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repeated on each reset because the code was written into FLASH and I was
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unable to ever connect to it again via SWD.
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To make the bring-up less risky, I added a configuration option to build
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the code to execution entirely out of SRAM. By default, the setting
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CONFIG_METRO_M4_RUNFROMFLASH=y is used and the code is built to run out of
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FLASH. If CONFIG_METRO_M4_RUNFROMSRAM=y is selected instead, then the
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code is built to run out of SRAM.
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To use the code in this configuration, the program must be started a
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little differently:
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gdb> mon reset
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gdb> mon halt
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gdb> load nuttx << Load NuttX into SRAM
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gdb> file nuttx << Assuming debug symbols are enabled
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gdb> mon memu32 0x20000000 << Get the address of initial stack
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gdb> mon reg sp 0x200161c4 << Set the initial stack pointer using this address
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2018-08-04 15:37:31 +02:00
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gdb> mon memu32 0x20000004 << Get the address of __start entry point
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2018-08-31 15:38:52 +02:00
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gdb> mon reg pc 0x20000264 << Set the PC using this address (without bit 0 set)
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2018-08-03 23:26:44 +02:00
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gdb> si << Step in just to make sure everything is okay
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gdb> [ set breakpoints ]
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2018-08-04 15:37:31 +02:00
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gdb> c << Then continue until you hit a breakpoint
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2018-08-03 23:26:44 +02:00
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Where 0x200161c4 and 0x20000264 are the values of the initial stack and
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the __start entry point that I read from SRAM
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2018-07-26 20:54:22 +02:00
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Configurations
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==============
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Each Adafruit Metro M4 configuration is maintained in a sub-directory and
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can be selected as follow:
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tools/configure.sh [OPTIONS] metro-m4/<subdir>
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Do 'tools/configure.sh -h' for the list of options. If you are building
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under Windows with Cygwin, you would need the -c option, for example.
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Before building, make sure that the PATH environmental variable includes the
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correct path to the directory than holds your toolchain binaries.
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And then build NuttX by simply typing the following. At the conclusion of
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the make, the nuttx binary will reside in an ELF file called, simply, nuttx.
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make
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The <subdir> that is provided above as an argument to the tools/configure.sh
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must be is one of configurations listed in the following paragraph.
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NOTES:
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1. These configurations use the mconf-based configuration tool. To
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change any of these configurations using that tool, you should:
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a. Build and install the kconfig-mconf tool. See nuttx/README.txt
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see additional README.txt files in the NuttX tools repository.
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b. Execute 'make menuconfig' in nuttx/ in order to start the
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reconfiguration process.
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2. Unless stated otherwise, all configurations generate console
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output of on SERCOM3 which is available on a Arduino Serial
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Shield (see the section "Serial Console" above).
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3. Unless otherwise stated, the configurations are setup build under
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Linux with a generic ARM EABI toolchain:
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Configuration sub-directories
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-----------------------------
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nsh:
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2018-09-02 01:03:31 +02:00
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This configuration directory will built the NuttShell. See NOTES ;for
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common configuration above and the following:
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NOTES:
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1. The CMCC (Cortex M Cache Controller) is enabled.
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