2011-09-13 01:16:16 +02:00
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/****************************************************************************
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2012-01-24 22:51:26 +01:00
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* drivers/usbdev/cdcacm.c
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2011-09-13 01:16:16 +02:00
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*
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2021-03-04 07:10:42 +01:00
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* Licensed to the Apache Software Foundation (ASF) under one or more
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* contributor license agreements. See the NOTICE file distributed with
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* this work for additional information regarding copyright ownership. The
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* ASF licenses this file to you under the Apache License, Version 2.0 (the
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* "License"); you may not use this file except in compliance with the
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* License. You may obtain a copy of the License at
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2011-09-13 01:16:16 +02:00
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*
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2021-03-04 07:10:42 +01:00
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* http://www.apache.org/licenses/LICENSE-2.0
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2011-09-13 01:16:16 +02:00
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*
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2021-03-04 07:10:42 +01:00
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
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* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
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* License for the specific language governing permissions and limitations
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* under the License.
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2011-09-13 01:16:16 +02:00
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <unistd.h>
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#include <string.h>
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2021-05-18 08:59:14 +02:00
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#include <assert.h>
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2011-09-13 01:16:16 +02:00
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#include <errno.h>
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#include <debug.h>
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2016-02-14 14:32:58 +01:00
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#include <nuttx/irq.h>
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2011-09-13 01:16:16 +02:00
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#include <nuttx/kmalloc.h>
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2022-09-25 17:08:38 +02:00
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#include <nuttx/queue.h>
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2017-09-26 17:30:54 +02:00
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#include <nuttx/wdog.h>
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2011-09-13 01:16:16 +02:00
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#include <nuttx/arch.h>
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2012-03-21 20:47:23 +01:00
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#include <nuttx/serial/serial.h>
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2011-09-13 01:16:16 +02:00
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#include <nuttx/usb/usb.h>
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2011-09-13 21:04:13 +02:00
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#include <nuttx/usb/cdc.h>
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2011-09-13 01:16:16 +02:00
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#include <nuttx/usb/usbdev.h>
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2012-01-26 00:04:17 +01:00
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#include <nuttx/usb/cdcacm.h>
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2011-09-13 01:16:16 +02:00
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#include <nuttx/usb/usbdev_trace.h>
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2012-01-24 22:51:26 +01:00
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#include "cdcacm.h"
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2011-09-27 22:11:14 +02:00
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2017-07-16 16:43:17 +02:00
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#ifdef CONFIG_CDCACM_COMPOSITE
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2012-01-27 00:14:27 +01:00
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# include <nuttx/usb/composite.h>
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2012-01-26 18:42:44 +01:00
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# include "composite.h"
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#endif
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2017-09-26 17:30:54 +02:00
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* RX poll delay = 200 milliseconds. CLK_TCK is the number of clock ticks per
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* second
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*/
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#define CDCACM_RXDELAY (CLK_TCK / 5)
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2011-09-13 01:16:16 +02:00
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/* Container to support a list of requests */
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2017-09-26 16:51:02 +02:00
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struct cdcacm_wrreq_s
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2011-09-13 01:16:16 +02:00
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{
|
2017-09-26 16:51:02 +02:00
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FAR struct cdcacm_wrreq_s *flink; /* Implements a singly linked list */
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2011-09-13 21:04:13 +02:00
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FAR struct usbdev_req_s *req; /* The contained request */
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2011-09-13 01:16:16 +02:00
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};
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2017-09-26 16:51:02 +02:00
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struct cdcacm_rdreq_s
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{
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FAR struct cdcacm_rdreq_s *flink; /* Implements a singly linked list */
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FAR struct usbdev_req_s *req; /* The contained request */
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uint16_t offset; /* Offset to valid data in the RX request */
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};
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2011-09-13 01:16:16 +02:00
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/* This structure describes the internal state of the driver */
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2012-01-26 00:04:17 +01:00
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struct cdcacm_dev_s
|
2011-09-13 01:16:16 +02:00
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{
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2017-09-23 19:00:26 +02:00
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FAR struct uart_dev_s serdev; /* Serial device structure */
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FAR struct usbdev_s *usbdev; /* usbdev driver pointer */
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2011-09-13 21:04:13 +02:00
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uint8_t config; /* Configuration number */
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2017-09-26 16:51:02 +02:00
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uint8_t nwrq; /* Number of queue write requests (in txfree) */
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2011-09-13 21:04:13 +02:00
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uint8_t nrdq; /* Number of queue read requests (in epbulkout) */
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2012-02-28 19:14:55 +01:00
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uint8_t minor; /* The device minor number */
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2017-09-26 16:51:02 +02:00
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uint8_t ctrlline; /* Buffered control line state */
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2017-09-22 22:01:00 +02:00
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#ifdef CONFIG_CDCACM_IFLOWCONTROL
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uint8_t serialstate; /* State of the DSR/DCD */
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2017-09-23 19:00:26 +02:00
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bool iflow; /* True: input flow control is enabled */
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2017-09-27 14:41:32 +02:00
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bool iactive; /* True: input flow control is active */
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2017-09-23 19:00:26 +02:00
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bool upper; /* True: RX buffer is (nearly) full */
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2017-09-22 22:01:00 +02:00
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#endif
|
2017-09-23 19:00:26 +02:00
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bool rxenabled; /* true: UART RX "interrupts" enabled */
|
2011-09-13 21:04:13 +02:00
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2017-09-23 19:00:26 +02:00
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struct cdc_linecoding_s linecoding; /* Buffered line status */
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cdcacm_callback_t callback; /* Serial event callback function */
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2011-09-13 21:04:13 +02:00
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2017-09-23 19:00:26 +02:00
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FAR struct usbdev_ep_s *epintin; /* Interrupt IN endpoint structure */
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FAR struct usbdev_ep_s *epbulkin; /* Bulk IN endpoint structure */
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FAR struct usbdev_ep_s *epbulkout; /* Bulk OUT endpoint structure */
|
2014-04-05 19:35:05 +02:00
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FAR struct usbdev_req_s *ctrlreq; /* Allocated control request */
|
2020-08-04 12:31:31 +02:00
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struct wdog_s rxfailsafe; /* Failsafe timer to prevent RX stalls */
|
2017-09-26 16:51:02 +02:00
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struct sq_queue_s txfree; /* Available write request containers */
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struct sq_queue_s rxpending; /* Pending read request containers */
|
2011-09-13 01:16:16 +02:00
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2017-07-20 17:34:48 +02:00
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struct usbdev_devinfo_s devinfo;
|
2017-07-16 16:43:17 +02:00
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2011-09-13 01:16:16 +02:00
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/* Pre-allocated write request containers. The write requests will
|
2017-09-26 16:51:02 +02:00
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* be linked in a free list (txfree), and used to send requests to
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2011-09-13 01:16:16 +02:00
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* EPBULKIN; Read requests will be queued in the EBULKOUT.
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*/
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2017-09-26 16:51:02 +02:00
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struct cdcacm_wrreq_s wrreqs[CONFIG_CDCACM_NWRREQS];
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struct cdcacm_rdreq_s rdreqs[CONFIG_CDCACM_NRDREQS];
|
2011-09-13 01:16:16 +02:00
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/* Serial I/O buffers */
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|
2012-01-26 00:04:17 +01:00
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char rxbuffer[CONFIG_CDCACM_RXBUFSIZE];
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char txbuffer[CONFIG_CDCACM_TXBUFSIZE];
|
2011-09-13 01:16:16 +02:00
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};
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/* The internal version of the class driver */
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|
2012-01-26 00:04:17 +01:00
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struct cdcacm_driver_s
|
2011-09-13 01:16:16 +02:00
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{
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struct usbdevclass_driver_s drvr;
|
2012-01-26 00:04:17 +01:00
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FAR struct cdcacm_dev_s *dev;
|
2011-09-13 01:16:16 +02:00
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};
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/* This is what is allocated */
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|
2012-01-26 00:04:17 +01:00
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struct cdcacm_alloc_s
|
2011-09-13 01:16:16 +02:00
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{
|
2012-01-26 00:04:17 +01:00
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struct cdcacm_dev_s dev;
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struct cdcacm_driver_s drvr;
|
2011-09-13 01:16:16 +02:00
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};
|
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|
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|
|
|
/****************************************************************************
|
|
|
|
* Private Function Prototypes
|
|
|
|
****************************************************************************/
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|
|
/* Transfer helpers *********************************************************/
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|
2012-01-26 00:04:17 +01:00
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static uint16_t cdcacm_fillrequest(FAR struct cdcacm_dev_s *priv,
|
2011-09-13 01:16:16 +02:00
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uint8_t *reqbuf, uint16_t reqlen);
|
2012-01-26 00:04:17 +01:00
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static int cdcacm_sndpacket(FAR struct cdcacm_dev_s *priv);
|
2017-09-26 16:51:02 +02:00
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static int cdcacm_recvpacket(FAR struct cdcacm_dev_s *priv,
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FAR struct cdcacm_rdreq_s *rdcontainer);
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static int cdcacm_requeue_rdrequest(FAR struct cdcacm_dev_s *priv,
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FAR struct cdcacm_rdreq_s *rdcontainer);
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static int cdcacm_release_rxpending(FAR struct cdcacm_dev_s *priv);
|
2020-08-09 20:29:35 +02:00
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static void cdcacm_rxtimeout(wdparm_t arg);
|
2011-09-13 01:16:16 +02:00
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|
2020-08-06 19:41:45 +02:00
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/* Request helpers **********************************************************/
|
2011-09-13 01:16:16 +02:00
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|
2012-01-26 00:04:17 +01:00
|
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static struct usbdev_req_s *cdcacm_allocreq(FAR struct usbdev_ep_s *ep,
|
2011-09-13 01:16:16 +02:00
|
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uint16_t len);
|
2012-01-26 00:04:17 +01:00
|
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|
static void cdcacm_freereq(FAR struct usbdev_ep_s *ep,
|
2011-09-13 01:16:16 +02:00
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FAR struct usbdev_req_s *req);
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|
2020-08-06 19:41:45 +02:00
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/* Flow Control *************************************************************/
|
2017-09-22 22:01:00 +02:00
|
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|
|
#ifdef CONFIG_CDCACM_IFLOWCONTROL
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static int cdcacm_serialstate(FAR struct cdcacm_dev_s *priv);
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|
#endif
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|
2020-08-06 19:41:45 +02:00
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/* Configuration ************************************************************/
|
2011-09-13 01:16:16 +02:00
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|
2012-01-26 00:04:17 +01:00
|
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|
static void cdcacm_resetconfig(FAR struct cdcacm_dev_s *priv);
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|
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static int cdcacm_epconfigure(FAR struct usbdev_ep_s *ep,
|
2017-07-16 16:43:17 +02:00
|
|
|
enum cdcacm_epdesc_e epid, bool last,
|
2017-07-20 17:34:48 +02:00
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FAR struct usbdev_devinfo_s *devinfo,
|
2017-07-16 16:43:17 +02:00
|
|
|
bool hispeed);
|
2012-01-26 00:04:17 +01:00
|
|
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static int cdcacm_setconfig(FAR struct cdcacm_dev_s *priv,
|
2011-09-13 01:16:16 +02:00
|
|
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uint8_t config);
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|
|
|
2020-08-06 19:41:45 +02:00
|
|
|
/* Completion event handlers ************************************************/
|
2011-09-13 01:16:16 +02:00
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|
2012-01-26 00:04:17 +01:00
|
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static void cdcacm_ep0incomplete(FAR struct usbdev_ep_s *ep,
|
2011-09-13 01:16:16 +02:00
|
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FAR struct usbdev_req_s *req);
|
2012-01-26 00:04:17 +01:00
|
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static void cdcacm_rdcomplete(FAR struct usbdev_ep_s *ep,
|
2011-09-13 01:16:16 +02:00
|
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FAR struct usbdev_req_s *req);
|
2012-01-26 00:04:17 +01:00
|
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static void cdcacm_wrcomplete(FAR struct usbdev_ep_s *ep,
|
2011-09-13 01:16:16 +02:00
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FAR struct usbdev_req_s *req);
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|
2020-08-06 19:41:45 +02:00
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|
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/* USB class device *********************************************************/
|
2011-09-13 01:16:16 +02:00
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|
2012-01-26 18:42:44 +01:00
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static int cdcacm_bind(FAR struct usbdevclass_driver_s *driver,
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FAR struct usbdev_s *dev);
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static void cdcacm_unbind(FAR struct usbdevclass_driver_s *driver,
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FAR struct usbdev_s *dev);
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static int cdcacm_setup(FAR struct usbdevclass_driver_s *driver,
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FAR struct usbdev_s *dev,
|
2012-04-12 18:30:48 +02:00
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FAR const struct usb_ctrlreq_s *ctrl, FAR uint8_t *dataout,
|
|
|
|
size_t outlen);
|
2012-01-26 18:42:44 +01:00
|
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static void cdcacm_disconnect(FAR struct usbdevclass_driver_s *driver,
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|
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|
FAR struct usbdev_s *dev);
|
2013-01-31 20:20:26 +01:00
|
|
|
#ifdef CONFIG_SERIAL_REMOVABLE
|
|
|
|
static void cdcacm_suspend(FAR struct usbdevclass_driver_s *driver,
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FAR struct usbdev_s *dev);
|
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|
static void cdcacm_resume(FAR struct usbdevclass_driver_s *driver,
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|
FAR struct usbdev_s *dev);
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|
#endif
|
2011-09-13 01:16:16 +02:00
|
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|
|
2012-01-26 18:42:44 +01:00
|
|
|
/* UART Operations **********************************************************/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2011-09-28 00:04:03 +02:00
|
|
|
static int cdcuart_setup(FAR struct uart_dev_s *dev);
|
|
|
|
static void cdcuart_shutdown(FAR struct uart_dev_s *dev);
|
|
|
|
static int cdcuart_attach(FAR struct uart_dev_s *dev);
|
|
|
|
static void cdcuart_detach(FAR struct uart_dev_s *dev);
|
2015-10-10 18:41:00 +02:00
|
|
|
static int cdcuart_ioctl(FAR struct file *filep, int cmd,
|
|
|
|
unsigned long arg);
|
2011-09-28 00:04:03 +02:00
|
|
|
static void cdcuart_rxint(FAR struct uart_dev_s *dev, bool enable);
|
2015-04-16 16:22:07 +02:00
|
|
|
#ifdef CONFIG_SERIAL_IFLOWCONTROL
|
|
|
|
static bool cdcuart_rxflowcontrol(FAR struct uart_dev_s *dev,
|
|
|
|
unsigned int nbuffered, bool upper);
|
|
|
|
#endif
|
2011-09-28 00:04:03 +02:00
|
|
|
static void cdcuart_txint(FAR struct uart_dev_s *dev, bool enable);
|
|
|
|
static bool cdcuart_txempty(FAR struct uart_dev_s *dev);
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/****************************************************************************
|
2016-02-22 01:08:58 +01:00
|
|
|
* Private Data
|
2011-09-13 01:16:16 +02:00
|
|
|
****************************************************************************/
|
2017-07-16 16:43:17 +02:00
|
|
|
|
2011-09-28 00:04:03 +02:00
|
|
|
/* USB class device *********************************************************/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
static const struct usbdevclass_driverops_s g_driverops =
|
|
|
|
{
|
2015-04-16 16:22:07 +02:00
|
|
|
cdcacm_bind, /* bind */
|
|
|
|
cdcacm_unbind, /* unbind */
|
|
|
|
cdcacm_setup, /* setup */
|
|
|
|
cdcacm_disconnect, /* disconnect */
|
2013-01-31 20:20:26 +01:00
|
|
|
#ifdef CONFIG_SERIAL_REMOVABLE
|
2015-04-16 16:22:07 +02:00
|
|
|
cdcacm_suspend, /* suspend */
|
|
|
|
cdcacm_resume, /* resume */
|
2013-01-31 20:20:26 +01:00
|
|
|
#else
|
2015-04-16 16:22:07 +02:00
|
|
|
NULL, /* suspend */
|
|
|
|
NULL, /* resume */
|
2013-01-31 20:20:26 +01:00
|
|
|
#endif
|
2011-09-13 01:16:16 +02:00
|
|
|
};
|
|
|
|
|
2011-09-28 00:04:03 +02:00
|
|
|
/* Serial port **************************************************************/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
static const struct uart_ops_s g_uartops =
|
|
|
|
{
|
2015-04-16 16:22:07 +02:00
|
|
|
cdcuart_setup, /* setup */
|
|
|
|
cdcuart_shutdown, /* shutdown */
|
|
|
|
cdcuart_attach, /* attach */
|
|
|
|
cdcuart_detach, /* detach */
|
|
|
|
cdcuart_ioctl, /* ioctl */
|
|
|
|
NULL, /* receive */
|
|
|
|
cdcuart_rxint, /* rxinit */
|
|
|
|
NULL, /* rxavailable */
|
2014-05-08 17:00:33 +02:00
|
|
|
#ifdef CONFIG_SERIAL_IFLOWCONTROL
|
2015-04-16 16:22:07 +02:00
|
|
|
cdcuart_rxflowcontrol, /* rxflowcontrol */
|
2016-12-17 15:29:41 +01:00
|
|
|
#endif
|
2019-04-24 20:11:40 +02:00
|
|
|
#ifdef CONFIG_SERIAL_TXDMA
|
2016-12-17 15:29:41 +01:00
|
|
|
NULL, /* dmasend */
|
2019-04-24 20:11:40 +02:00
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_SERIAL_RXDMA
|
2016-12-17 15:29:41 +01:00
|
|
|
NULL, /* dmareceive */
|
|
|
|
NULL, /* dmarxfree */
|
2019-04-24 20:11:40 +02:00
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_SERIAL_TXDMA
|
2016-12-17 15:29:41 +01:00
|
|
|
NULL, /* dmatxavail */
|
2014-05-08 17:00:33 +02:00
|
|
|
#endif
|
2015-04-16 16:22:07 +02:00
|
|
|
NULL, /* send */
|
|
|
|
cdcuart_txint, /* txinit */
|
|
|
|
NULL, /* txready */
|
|
|
|
cdcuart_txempty /* txempty */
|
2011-09-13 01:16:16 +02:00
|
|
|
};
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Private Functions
|
|
|
|
****************************************************************************/
|
|
|
|
|
2011-09-28 00:04:03 +02:00
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_fillrequest
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
2011-09-28 00:04:03 +02:00
|
|
|
* If there is data to send it is copied to the given buffer. Called
|
|
|
|
* either to initiate the first write operation, or from the completion
|
|
|
|
* interrupt handler service consecutive write operations.
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
2011-09-28 00:04:03 +02:00
|
|
|
* NOTE: The USB serial driver does not use the serial drivers
|
|
|
|
* uart_xmitchars() API. That logic is essentially duplicated here because
|
2019-01-02 14:44:20 +01:00
|
|
|
* unlike UART hardware, we need to be able to handle writes not byte-by-
|
|
|
|
* byte, but packet-by-packet. Unfortunately, that decision also exposes
|
|
|
|
* some internals of the serial driver in the following.
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
2011-09-28 00:04:03 +02:00
|
|
|
****************************************************************************/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
static uint16_t cdcacm_fillrequest(FAR struct cdcacm_dev_s *priv,
|
|
|
|
FAR uint8_t *reqbuf,
|
2011-09-28 00:04:03 +02:00
|
|
|
uint16_t reqlen)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
|
|
|
FAR uart_dev_t *serdev = &priv->serdev;
|
|
|
|
FAR struct uart_buffer_s *xmit = &serdev->xmit;
|
|
|
|
irqstate_t flags;
|
|
|
|
uint16_t nbytes = 0;
|
|
|
|
|
|
|
|
/* Disable interrupts */
|
|
|
|
|
2016-02-14 14:32:58 +01:00
|
|
|
flags = enter_critical_section();
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
/* Transfer bytes while we have bytes available and there is room in the
|
|
|
|
* request.
|
|
|
|
*/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
while (xmit->head != xmit->tail && nbytes < reqlen)
|
|
|
|
{
|
|
|
|
*reqbuf++ = xmit->buffer[xmit->tail];
|
|
|
|
nbytes++;
|
|
|
|
|
|
|
|
/* Increment the tail pointer */
|
|
|
|
|
|
|
|
if (++(xmit->tail) >= xmit->size)
|
|
|
|
{
|
|
|
|
xmit->tail = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
/* When all of the characters have been sent from the buffer disable the
|
|
|
|
* "TX interrupt".
|
2011-09-13 01:16:16 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
if (xmit->head == xmit->tail)
|
|
|
|
{
|
|
|
|
uart_disabletxint(serdev);
|
|
|
|
}
|
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
/* If any bytes were removed from the buffer, inform any waiters that
|
|
|
|
* there is space available.
|
2011-09-13 01:16:16 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
if (nbytes)
|
|
|
|
{
|
|
|
|
uart_datasent(serdev);
|
|
|
|
}
|
|
|
|
|
2016-02-14 14:32:58 +01:00
|
|
|
leave_critical_section(flags);
|
2011-09-13 01:16:16 +02:00
|
|
|
return nbytes;
|
|
|
|
}
|
|
|
|
|
2011-09-28 00:04:03 +02:00
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_sndpacket
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
2011-09-28 00:04:03 +02:00
|
|
|
* This function obtains write requests, transfers the TX data into the
|
2017-07-16 16:43:17 +02:00
|
|
|
* request, and submits the requests to the USB controller. This
|
|
|
|
* continues until either (1) there are no further packets available, or
|
|
|
|
* (2) there is no further data to send.
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
2011-09-28 00:04:03 +02:00
|
|
|
****************************************************************************/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
static int cdcacm_sndpacket(FAR struct cdcacm_dev_s *priv)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
|
|
|
FAR struct usbdev_ep_s *ep;
|
|
|
|
FAR struct usbdev_req_s *req;
|
2017-09-26 16:51:02 +02:00
|
|
|
FAR struct cdcacm_wrreq_s *wrcontainer;
|
2012-05-26 00:10:40 +02:00
|
|
|
uint16_t reqlen;
|
2011-09-13 01:16:16 +02:00
|
|
|
irqstate_t flags;
|
|
|
|
int len;
|
|
|
|
int ret = OK;
|
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2011-09-13 01:16:16 +02:00
|
|
|
if (priv == NULL)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
2017-09-22 22:01:00 +02:00
|
|
|
return -EINVAL;
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2016-02-14 14:32:58 +01:00
|
|
|
flags = enter_critical_section();
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-09-22 22:01:00 +02:00
|
|
|
/* Use our bulk IN endpoint for the transfer */
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
ep = priv->epbulkin;
|
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
/* Loop until either (1) we run out or write requests, or (2)
|
|
|
|
* cdcacm_fillrequest() is unable to fill the request with data (i.e.,
|
|
|
|
* until there is no more data to be sent).
|
2011-09-13 01:16:16 +02:00
|
|
|
*/
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
uinfo("head=%d tail=%d nwrq=%d empty=%d\n",
|
2011-09-13 01:16:16 +02:00
|
|
|
priv->serdev.xmit.head, priv->serdev.xmit.tail,
|
2017-09-26 16:51:02 +02:00
|
|
|
priv->nwrq, sq_empty(&priv->txfree));
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-05-26 00:10:40 +02:00
|
|
|
/* Get the maximum number of bytes that will fit into one bulk IN request */
|
|
|
|
|
2013-05-29 20:30:37 +02:00
|
|
|
reqlen = MAX(CONFIG_CDCACM_BULKIN_REQLEN, ep->maxpacket);
|
2012-05-26 00:10:40 +02:00
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
while (!sq_empty(&priv->txfree))
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
|
|
|
/* Peek at the request in the container at the head of the list */
|
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
wrcontainer = (FAR struct cdcacm_wrreq_s *)sq_peek(&priv->txfree);
|
|
|
|
req = wrcontainer->req;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Fill the request with serial TX data */
|
|
|
|
|
2012-05-26 00:10:40 +02:00
|
|
|
len = cdcacm_fillrequest(priv, req->buf, reqlen);
|
2011-09-13 01:16:16 +02:00
|
|
|
if (len > 0)
|
|
|
|
{
|
|
|
|
/* Remove the empty container from the request list */
|
|
|
|
|
2020-01-02 17:49:34 +01:00
|
|
|
sq_remfirst(&priv->txfree);
|
2011-09-13 01:16:16 +02:00
|
|
|
priv->nwrq--;
|
|
|
|
|
|
|
|
/* Then submit the request to the endpoint */
|
|
|
|
|
|
|
|
req->len = len;
|
2017-09-26 16:51:02 +02:00
|
|
|
req->priv = wrcontainer;
|
2011-09-13 01:16:16 +02:00
|
|
|
req->flags = USBDEV_REQFLAGS_NULLPKT;
|
|
|
|
ret = EP_SUBMIT(ep, req);
|
|
|
|
if (ret != OK)
|
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_SUBMITFAIL),
|
|
|
|
(uint16_t)-ret);
|
2011-09-13 01:16:16 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-02-14 14:32:58 +01:00
|
|
|
leave_critical_section(flags);
|
2011-09-13 01:16:16 +02:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2011-09-28 00:04:03 +02:00
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_recvpacket
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
2011-09-28 00:04:03 +02:00
|
|
|
* A normal completion event was received by the read completion handler
|
2020-08-06 19:41:45 +02:00
|
|
|
* at the interrupt level (with interrupts disabled). This function handles
|
2011-09-28 00:04:03 +02:00
|
|
|
* the USB packet and provides the received data to the uart RX buffer.
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Assumptions:
|
|
|
|
* Called from the USB interrupt handler with interrupts disabled.
|
|
|
|
*
|
2011-09-28 00:04:03 +02:00
|
|
|
****************************************************************************/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
static int cdcacm_recvpacket(FAR struct cdcacm_dev_s *priv,
|
|
|
|
FAR struct cdcacm_rdreq_s *rdcontainer)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2017-09-26 16:51:02 +02:00
|
|
|
FAR uart_dev_t *serdev;
|
|
|
|
FAR struct uart_buffer_s *recv;
|
|
|
|
FAR struct usbdev_req_s *req;
|
|
|
|
FAR uint8_t *reqbuf;
|
2017-09-27 16:46:49 +02:00
|
|
|
#ifdef CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS
|
|
|
|
unsigned int watermark;
|
|
|
|
#endif
|
2017-09-26 16:51:02 +02:00
|
|
|
uint16_t reqlen;
|
2011-09-13 01:16:16 +02:00
|
|
|
uint16_t nexthead;
|
|
|
|
uint16_t nbytes = 0;
|
|
|
|
|
2017-10-18 19:06:14 +02:00
|
|
|
DEBUGASSERT(priv != NULL && rdcontainer != NULL);
|
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
#ifdef CONFIG_CDCACM_IFLOWCONTROL
|
2017-09-27 14:41:32 +02:00
|
|
|
DEBUGASSERT(priv->rxenabled && !priv->iactive);
|
2017-09-26 16:51:02 +02:00
|
|
|
#else
|
|
|
|
DEBUGASSERT(priv->rxenabled);
|
|
|
|
#endif
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
req = rdcontainer->req;
|
|
|
|
DEBUGASSERT(req != NULL);
|
|
|
|
|
|
|
|
reqbuf = &req->buf[rdcontainer->offset];
|
|
|
|
reqlen = req->xfrd - rdcontainer->offset;
|
|
|
|
|
2023-02-27 07:52:21 +01:00
|
|
|
uinfo("head=%d tail=%d nrdq=%d reqlen=%d\n",
|
|
|
|
priv->serdev.recv.head, priv->serdev.recv.tail, priv->nrdq, reqlen);
|
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
serdev = &priv->serdev;
|
|
|
|
recv = &serdev->recv;
|
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
/* Pre-calculate the head index and check for wrap around. We need to do
|
|
|
|
* this so that we can determine if the circular buffer will overrun
|
|
|
|
* BEFORE we overrun the buffer!
|
2011-09-13 01:16:16 +02:00
|
|
|
*/
|
|
|
|
|
2019-01-02 14:44:20 +01:00
|
|
|
nexthead = recv->head + 1;
|
2011-09-13 01:16:16 +02:00
|
|
|
if (nexthead >= recv->size)
|
|
|
|
{
|
|
|
|
nexthead = 0;
|
|
|
|
}
|
|
|
|
|
2017-09-27 16:46:49 +02:00
|
|
|
#ifdef CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS
|
2020-11-08 16:57:30 +01:00
|
|
|
/* Pre-calculate the watermark level that we will need to test against.
|
2017-10-18 14:49:11 +02:00
|
|
|
* Note that the range of the the upper watermark is from 1 to 99 percent
|
2019-01-02 14:44:20 +01:00
|
|
|
* and that the actual capacity of the RX buffer is (recv->size - 1).
|
2017-10-18 14:49:11 +02:00
|
|
|
*/
|
2017-09-27 16:46:49 +02:00
|
|
|
|
2020-08-06 19:41:45 +02:00
|
|
|
watermark = CONFIG_SERIAL_IFLOWCONTROL_UPPER_WATERMARK * recv->size / 100;
|
2017-10-18 15:10:34 +02:00
|
|
|
DEBUGASSERT(watermark > 0 && watermark < (recv->size - 1));
|
2017-09-27 16:46:49 +02:00
|
|
|
#endif
|
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
/* Then copy data into the RX buffer until either: (1) all of the data has
|
|
|
|
* been copied, or (2) the RX buffer is full.
|
2015-05-18 16:53:24 +02:00
|
|
|
*
|
2017-07-16 16:43:17 +02:00
|
|
|
* NOTE: If the RX buffer becomes full, then we have overrun the serial
|
|
|
|
* driver and data will be lost. This is the correct behavior for a
|
|
|
|
* proper emulation of a serial link. It should not NAK, it should drop
|
|
|
|
* data like a physical serial port.
|
2015-05-18 16:53:24 +02:00
|
|
|
*
|
2017-07-16 16:43:17 +02:00
|
|
|
* If you don't like that behavior. DO NOT change it here. Instead, you
|
|
|
|
* should finish the implementation of RX flow control which is the only
|
|
|
|
* proper way to throttle a serial device.
|
2011-09-13 01:16:16 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
while (nexthead != recv->tail && nbytes < reqlen)
|
|
|
|
{
|
2017-10-18 14:49:11 +02:00
|
|
|
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && \
|
|
|
|
defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS)
|
2017-09-27 16:46:49 +02:00
|
|
|
unsigned int nbuffered;
|
|
|
|
|
|
|
|
/* How many bytes are buffered */
|
|
|
|
|
|
|
|
if (recv->head >= recv->tail)
|
|
|
|
{
|
|
|
|
nbuffered = recv->head - recv->tail;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
nbuffered = recv->size - recv->tail + recv->head;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Is the level now above the watermark level that we need to report? */
|
|
|
|
|
|
|
|
if (nbuffered >= watermark)
|
|
|
|
{
|
2020-08-06 19:41:45 +02:00
|
|
|
/* Let the lower level driver know that the watermark level has
|
|
|
|
* been crossed. It will probably activate RX flow control.
|
2017-09-27 16:46:49 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
if (cdcuart_rxflowcontrol(&priv->serdev, nbuffered, true))
|
|
|
|
{
|
|
|
|
/* Low-level driver activated RX flow control, exit loop now. */
|
|
|
|
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
/* Copy one byte to the head of the circular RX buffer */
|
|
|
|
|
2019-01-02 14:44:20 +01:00
|
|
|
recv->buffer[recv->head] = *reqbuf++;
|
2011-09-13 01:16:16 +02:00
|
|
|
nbytes++;
|
|
|
|
|
|
|
|
/* Increment the head index and check for wrap around */
|
|
|
|
|
2019-01-02 14:44:20 +01:00
|
|
|
recv->head = nexthead;
|
|
|
|
if (++nexthead >= recv->size)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
|
|
|
nexthead = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-10-18 14:49:11 +02:00
|
|
|
#if defined(CONFIG_SERIAL_IFLOWCONTROL) && \
|
|
|
|
!defined(CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS)
|
|
|
|
/* Check if RX buffer became full and allow serial low-level driver to
|
|
|
|
* pause processing. This allows proper utilization of hardware flow
|
|
|
|
* control when there are no watermarks.
|
|
|
|
*/
|
|
|
|
|
2020-01-10 16:06:36 +01:00
|
|
|
if (nexthead == recv->tail)
|
|
|
|
{
|
|
|
|
cdcuart_rxflowcontrol(&priv->serdev, recv->size - 1, true);
|
|
|
|
}
|
2017-10-18 14:49:11 +02:00
|
|
|
#endif
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
/* If data was added to the incoming serial buffer, then wake up any
|
|
|
|
* threads is waiting for incoming data. If we are running in an interrupt
|
2017-10-18 14:49:11 +02:00
|
|
|
* handler, then the serial driver will not run until the interrupt
|
|
|
|
* handler returns.
|
2011-09-13 01:16:16 +02:00
|
|
|
*/
|
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
if (nbytes > 0)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
|
|
|
uart_datareceived(serdev);
|
|
|
|
}
|
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
/* Return an overrun error if the entire packet could not be transferred. */
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
if (nbytes < reqlen)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_RXOVERRUN), 0);
|
2019-01-02 14:44:20 +01:00
|
|
|
rdcontainer->offset += nbytes;
|
2011-09-13 01:16:16 +02:00
|
|
|
return -ENOSPC;
|
|
|
|
}
|
2017-07-16 16:43:17 +02:00
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
/****************************************************************************
|
|
|
|
* Name: cdcacm_requeue_rdrequest
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Add any pending RX packets to the upper half serial drivers RX buffer.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int cdcacm_requeue_rdrequest(FAR struct cdcacm_dev_s *priv,
|
|
|
|
FAR struct cdcacm_rdreq_s *rdcontainer)
|
|
|
|
{
|
|
|
|
FAR struct usbdev_req_s *req;
|
|
|
|
FAR struct usbdev_ep_s *ep;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
DEBUGASSERT(priv != NULL && rdcontainer != NULL);
|
|
|
|
rdcontainer->offset = 0;
|
|
|
|
|
|
|
|
req = rdcontainer->req;
|
|
|
|
DEBUGASSERT(req != NULL);
|
|
|
|
|
|
|
|
/* Requeue the read request */
|
|
|
|
|
|
|
|
ep = priv->epbulkout;
|
|
|
|
req->len = ep->maxpacket;
|
|
|
|
ret = EP_SUBMIT(ep, req);
|
|
|
|
if (ret != OK)
|
|
|
|
{
|
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_RDSUBMIT),
|
|
|
|
(uint16_t)-req->result);
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: cdcacm_release_rxpending
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Add any pending RX packets to the upper half serial drivers RX buffer.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
static int cdcacm_release_rxpending(FAR struct cdcacm_dev_s *priv)
|
|
|
|
{
|
|
|
|
FAR struct cdcacm_rdreq_s *rdcontainer;
|
|
|
|
irqstate_t flags;
|
|
|
|
int ret = -EBUSY;
|
|
|
|
|
2017-09-27 14:41:32 +02:00
|
|
|
/* Note that the priv->rxpending queue, priv->rxenabled, priv->iactive
|
|
|
|
* may be modified by interrupt level processing and, hence, interrupts
|
|
|
|
* must be disabled throughout the following.
|
2017-09-26 17:30:54 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
flags = enter_critical_section();
|
|
|
|
|
|
|
|
/* Cancel any pending failsafe timer */
|
|
|
|
|
2020-08-04 12:31:31 +02:00
|
|
|
wd_cancel(&priv->rxfailsafe);
|
2017-09-26 17:30:54 +02:00
|
|
|
|
2017-09-27 16:46:49 +02:00
|
|
|
/* If RX "interrupts" are enabled and if input flow control is not in
|
|
|
|
* effect, then pass the packet at the head of the pending RX packet list
|
|
|
|
* to the upper serial layer. Otherwise, let the packet continue to pend
|
|
|
|
* the priv->rxpending list until the upper serial layer is able to buffer
|
|
|
|
* it.
|
2017-09-26 16:51:02 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
#ifdef CONFIG_CDCACM_IFLOWCONTROL
|
2017-09-27 14:41:32 +02:00
|
|
|
if (priv->rxenabled && !priv->iactive)
|
2017-09-26 16:51:02 +02:00
|
|
|
#else
|
|
|
|
if (priv->rxenabled)
|
|
|
|
#endif
|
|
|
|
{
|
|
|
|
/* Process pending RX packets while the queue is not empty and while
|
|
|
|
* no errors occur. NOTE that the priv->rxpending queue is accessed
|
|
|
|
* from interrupt level processing and, hence, interrupts must be
|
|
|
|
* disabled throughout the following.
|
|
|
|
*/
|
|
|
|
|
2017-09-26 17:30:54 +02:00
|
|
|
ret = OK;
|
2017-09-26 16:51:02 +02:00
|
|
|
|
|
|
|
while (!sq_empty(&priv->rxpending))
|
|
|
|
{
|
|
|
|
/* Process each packet in the priv->rxpending list */
|
|
|
|
|
|
|
|
rdcontainer = (FAR struct cdcacm_rdreq_s *)
|
|
|
|
sq_peek(&priv->rxpending);
|
|
|
|
DEBUGASSERT(rdcontainer != NULL);
|
|
|
|
|
|
|
|
/* cdcacm_recvpacket() will return OK if the entire packet was
|
|
|
|
* successful buffered. In the case of RX buffer overrun,
|
|
|
|
* cdcacm_recvpacket() will return a failure (-ENOSPC) and will
|
2019-10-08 16:01:30 +02:00
|
|
|
* set the req->offset field.
|
2017-09-26 16:51:02 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
ret = cdcacm_recvpacket(priv, rdcontainer);
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
uwarn("WARNING: RX buffer full\n");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* The entire packet was processed and may be removed from the
|
|
|
|
* pending RX list and returned to the DCD.
|
|
|
|
*/
|
|
|
|
|
2020-01-02 17:49:34 +01:00
|
|
|
sq_remfirst(&priv->rxpending);
|
2017-09-26 16:51:02 +02:00
|
|
|
ret = cdcacm_requeue_rdrequest(priv, rdcontainer);
|
|
|
|
}
|
2017-09-26 17:30:54 +02:00
|
|
|
}
|
2017-09-26 16:51:02 +02:00
|
|
|
|
2017-09-26 17:30:54 +02:00
|
|
|
/* Restart the RX failsafe timer if there are RX packets in
|
|
|
|
* priv->rxpending. This could happen if either RX "interrupts" are
|
|
|
|
* disable, RX flow control is in effect of if the upper serial drivers
|
|
|
|
* RX buffer is full and cannot accept additional data.
|
|
|
|
*
|
|
|
|
* If/when the timer expires, cdcacm_release_rxpending() will be called
|
|
|
|
* the timer handler (at interrupt level).
|
|
|
|
*
|
|
|
|
* The timer may not be necessary, but it is a failsafe to be certain
|
|
|
|
* that data cannot stall in priv->rxpending.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (!sq_empty(&priv->rxpending))
|
|
|
|
{
|
2020-08-04 12:31:31 +02:00
|
|
|
wd_start(&priv->rxfailsafe, CDCACM_RXDELAY,
|
2020-08-09 20:29:35 +02:00
|
|
|
cdcacm_rxtimeout, (wdparm_t)priv);
|
2017-09-26 16:51:02 +02:00
|
|
|
}
|
|
|
|
|
2017-09-26 17:30:54 +02:00
|
|
|
leave_critical_section(flags);
|
2017-09-26 16:51:02 +02:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2017-09-26 17:30:54 +02:00
|
|
|
/****************************************************************************
|
|
|
|
* Name: cdcacm_rxtimeout
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Timer expiration handler. Whenever cdcacm_release_rxpending()
|
|
|
|
* terminates with pending RX data in priv->rxpending, it will set a
|
|
|
|
* timer to recheck the queued RX data can be processed later. This
|
|
|
|
* failsafe timer may not be necessary, but this reduces my paranoia
|
|
|
|
* about stalls in the RX pending FIFO .
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2020-08-09 20:29:35 +02:00
|
|
|
static void cdcacm_rxtimeout(wdparm_t arg)
|
2017-09-26 17:30:54 +02:00
|
|
|
{
|
2020-08-09 20:29:35 +02:00
|
|
|
FAR struct cdcacm_dev_s *priv = (FAR struct cdcacm_dev_s *)arg;
|
2017-09-26 17:30:54 +02:00
|
|
|
|
|
|
|
DEBUGASSERT(priv != NULL);
|
2020-01-02 17:49:34 +01:00
|
|
|
cdcacm_release_rxpending(priv);
|
2017-09-26 17:30:54 +02:00
|
|
|
}
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_allocreq
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Allocate a request instance along with its buffer
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
static struct usbdev_req_s *cdcacm_allocreq(FAR struct usbdev_ep_s *ep,
|
2011-09-28 00:04:03 +02:00
|
|
|
uint16_t len)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
|
|
|
FAR struct usbdev_req_s *req;
|
|
|
|
|
|
|
|
req = EP_ALLOCREQ(ep);
|
|
|
|
if (req != NULL)
|
|
|
|
{
|
|
|
|
req->len = len;
|
|
|
|
req->buf = EP_ALLOCBUFFER(ep, len);
|
2017-09-22 23:19:43 +02:00
|
|
|
if (req->buf == NULL)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
|
|
|
EP_FREEREQ(ep, req);
|
|
|
|
req = NULL;
|
|
|
|
}
|
|
|
|
}
|
2013-09-02 20:26:15 +02:00
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
return req;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_freereq
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Free a request instance along with its buffer
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
static void cdcacm_freereq(FAR struct usbdev_ep_s *ep,
|
2011-09-28 00:04:03 +02:00
|
|
|
FAR struct usbdev_req_s *req)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
|
|
|
if (ep != NULL && req != NULL)
|
|
|
|
{
|
|
|
|
if (req->buf != NULL)
|
|
|
|
{
|
|
|
|
EP_FREEBUFFER(ep, req->buf);
|
|
|
|
}
|
2017-07-16 16:43:17 +02:00
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
EP_FREEREQ(ep, req);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-09-22 22:01:00 +02:00
|
|
|
/****************************************************************************
|
|
|
|
* Name: cdcacm_serialstate
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Send the serial state message.
|
|
|
|
*
|
|
|
|
* 1. Format and send a request header with:
|
|
|
|
*
|
|
|
|
* bmRequestType:
|
|
|
|
* USB_REQ_DIR_IN | USB_REQ_TYPE_CLASS |
|
|
|
|
* USB_REQ_RECIPIENT_INTERFACE
|
|
|
|
* bRequest: ACM_SERIAL_STATE
|
|
|
|
* wValue: 0
|
|
|
|
* wIndex: 0
|
|
|
|
* wLength: Length of data = 2
|
|
|
|
*
|
|
|
|
* 2. Followed by the notification data
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_CDCACM_IFLOWCONTROL
|
|
|
|
static int cdcacm_serialstate(FAR struct cdcacm_dev_s *priv)
|
|
|
|
{
|
|
|
|
FAR struct usbdev_ep_s *ep;
|
|
|
|
FAR struct usbdev_req_s *req;
|
2017-09-26 16:51:02 +02:00
|
|
|
FAR struct cdcacm_wrreq_s *wrcontainer;
|
2017-09-22 22:01:00 +02:00
|
|
|
FAR struct cdc_notification_s *notify;
|
|
|
|
irqstate_t flags;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
DEBUGASSERT(priv != NULL && priv->epintin != NULL);
|
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
|
|
|
if (priv == NULL || priv->epintin == NULL)
|
|
|
|
{
|
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2017-09-26 14:31:30 +02:00
|
|
|
usbtrace(CDCACM_CLASSAPI_FLOWCONTROL, (uint16_t)priv->serialstate);
|
|
|
|
|
2017-09-22 22:01:00 +02:00
|
|
|
flags = enter_critical_section();
|
|
|
|
|
|
|
|
/* Use our interrupt IN endpoint for the transfer */
|
|
|
|
|
|
|
|
ep = priv->epintin;
|
|
|
|
|
|
|
|
/* Remove the next container from the request list */
|
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
wrcontainer = (FAR struct cdcacm_wrreq_s *)sq_remfirst(&priv->txfree);
|
|
|
|
if (wrcontainer == NULL)
|
2017-09-22 22:01:00 +02:00
|
|
|
{
|
|
|
|
ret = -ENOMEM;
|
|
|
|
goto errout_with_flags;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Decrement the count of write requests */
|
|
|
|
|
|
|
|
priv->nwrq--;
|
|
|
|
|
2019-01-02 14:44:20 +01:00
|
|
|
/* Format the SerialState notification */
|
2017-09-22 22:01:00 +02:00
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
DEBUGASSERT(wrcontainer->req != NULL);
|
|
|
|
req = wrcontainer->req;
|
2017-09-22 22:01:00 +02:00
|
|
|
|
|
|
|
DEBUGASSERT(req->buf != NULL);
|
|
|
|
notify = (FAR struct cdc_notification_s *)req->buf;
|
|
|
|
|
|
|
|
notify->type = (USB_REQ_DIR_IN | USB_REQ_TYPE_CLASS |
|
|
|
|
USB_REQ_RECIPIENT_INTERFACE);
|
|
|
|
notify->notification = ACM_SERIAL_STATE;
|
|
|
|
notify->value[0] = 0;
|
|
|
|
notify->value[1] = 0;
|
|
|
|
notify->index[0] = 0;
|
|
|
|
notify->index[1] = 0;
|
|
|
|
notify->len[0] = 2;
|
|
|
|
notify->len[1] = 0;
|
|
|
|
notify->data[0] = priv->serialstate;
|
|
|
|
notify->data[1] = 0;
|
|
|
|
|
|
|
|
/* Then submit the request to the endpoint */
|
|
|
|
|
2017-09-22 23:19:43 +02:00
|
|
|
req->len = SIZEOF_NOTIFICATION_S(2);
|
2017-09-26 16:51:02 +02:00
|
|
|
req->priv = wrcontainer;
|
2017-09-22 22:01:00 +02:00
|
|
|
req->flags = USBDEV_REQFLAGS_NULLPKT;
|
|
|
|
ret = EP_SUBMIT(ep, req);
|
|
|
|
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_SUBMITFAIL), (uint16_t)-ret);
|
|
|
|
}
|
|
|
|
|
|
|
|
errout_with_flags:
|
2020-01-10 16:06:36 +01:00
|
|
|
|
2017-09-23 20:37:57 +02:00
|
|
|
/* Reset all of the "irregular" notification */
|
|
|
|
|
|
|
|
priv->serialstate &= CDC_UART_CONSISTENT;
|
|
|
|
|
2017-09-22 22:01:00 +02:00
|
|
|
leave_critical_section(flags);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_resetconfig
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Mark the device as not configured and disable all endpoints.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
static void cdcacm_resetconfig(FAR struct cdcacm_dev_s *priv)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
|
|
|
/* Are we configured? */
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
if (priv->config != CDCACM_CONFIGIDNONE)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
|
|
|
/* Yes.. but not anymore */
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
priv->config = CDCACM_CONFIGIDNONE;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2013-01-31 17:52:20 +01:00
|
|
|
/* Inform the "upper half" driver that there is no (functional) USB
|
|
|
|
* connection.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifdef CONFIG_SERIAL_REMOVABLE
|
|
|
|
uart_connected(&priv->serdev, false);
|
|
|
|
#endif
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
/* Disable endpoints. This should force completion of all pending
|
|
|
|
* transfers.
|
|
|
|
*/
|
|
|
|
|
|
|
|
EP_DISABLE(priv->epintin);
|
|
|
|
EP_DISABLE(priv->epbulkin);
|
|
|
|
EP_DISABLE(priv->epbulkout);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2011-09-13 21:04:13 +02:00
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_epconfigure
|
2011-09-13 21:04:13 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Configure one endpoint.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
static int cdcacm_epconfigure(FAR struct usbdev_ep_s *ep,
|
2017-07-16 16:43:17 +02:00
|
|
|
enum cdcacm_epdesc_e epid, bool last,
|
2017-07-20 17:34:48 +02:00
|
|
|
FAR struct usbdev_devinfo_s *devinfo,
|
2017-07-16 16:43:17 +02:00
|
|
|
bool hispeed)
|
2011-09-13 21:04:13 +02:00
|
|
|
{
|
|
|
|
struct usb_epdesc_s epdesc;
|
2017-07-20 17:34:48 +02:00
|
|
|
cdcacm_copy_epdesc(epid, &epdesc, devinfo, hispeed);
|
2011-09-13 21:04:13 +02:00
|
|
|
return EP_CONFIGURE(ep, &epdesc, last);
|
|
|
|
}
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_setconfig
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Set the device configuration by allocating and configuring endpoints and
|
|
|
|
* by allocating and queue read and write requests.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
static int cdcacm_setconfig(FAR struct cdcacm_dev_s *priv, uint8_t config)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
|
|
|
FAR struct usbdev_req_s *req;
|
|
|
|
int i;
|
|
|
|
int ret = 0;
|
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2011-09-13 01:16:16 +02:00
|
|
|
if (priv == NULL)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
2017-09-22 22:01:00 +02:00
|
|
|
return -EINVAL;
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
if (config == priv->config)
|
|
|
|
{
|
|
|
|
/* Already configured -- Do nothing */
|
|
|
|
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_ALREADYCONFIGURED), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Discard the previous configuration data */
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
cdcacm_resetconfig(priv);
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Was this a request to simply discard the current configuration? */
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
if (config == CDCACM_CONFIGIDNONE)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_CONFIGNONE), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* We only accept one configuration */
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
if (config != CDCACM_CONFIGID)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_CONFIGIDBAD), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Configure the IN interrupt endpoint */
|
|
|
|
|
2011-09-13 21:04:13 +02:00
|
|
|
#ifdef CONFIG_USBDEV_DUALSPEED
|
|
|
|
if (priv->usbdev->speed == USB_SPEED_HIGH)
|
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
ret = cdcacm_epconfigure(priv->epintin, CDCACM_EPINTIN, false,
|
2017-07-20 17:34:48 +02:00
|
|
|
&priv->devinfo, true);
|
2011-09-13 21:04:13 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
#endif
|
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
ret = cdcacm_epconfigure(priv->epintin, CDCACM_EPINTIN, false,
|
|
|
|
&priv->devinfo, false);
|
2011-09-13 21:04:13 +02:00
|
|
|
}
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EPINTINCONFIGFAIL), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
goto errout;
|
|
|
|
}
|
2015-05-10 16:16:58 +02:00
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
priv->epintin->priv = priv;
|
|
|
|
|
|
|
|
/* Configure the IN bulk endpoint */
|
|
|
|
|
|
|
|
#ifdef CONFIG_USBDEV_DUALSPEED
|
|
|
|
if (priv->usbdev->speed == USB_SPEED_HIGH)
|
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
ret = cdcacm_epconfigure(priv->epbulkin, CDCACM_EPBULKIN, false,
|
2017-07-20 17:34:48 +02:00
|
|
|
&priv->devinfo, true);
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
else
|
2011-09-13 21:04:13 +02:00
|
|
|
#endif
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
ret = cdcacm_epconfigure(priv->epbulkin, CDCACM_EPBULKIN, false,
|
|
|
|
&priv->devinfo, false);
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EPBULKINCONFIGFAIL), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
goto errout;
|
|
|
|
}
|
|
|
|
|
|
|
|
priv->epbulkin->priv = priv;
|
|
|
|
|
|
|
|
/* Configure the OUT bulk endpoint */
|
|
|
|
|
|
|
|
#ifdef CONFIG_USBDEV_DUALSPEED
|
2011-09-13 21:04:13 +02:00
|
|
|
if (priv->usbdev->speed == USB_SPEED_HIGH)
|
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
ret = cdcacm_epconfigure(priv->epbulkout, CDCACM_EPBULKOUT, true,
|
2017-07-20 17:34:48 +02:00
|
|
|
&priv->devinfo, true);
|
2011-09-13 21:04:13 +02:00
|
|
|
}
|
|
|
|
else
|
2011-09-13 01:16:16 +02:00
|
|
|
#endif
|
2011-09-13 21:04:13 +02:00
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
ret = cdcacm_epconfigure(priv->epbulkout, CDCACM_EPBULKOUT, true,
|
|
|
|
&priv->devinfo, false);
|
2011-09-13 21:04:13 +02:00
|
|
|
}
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EPBULKOUTCONFIGFAIL), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
goto errout;
|
|
|
|
}
|
|
|
|
|
|
|
|
priv->epbulkout->priv = priv;
|
|
|
|
|
|
|
|
/* Queue read requests in the bulk OUT endpoint */
|
|
|
|
|
|
|
|
DEBUGASSERT(priv->nrdq == 0);
|
2012-01-26 00:04:17 +01:00
|
|
|
for (i = 0; i < CONFIG_CDCACM_NRDREQS; i++)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
|
|
|
req = priv->rdreqs[i].req;
|
2012-01-26 00:04:17 +01:00
|
|
|
req->callback = cdcacm_rdcomplete;
|
2011-09-13 01:16:16 +02:00
|
|
|
ret = EP_SUBMIT(priv->epbulkout, req);
|
|
|
|
if (ret != OK)
|
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_RDSUBMIT),
|
|
|
|
(uint16_t)-ret);
|
2011-09-13 01:16:16 +02:00
|
|
|
goto errout;
|
|
|
|
}
|
2013-01-31 17:52:20 +01:00
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
priv->nrdq++;
|
|
|
|
}
|
|
|
|
|
2013-01-31 17:52:20 +01:00
|
|
|
/* We are successfully configured */
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
priv->config = config;
|
2013-01-31 17:52:20 +01:00
|
|
|
|
|
|
|
/* Inform the "upper half" driver that we are "open for business" */
|
|
|
|
|
|
|
|
#ifdef CONFIG_SERIAL_REMOVABLE
|
|
|
|
uart_connected(&priv->serdev, true);
|
|
|
|
#endif
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
return OK;
|
|
|
|
|
|
|
|
errout:
|
2012-01-26 00:04:17 +01:00
|
|
|
cdcacm_resetconfig(priv);
|
2011-09-13 01:16:16 +02:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_ep0incomplete
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Handle completion of EP0 control operations
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
static void cdcacm_ep0incomplete(FAR struct usbdev_ep_s *ep,
|
2012-01-26 18:42:44 +01:00
|
|
|
FAR struct usbdev_req_s *req)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
|
|
|
if (req->result || req->xfrd != req->len)
|
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_REQRESULT),
|
|
|
|
(uint16_t)-req->result);
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_rdcomplete
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Handle completion of read request on the bulk OUT endpoint. This
|
|
|
|
* is handled like the receipt of serial data on the "UART"
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
static void cdcacm_rdcomplete(FAR struct usbdev_ep_s *ep,
|
2011-09-28 00:04:03 +02:00
|
|
|
FAR struct usbdev_req_s *req)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2017-09-26 16:51:02 +02:00
|
|
|
FAR struct cdcacm_rdreq_s *rdcontainer;
|
2012-01-26 00:04:17 +01:00
|
|
|
FAR struct cdcacm_dev_s *priv;
|
2011-09-13 01:16:16 +02:00
|
|
|
irqstate_t flags;
|
|
|
|
|
|
|
|
/* Sanity check */
|
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2011-09-13 01:16:16 +02:00
|
|
|
if (!ep || !ep->priv || !req)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return;
|
2020-01-10 16:06:36 +01:00
|
|
|
}
|
2011-09-13 01:16:16 +02:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Extract references to private data */
|
|
|
|
|
2015-10-10 18:41:00 +02:00
|
|
|
priv = (FAR struct cdcacm_dev_s *)ep->priv;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
/* Get the container of the read request */
|
|
|
|
|
|
|
|
rdcontainer = (FAR struct cdcacm_rdreq_s *)req->priv;
|
|
|
|
DEBUGASSERT(rdcontainer != NULL);
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
/* Process the received data unless this is some unusual condition */
|
|
|
|
|
2016-02-14 14:32:58 +01:00
|
|
|
flags = enter_critical_section();
|
2011-09-13 01:16:16 +02:00
|
|
|
switch (req->result)
|
|
|
|
{
|
|
|
|
case 0: /* Normal completion */
|
2017-09-26 16:51:02 +02:00
|
|
|
{
|
|
|
|
usbtrace(TRACE_CLASSRDCOMPLETE, priv->nrdq);
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
/* Place the incoming packet at the end of pending RX packet list. */
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
rdcontainer->offset = 0;
|
2019-01-02 14:44:20 +01:00
|
|
|
sq_addlast((FAR sq_entry_t *)rdcontainer, &priv->rxpending);
|
2017-09-26 16:51:02 +02:00
|
|
|
|
|
|
|
/* Then process all pending RX packet starting at the head of the
|
|
|
|
* list
|
|
|
|
*/
|
|
|
|
|
2020-01-02 17:49:34 +01:00
|
|
|
cdcacm_release_rxpending(priv);
|
2017-09-26 16:51:02 +02:00
|
|
|
}
|
2011-09-13 01:16:16 +02:00
|
|
|
break;
|
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
case -ESHUTDOWN: /* Disconnection */
|
|
|
|
{
|
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_RDSHUTDOWN), 0);
|
|
|
|
priv->nrdq--;
|
|
|
|
}
|
|
|
|
break;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
default: /* Some other error occurred */
|
|
|
|
{
|
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_RDUNEXPECTED),
|
|
|
|
(uint16_t)-req->result);
|
|
|
|
cdcacm_requeue_rdrequest(priv, rdcontainer);
|
|
|
|
break;
|
|
|
|
}
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
2013-01-31 20:20:26 +01:00
|
|
|
|
2016-02-14 14:32:58 +01:00
|
|
|
leave_critical_section(flags);
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_wrcomplete
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Handle completion of write request. This function probably executes
|
|
|
|
* in the context of an interrupt handler.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
static void cdcacm_wrcomplete(FAR struct usbdev_ep_s *ep,
|
2011-09-28 00:04:03 +02:00
|
|
|
FAR struct usbdev_req_s *req)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2012-01-26 00:04:17 +01:00
|
|
|
FAR struct cdcacm_dev_s *priv;
|
2017-09-26 16:51:02 +02:00
|
|
|
FAR struct cdcacm_wrreq_s *wrcontainer;
|
2011-09-13 01:16:16 +02:00
|
|
|
irqstate_t flags;
|
|
|
|
|
|
|
|
/* Sanity check */
|
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2011-09-13 01:16:16 +02:00
|
|
|
if (!ep || !ep->priv || !req || !req->priv)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return;
|
2020-01-10 16:06:36 +01:00
|
|
|
}
|
2011-09-13 01:16:16 +02:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Extract references to our private data */
|
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
priv = (FAR struct cdcacm_dev_s *)ep->priv;
|
|
|
|
wrcontainer = (FAR struct cdcacm_wrreq_s *)req->priv;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Return the write request to the free list */
|
|
|
|
|
2016-02-14 14:32:58 +01:00
|
|
|
flags = enter_critical_section();
|
2017-09-26 16:51:02 +02:00
|
|
|
sq_addlast((FAR sq_entry_t *)wrcontainer, &priv->txfree);
|
2011-09-13 01:16:16 +02:00
|
|
|
priv->nwrq++;
|
2016-02-14 14:32:58 +01:00
|
|
|
leave_critical_section(flags);
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Send the next packet unless this was some unusual termination
|
|
|
|
* condition
|
|
|
|
*/
|
|
|
|
|
|
|
|
switch (req->result)
|
|
|
|
{
|
|
|
|
case OK: /* Normal completion */
|
2013-05-28 21:36:01 +02:00
|
|
|
{
|
|
|
|
usbtrace(TRACE_CLASSWRCOMPLETE, priv->nwrq);
|
|
|
|
cdcacm_sndpacket(priv);
|
|
|
|
}
|
2011-09-13 01:16:16 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
case -ESHUTDOWN: /* Disconnection */
|
2013-05-28 21:36:01 +02:00
|
|
|
{
|
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_WRSHUTDOWN), priv->nwrq);
|
|
|
|
}
|
2011-09-13 01:16:16 +02:00
|
|
|
break;
|
|
|
|
|
|
|
|
default: /* Some other error occurred */
|
2013-05-28 21:36:01 +02:00
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_WRUNEXPECTED),
|
|
|
|
(uint16_t)-req->result);
|
2013-05-28 21:36:01 +02:00
|
|
|
}
|
2011-09-13 01:16:16 +02:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* USB Class Driver Methods
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_bind
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Invoked when the driver is bound to a USB device driver
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-01-26 18:42:44 +01:00
|
|
|
static int cdcacm_bind(FAR struct usbdevclass_driver_s *driver,
|
|
|
|
FAR struct usbdev_s *dev)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2020-08-06 19:41:45 +02:00
|
|
|
FAR struct cdcacm_dev_s *priv =
|
|
|
|
((FAR struct cdcacm_driver_s *)driver)->dev;
|
2017-09-26 16:51:02 +02:00
|
|
|
FAR struct cdcacm_wrreq_s *wrcontainer;
|
|
|
|
FAR struct cdcacm_rdreq_s *rdcontainer;
|
2011-09-13 01:16:16 +02:00
|
|
|
irqstate_t flags;
|
|
|
|
uint16_t reqlen;
|
|
|
|
int ret;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
usbtrace(TRACE_CLASSBIND, 0);
|
|
|
|
|
|
|
|
/* Bind the structures */
|
|
|
|
|
|
|
|
priv->usbdev = dev;
|
2012-01-26 18:42:44 +01:00
|
|
|
|
|
|
|
/* Save the reference to our private data structure in EP0 so that it
|
2013-08-11 03:14:05 +02:00
|
|
|
* can be recovered in ep0 completion events (Unless we are part of
|
2012-01-26 18:42:44 +01:00
|
|
|
* a composite device and, in that case, the composite device owns
|
|
|
|
* EP0).
|
|
|
|
*/
|
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
#ifndef CONFIG_CDCACM_COMPOSITE
|
2011-09-13 01:16:16 +02:00
|
|
|
dev->ep0->priv = priv;
|
2012-01-26 18:42:44 +01:00
|
|
|
#endif
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Preallocate control request */
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
priv->ctrlreq = cdcacm_allocreq(dev->ep0, CDCACM_MXDESCLEN);
|
2011-09-13 01:16:16 +02:00
|
|
|
if (priv->ctrlreq == NULL)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_ALLOCCTRLREQ), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
ret = -ENOMEM;
|
|
|
|
goto errout;
|
|
|
|
}
|
2013-01-31 20:20:26 +01:00
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
priv->ctrlreq->callback = cdcacm_ep0incomplete;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Pre-allocate all endpoints... the endpoints will not be functional
|
2012-01-26 00:04:17 +01:00
|
|
|
* until the SET CONFIGURATION request is processed in cdcacm_setconfig.
|
2014-09-01 01:26:36 +02:00
|
|
|
* This is done here because there may be calls to kmm_malloc and the SET
|
2019-10-08 16:01:30 +02:00
|
|
|
* CONFIGURATION processing probably occurs within interrupt handling
|
2014-09-01 01:26:36 +02:00
|
|
|
* logic where kmm_malloc calls will fail.
|
2011-09-13 01:16:16 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
/* Pre-allocate the IN interrupt endpoint */
|
|
|
|
|
2017-07-20 17:34:48 +02:00
|
|
|
priv->epintin = DEV_ALLOCEP(dev, CDCACM_MKEPINTIN(&priv->devinfo),
|
2017-07-16 16:43:17 +02:00
|
|
|
true, USB_EP_ATTR_XFER_INT);
|
2011-09-13 01:16:16 +02:00
|
|
|
if (!priv->epintin)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EPINTINALLOCFAIL), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
ret = -ENODEV;
|
|
|
|
goto errout;
|
|
|
|
}
|
2013-09-02 20:26:15 +02:00
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
priv->epintin->priv = priv;
|
|
|
|
|
|
|
|
/* Pre-allocate the IN bulk endpoint */
|
|
|
|
|
2017-07-20 17:34:48 +02:00
|
|
|
priv->epbulkin = DEV_ALLOCEP(dev, CDCACM_MKEPBULKIN(&priv->devinfo),
|
2017-07-16 16:43:17 +02:00
|
|
|
true, USB_EP_ATTR_XFER_BULK);
|
2011-09-13 01:16:16 +02:00
|
|
|
if (!priv->epbulkin)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EPBULKINALLOCFAIL), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
ret = -ENODEV;
|
|
|
|
goto errout;
|
|
|
|
}
|
2013-09-02 20:26:15 +02:00
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
priv->epbulkin->priv = priv;
|
|
|
|
|
|
|
|
/* Pre-allocate the OUT bulk endpoint */
|
|
|
|
|
2017-07-20 17:34:48 +02:00
|
|
|
priv->epbulkout = DEV_ALLOCEP(dev, CDCACM_MKEPBULKOUT(&priv->devinfo),
|
2017-07-16 16:43:17 +02:00
|
|
|
false, USB_EP_ATTR_XFER_BULK);
|
2011-09-13 01:16:16 +02:00
|
|
|
if (!priv->epbulkout)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EPBULKOUTALLOCFAIL), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
ret = -ENODEV;
|
|
|
|
goto errout;
|
|
|
|
}
|
2013-09-02 20:26:15 +02:00
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
priv->epbulkout->priv = priv;
|
|
|
|
|
2013-09-06 02:00:16 +02:00
|
|
|
/* Pre-allocate read requests. The buffer size is one full packet. */
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2013-09-06 02:00:16 +02:00
|
|
|
#ifdef CONFIG_USBDEV_DUALSPEED
|
|
|
|
reqlen = CONFIG_CDCACM_EPBULKOUT_HSSIZE;
|
|
|
|
#else
|
|
|
|
reqlen = CONFIG_CDCACM_EPBULKOUT_FSSIZE;
|
|
|
|
#endif
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
for (i = 0; i < CONFIG_CDCACM_NRDREQS; i++)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2017-09-26 16:51:02 +02:00
|
|
|
rdcontainer = &priv->rdreqs[i];
|
|
|
|
rdcontainer->req = cdcacm_allocreq(priv->epbulkout, reqlen);
|
|
|
|
if (rdcontainer->req == NULL)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_RDALLOCREQ), -ENOMEM);
|
2011-09-13 01:16:16 +02:00
|
|
|
ret = -ENOMEM;
|
|
|
|
goto errout;
|
|
|
|
}
|
2013-05-28 21:36:01 +02:00
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
rdcontainer->offset = 0;
|
|
|
|
rdcontainer->req->priv = rdcontainer;
|
|
|
|
rdcontainer->req->callback = cdcacm_rdcomplete;
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
|
2017-09-22 23:19:43 +02:00
|
|
|
/* Pre-allocate write request containers and put in a free list. The
|
|
|
|
* buffer size should be larger than a full build IN packet. Otherwise,
|
2013-09-06 02:00:16 +02:00
|
|
|
* we will send a bogus null packet at the end of each packet.
|
|
|
|
*
|
2017-09-22 23:19:43 +02:00
|
|
|
* Pick the larger of the max packet size and the configured request size.
|
|
|
|
*
|
|
|
|
* NOTE: These write requests are sized for the bulk IN endpoint but are
|
|
|
|
* shared with interrupt IN endpoint which does not need a large buffer.
|
2013-09-06 02:00:16 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
#ifdef CONFIG_USBDEV_DUALSPEED
|
|
|
|
reqlen = CONFIG_CDCACM_EPBULKIN_HSSIZE;
|
|
|
|
#else
|
|
|
|
reqlen = CONFIG_CDCACM_EPBULKIN_FSSIZE;
|
|
|
|
#endif
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2013-09-06 02:00:16 +02:00
|
|
|
if (CONFIG_CDCACM_BULKIN_REQLEN > reqlen)
|
|
|
|
{
|
|
|
|
reqlen = CONFIG_CDCACM_BULKIN_REQLEN;
|
|
|
|
}
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
for (i = 0; i < CONFIG_CDCACM_NWRREQS; i++)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2017-09-26 16:51:02 +02:00
|
|
|
wrcontainer = &priv->wrreqs[i];
|
|
|
|
wrcontainer->req = cdcacm_allocreq(priv->epbulkin, reqlen);
|
|
|
|
if (wrcontainer->req == NULL)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_WRALLOCREQ), -ENOMEM);
|
2011-09-13 01:16:16 +02:00
|
|
|
ret = -ENOMEM;
|
|
|
|
goto errout;
|
|
|
|
}
|
2013-05-28 21:36:01 +02:00
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
wrcontainer->req->priv = wrcontainer;
|
|
|
|
wrcontainer->req->callback = cdcacm_wrcomplete;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2016-02-14 14:32:58 +01:00
|
|
|
flags = enter_critical_section();
|
2017-09-26 16:51:02 +02:00
|
|
|
sq_addlast((FAR sq_entry_t *)wrcontainer, &priv->txfree);
|
2011-09-13 01:16:16 +02:00
|
|
|
priv->nwrq++; /* Count of write requests available */
|
2016-02-14 14:32:58 +01:00
|
|
|
leave_critical_section(flags);
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
|
2020-08-06 19:41:45 +02:00
|
|
|
/* Report if we are selfpowered (unless we are part of a
|
|
|
|
* composite device)
|
|
|
|
*/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
#ifndef CONFIG_CDCACM_COMPOSITE
|
2011-09-13 01:16:16 +02:00
|
|
|
#ifdef CONFIG_USBDEV_SELFPOWERED
|
|
|
|
DEV_SETSELFPOWERED(dev);
|
|
|
|
#endif
|
|
|
|
|
2012-01-25 20:27:20 +01:00
|
|
|
/* And pull-up the data line for the soft connect function (unless we are
|
|
|
|
* part of a composite device)
|
|
|
|
*/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
DEV_CONNECT(dev);
|
2012-01-25 20:27:20 +01:00
|
|
|
#endif
|
2011-09-13 01:16:16 +02:00
|
|
|
return OK;
|
|
|
|
|
|
|
|
errout:
|
2012-01-26 18:42:44 +01:00
|
|
|
cdcacm_unbind(driver, dev);
|
2011-09-13 01:16:16 +02:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_unbind
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Invoked when the driver is unbound from a USB device driver
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-01-26 18:42:44 +01:00
|
|
|
static void cdcacm_unbind(FAR struct usbdevclass_driver_s *driver,
|
|
|
|
FAR struct usbdev_s *dev)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2012-01-26 00:04:17 +01:00
|
|
|
FAR struct cdcacm_dev_s *priv;
|
2017-09-26 16:51:02 +02:00
|
|
|
FAR struct cdcacm_wrreq_s *wrcontainer;
|
|
|
|
FAR struct cdcacm_rdreq_s *rdcontainer;
|
2011-09-13 01:16:16 +02:00
|
|
|
irqstate_t flags;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
usbtrace(TRACE_CLASSUNBIND, 0);
|
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2012-01-26 18:42:44 +01:00
|
|
|
if (!driver || !dev)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return;
|
2020-01-10 16:06:36 +01:00
|
|
|
}
|
2011-09-13 01:16:16 +02:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Extract reference to private data */
|
|
|
|
|
2015-10-10 18:41:00 +02:00
|
|
|
priv = ((FAR struct cdcacm_driver_s *)driver)->dev;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2011-09-13 01:16:16 +02:00
|
|
|
if (!priv)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EP0NOTBOUND), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Make sure that we are not already unbound */
|
|
|
|
|
|
|
|
if (priv != NULL)
|
|
|
|
{
|
|
|
|
/* Make sure that the endpoints have been unconfigured. If
|
|
|
|
* we were terminated gracefully, then the configuration should
|
2012-01-26 00:04:17 +01:00
|
|
|
* already have been reset. If not, then calling cdcacm_resetconfig
|
2011-09-13 01:16:16 +02:00
|
|
|
* should cause the endpoints to immediately terminate all
|
|
|
|
* transfers and return the requests to us (with result == -ESHUTDOWN)
|
|
|
|
*/
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
cdcacm_resetconfig(priv);
|
2011-09-13 01:16:16 +02:00
|
|
|
up_mdelay(50);
|
|
|
|
|
|
|
|
/* Free the interrupt IN endpoint */
|
|
|
|
|
|
|
|
if (priv->epintin)
|
|
|
|
{
|
|
|
|
DEV_FREEEP(dev, priv->epintin);
|
|
|
|
priv->epintin = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Free the pre-allocated control request */
|
|
|
|
|
|
|
|
if (priv->ctrlreq != NULL)
|
|
|
|
{
|
2012-01-26 00:04:17 +01:00
|
|
|
cdcacm_freereq(dev->ep0, priv->ctrlreq);
|
2011-09-13 01:16:16 +02:00
|
|
|
priv->ctrlreq = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Free pre-allocated read requests (which should all have
|
|
|
|
* been returned to the free list at this time -- we don't check)
|
|
|
|
*/
|
|
|
|
|
|
|
|
DEBUGASSERT(priv->nrdq == 0);
|
2012-01-26 00:04:17 +01:00
|
|
|
for (i = 0; i < CONFIG_CDCACM_NRDREQS; i++)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2017-09-26 16:51:02 +02:00
|
|
|
rdcontainer = &priv->rdreqs[i];
|
|
|
|
if (rdcontainer->req)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2017-09-26 16:51:02 +02:00
|
|
|
cdcacm_freereq(priv->epbulkout, rdcontainer->req);
|
|
|
|
rdcontainer->req = NULL;
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Free the bulk OUT endpoint */
|
|
|
|
|
|
|
|
if (priv->epbulkout)
|
|
|
|
{
|
|
|
|
DEV_FREEEP(dev, priv->epbulkout);
|
|
|
|
priv->epbulkout = NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Free write requests that are not in use (which should be all
|
2012-04-09 23:08:37 +02:00
|
|
|
* of them)
|
2011-09-13 01:16:16 +02:00
|
|
|
*/
|
|
|
|
|
2016-02-14 14:32:58 +01:00
|
|
|
flags = enter_critical_section();
|
2012-01-26 00:04:17 +01:00
|
|
|
DEBUGASSERT(priv->nwrq == CONFIG_CDCACM_NWRREQS);
|
2017-07-16 16:43:17 +02:00
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
while (!sq_empty(&priv->txfree))
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2017-09-26 16:51:02 +02:00
|
|
|
wrcontainer = (struct cdcacm_wrreq_s *)sq_remfirst(&priv->txfree);
|
|
|
|
if (wrcontainer->req != NULL)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2017-09-26 16:51:02 +02:00
|
|
|
cdcacm_freereq(priv->epbulkin, wrcontainer->req);
|
2011-09-13 01:16:16 +02:00
|
|
|
priv->nwrq--; /* Number of write requests queued */
|
|
|
|
}
|
|
|
|
}
|
2015-01-19 19:57:25 +01:00
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
DEBUGASSERT(priv->nwrq == 0);
|
2016-02-14 14:32:58 +01:00
|
|
|
leave_critical_section(flags);
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2016-07-07 19:02:23 +02:00
|
|
|
/* Free the bulk IN endpoint */
|
|
|
|
|
|
|
|
if (priv->epbulkin)
|
|
|
|
{
|
|
|
|
DEV_FREEEP(dev, priv->epbulkin);
|
|
|
|
priv->epbulkin = NULL;
|
|
|
|
}
|
|
|
|
|
2015-01-19 19:57:25 +01:00
|
|
|
/* Clear out all data in the circular buffer */
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2015-01-19 19:57:25 +01:00
|
|
|
priv->serdev.xmit.head = 0;
|
|
|
|
priv->serdev.xmit.tail = 0;
|
|
|
|
}
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_setup
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Invoked for ep0 control requests. This function probably executes
|
|
|
|
* in the context of an interrupt handler.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-01-26 18:42:44 +01:00
|
|
|
static int cdcacm_setup(FAR struct usbdevclass_driver_s *driver,
|
|
|
|
FAR struct usbdev_s *dev,
|
2012-04-12 18:30:48 +02:00
|
|
|
FAR const struct usb_ctrlreq_s *ctrl,
|
|
|
|
FAR uint8_t *dataout, size_t outlen)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2012-01-26 00:04:17 +01:00
|
|
|
FAR struct cdcacm_dev_s *priv;
|
2011-09-13 01:16:16 +02:00
|
|
|
FAR struct usbdev_req_s *ctrlreq;
|
|
|
|
uint16_t value;
|
|
|
|
uint16_t index;
|
|
|
|
uint16_t len;
|
|
|
|
int ret = -EOPNOTSUPP;
|
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2012-01-26 18:42:44 +01:00
|
|
|
if (!driver || !dev || !ctrl)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
2017-09-22 22:01:00 +02:00
|
|
|
return -EINVAL;
|
2020-01-10 16:06:36 +01:00
|
|
|
}
|
2011-09-13 01:16:16 +02:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Extract reference to private data */
|
|
|
|
|
|
|
|
usbtrace(TRACE_CLASSSETUP, ctrl->req);
|
2015-10-10 18:41:00 +02:00
|
|
|
priv = ((FAR struct cdcacm_driver_s *)driver)->dev;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2011-09-13 01:16:16 +02:00
|
|
|
if (!priv || !priv->ctrlreq)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EP0NOTBOUND), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
#endif
|
2017-07-16 16:43:17 +02:00
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
ctrlreq = priv->ctrlreq;
|
|
|
|
|
|
|
|
/* Extract the little-endian 16-bit values to host order */
|
|
|
|
|
|
|
|
value = GETUINT16(ctrl->value);
|
|
|
|
index = GETUINT16(ctrl->index);
|
|
|
|
len = GETUINT16(ctrl->len);
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
uinfo("type=%02x req=%02x value=%04x index=%04x len=%04x\n",
|
2011-09-13 01:16:16 +02:00
|
|
|
ctrl->type, ctrl->req, value, index, len);
|
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
if ((ctrl->type & USB_REQ_TYPE_MASK) == USB_REQ_TYPE_STANDARD)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
/**********************************************************************
|
2012-01-27 19:33:41 +01:00
|
|
|
* Standard Requests
|
2017-07-16 16:43:17 +02:00
|
|
|
**********************************************************************/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
switch (ctrl->req)
|
|
|
|
{
|
|
|
|
case USB_REQ_GETDESCRIPTOR:
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
/* The value field specifies the descriptor type in the MS byte
|
|
|
|
* and the descriptor index in the LS byte (order is little
|
|
|
|
* endian)
|
2012-01-27 19:33:41 +01:00
|
|
|
*/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
switch (ctrl->value[1])
|
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
/* If the serial device is used in as part of a composite
|
|
|
|
* device, then the device descriptor is provided by logic in
|
|
|
|
* the composite device implementation.
|
2012-01-27 19:33:41 +01:00
|
|
|
*/
|
2012-01-25 20:27:20 +01:00
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
#ifndef CONFIG_CDCACM_COMPOSITE
|
2012-01-27 19:33:41 +01:00
|
|
|
case USB_DESC_TYPE_DEVICE:
|
|
|
|
{
|
|
|
|
ret = USB_SIZEOF_DEVDESC;
|
|
|
|
memcpy(ctrlreq->buf, cdcacm_getdevdesc(), ret);
|
|
|
|
}
|
|
|
|
break;
|
2012-01-25 20:27:20 +01:00
|
|
|
#endif
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
/* If the serial device is used in as part of a composite
|
|
|
|
* device, then the device qualifier descriptor is provided by
|
|
|
|
* logic in the composite device implementation.
|
2012-01-27 19:33:41 +01:00
|
|
|
*/
|
2012-01-25 20:27:20 +01:00
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
#if !defined(CONFIG_CDCACM_COMPOSITE) && defined(CONFIG_USBDEV_DUALSPEED)
|
2012-01-27 19:33:41 +01:00
|
|
|
case USB_DESC_TYPE_DEVICEQUALIFIER:
|
|
|
|
{
|
|
|
|
ret = USB_SIZEOF_QUALDESC;
|
|
|
|
memcpy(ctrlreq->buf, cdcacm_getqualdesc(), ret);
|
|
|
|
}
|
|
|
|
break;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
case USB_DESC_TYPE_OTHERSPEEDCONFIG:
|
2012-01-25 20:27:20 +01:00
|
|
|
#endif
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
/* If the serial device is used in as part of a composite
|
|
|
|
* device, then the configuration descriptor is provided by
|
|
|
|
* logic in the composite device implementation.
|
2012-01-27 19:33:41 +01:00
|
|
|
*/
|
2012-01-25 20:27:20 +01:00
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
#ifndef CONFIG_CDCACM_COMPOSITE
|
2012-01-27 19:33:41 +01:00
|
|
|
case USB_DESC_TYPE_CONFIG:
|
|
|
|
{
|
2011-09-13 01:16:16 +02:00
|
|
|
#ifdef CONFIG_USBDEV_DUALSPEED
|
2017-07-20 17:34:48 +02:00
|
|
|
ret = cdcacm_mkcfgdesc(ctrlreq->buf, &priv->devinfo,
|
2020-01-10 16:06:36 +01:00
|
|
|
dev->speed, ctrl->value[1]);
|
2011-09-13 01:16:16 +02:00
|
|
|
#else
|
2017-07-20 17:34:48 +02:00
|
|
|
ret = cdcacm_mkcfgdesc(ctrlreq->buf, &priv->devinfo);
|
2011-09-13 01:16:16 +02:00
|
|
|
#endif
|
2012-01-27 19:33:41 +01:00
|
|
|
}
|
|
|
|
break;
|
2012-01-25 20:27:20 +01:00
|
|
|
#endif
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
/* If the serial device is used in as part of a composite
|
|
|
|
* device, then the language string descriptor is provided by
|
|
|
|
* logic in the composite device implementation.
|
2012-01-27 19:33:41 +01:00
|
|
|
*/
|
2012-01-25 20:27:20 +01:00
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
#ifndef CONFIG_CDCACM_COMPOSITE
|
2012-01-27 19:33:41 +01:00
|
|
|
case USB_DESC_TYPE_STRING:
|
|
|
|
{
|
|
|
|
/* index == language code. */
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
ret =
|
|
|
|
cdcacm_mkstrdesc(ctrl->value[0],
|
|
|
|
(FAR struct usb_strdesc_s *)
|
|
|
|
ctrlreq->buf);
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
2012-01-27 19:33:41 +01:00
|
|
|
break;
|
|
|
|
#endif
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
default:
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_GETUNKNOWNDESC),
|
|
|
|
value);
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
2012-01-27 19:33:41 +01:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
case USB_REQ_SETCONFIGURATION:
|
|
|
|
{
|
|
|
|
if (ctrl->type == 0)
|
|
|
|
{
|
|
|
|
ret = cdcacm_setconfig(priv, value);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* If the serial device is used in as part of a composite device,
|
|
|
|
* then the overall composite class configuration is managed by logic
|
|
|
|
* in the composite device implementation.
|
|
|
|
*/
|
2012-01-25 20:27:20 +01:00
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
#ifndef CONFIG_CDCACM_COMPOSITE
|
2012-01-27 19:33:41 +01:00
|
|
|
case USB_REQ_GETCONFIGURATION:
|
|
|
|
{
|
|
|
|
if (ctrl->type == USB_DIR_IN)
|
|
|
|
{
|
2015-10-10 18:41:00 +02:00
|
|
|
*(FAR uint8_t *)ctrlreq->buf = priv->config;
|
2012-01-27 19:33:41 +01:00
|
|
|
ret = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
2012-01-25 20:27:20 +01:00
|
|
|
#endif
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
case USB_REQ_SETINTERFACE:
|
|
|
|
{
|
|
|
|
if (ctrl->type == USB_REQ_RECIPIENT_INTERFACE &&
|
|
|
|
priv->config == CDCACM_CONFIGID)
|
|
|
|
{
|
2017-07-20 17:34:48 +02:00
|
|
|
if ((index == priv->devinfo.ifnobase &&
|
2017-07-16 16:43:17 +02:00
|
|
|
value == CDCACM_NOTALTIFID) ||
|
2017-07-20 17:34:48 +02:00
|
|
|
(index == (priv->devinfo.ifnobase + 1) &&
|
2017-07-16 16:43:17 +02:00
|
|
|
value == CDCACM_DATAALTIFID))
|
2012-01-27 19:33:41 +01:00
|
|
|
{
|
|
|
|
cdcacm_resetconfig(priv);
|
|
|
|
cdcacm_setconfig(priv, priv->config);
|
|
|
|
ret = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
case USB_REQ_GETINTERFACE:
|
|
|
|
{
|
2015-10-10 18:41:00 +02:00
|
|
|
if (ctrl->type == (USB_DIR_IN | USB_REQ_RECIPIENT_INTERFACE) &&
|
2012-01-27 19:33:41 +01:00
|
|
|
priv->config == CDCACM_CONFIGIDNONE)
|
|
|
|
{
|
2017-07-20 17:34:48 +02:00
|
|
|
if ((index == priv->devinfo.ifnobase &&
|
2017-07-16 16:43:17 +02:00
|
|
|
value == CDCACM_NOTALTIFID) ||
|
2017-07-20 17:34:48 +02:00
|
|
|
(index == (priv->devinfo.ifnobase + 1) &&
|
2017-07-16 16:43:17 +02:00
|
|
|
value == CDCACM_DATAALTIFID))
|
2012-01-27 19:33:41 +01:00
|
|
|
{
|
2015-10-10 18:41:00 +02:00
|
|
|
*(FAR uint8_t *) ctrlreq->buf = value;
|
2012-01-27 19:33:41 +01:00
|
|
|
ret = 1;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
ret = -EDOM;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
default:
|
2019-01-02 14:44:20 +01:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_UNSUPPORTEDSTDREQ),
|
|
|
|
ctrl->req);
|
2012-01-27 19:33:41 +01:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
else if ((ctrl->type & USB_REQ_TYPE_MASK) == USB_REQ_TYPE_CLASS)
|
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
/**********************************************************************
|
2012-01-27 19:33:41 +01:00
|
|
|
* CDC ACM-Specific Requests
|
2017-07-16 16:43:17 +02:00
|
|
|
**********************************************************************/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
switch (ctrl->req)
|
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
/* ACM_GET_LINE_CODING requests current DTE rate, stop-bits, parity,
|
|
|
|
* and number-of-character bits. (Optional)
|
2012-01-27 19:33:41 +01:00
|
|
|
*/
|
2011-09-13 21:04:13 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
case ACM_GET_LINE_CODING:
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
if (ctrl->type == (USB_DIR_IN | USB_REQ_TYPE_CLASS |
|
|
|
|
USB_REQ_RECIPIENT_INTERFACE) &&
|
2017-07-20 17:34:48 +02:00
|
|
|
index == priv->devinfo.ifnobase)
|
2012-01-27 19:33:41 +01:00
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
/* Return the current line status from the private data
|
|
|
|
* structure.
|
|
|
|
*/
|
2011-09-13 21:04:13 +02:00
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
memcpy(ctrlreq->buf, &priv->linecoding,
|
|
|
|
SIZEOF_CDC_LINECODING);
|
2012-01-27 19:33:41 +01:00
|
|
|
ret = SIZEOF_CDC_LINECODING;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_UNSUPPORTEDCLASSREQ),
|
|
|
|
ctrl->type);
|
2012-01-27 19:33:41 +01:00
|
|
|
}
|
2011-09-13 21:04:13 +02:00
|
|
|
}
|
2012-01-27 19:33:41 +01:00
|
|
|
break;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
/* ACM_SET_LINE_CODING configures DTE rate, stop-bits, parity, and
|
|
|
|
* number-of-character bits. (Optional)
|
|
|
|
*/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
case ACM_SET_LINE_CODING:
|
2011-09-13 21:04:13 +02:00
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
if (ctrl->type == (USB_DIR_OUT | USB_REQ_TYPE_CLASS |
|
|
|
|
USB_REQ_RECIPIENT_INTERFACE) &&
|
2012-04-12 18:30:48 +02:00
|
|
|
len == SIZEOF_CDC_LINECODING && /* dataout && len == outlen && */
|
2017-07-20 17:34:48 +02:00
|
|
|
index == priv->devinfo.ifnobase)
|
2012-01-27 19:33:41 +01:00
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
/* Save the new line coding in the private data structure.
|
|
|
|
* NOTE: that this is conditional now because not all device
|
|
|
|
* controller drivers supported provision of EP0 OUT data
|
|
|
|
* with the setup command.
|
2012-04-12 18:30:48 +02:00
|
|
|
*/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-04-12 18:30:48 +02:00
|
|
|
if (dataout && len <= SIZEOF_CDC_LINECODING) /* REVISIT */
|
|
|
|
{
|
2020-08-06 19:41:45 +02:00
|
|
|
memcpy(&priv->linecoding,
|
|
|
|
dataout, SIZEOF_CDC_LINECODING);
|
2012-04-12 18:30:48 +02:00
|
|
|
}
|
2014-04-06 17:02:02 +02:00
|
|
|
|
2015-05-08 18:58:41 +02:00
|
|
|
/* Respond with a zero length packet */
|
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
ret = 0;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
/* If there is a registered callback to receive line status
|
|
|
|
* info, then callout now.
|
2012-01-27 19:33:41 +01:00
|
|
|
*/
|
2011-09-15 15:26:00 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
if (priv->callback)
|
|
|
|
{
|
|
|
|
priv->callback(CDCACM_EVENT_LINECODING);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
2011-09-15 15:26:00 +02:00
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_UNSUPPORTEDCLASSREQ),
|
|
|
|
ctrl->type);
|
2011-09-15 15:26:00 +02:00
|
|
|
}
|
2011-09-13 21:04:13 +02:00
|
|
|
}
|
2012-01-27 19:33:41 +01:00
|
|
|
break;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
/* ACM_SET_CTRL_LINE_STATE: RS-232 signal used to tell the DCE
|
|
|
|
* device the DTE device is now present. (Optional)
|
2012-01-27 19:33:41 +01:00
|
|
|
*/
|
2011-09-13 21:04:13 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
case ACM_SET_CTRL_LINE_STATE:
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
if (ctrl->type == (USB_DIR_OUT | USB_REQ_TYPE_CLASS |
|
|
|
|
USB_REQ_RECIPIENT_INTERFACE) &&
|
2017-07-20 17:34:48 +02:00
|
|
|
index == priv->devinfo.ifnobase)
|
2012-01-27 19:33:41 +01:00
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
/* Save the control line state in the private data
|
|
|
|
* structure. Only bits 0 and 1 have meaning. Respond with
|
|
|
|
* a zero length packet.
|
2012-01-27 19:33:41 +01:00
|
|
|
*/
|
2011-09-13 21:04:13 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
priv->ctrlline = value & 3;
|
|
|
|
ret = 0;
|
2011-09-13 21:04:13 +02:00
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
/* If there is a registered callback to receive control line
|
2019-01-02 14:44:20 +01:00
|
|
|
* status info, then call out now.
|
2012-01-27 19:33:41 +01:00
|
|
|
*/
|
2011-09-15 15:26:00 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
if (priv->callback)
|
|
|
|
{
|
|
|
|
priv->callback(CDCACM_EVENT_CTRLLINE);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
2011-09-15 15:26:00 +02:00
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_UNSUPPORTEDCLASSREQ),
|
|
|
|
ctrl->type);
|
2011-09-15 15:26:00 +02:00
|
|
|
}
|
2011-09-13 21:04:13 +02:00
|
|
|
}
|
2012-01-27 19:33:41 +01:00
|
|
|
break;
|
2011-09-13 21:04:13 +02:00
|
|
|
|
2015-10-10 18:41:00 +02:00
|
|
|
/* Sends special carrier */
|
2011-09-13 21:04:13 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
case ACM_SEND_BREAK:
|
2011-09-13 21:04:13 +02:00
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
if (ctrl->type == (USB_DIR_OUT | USB_REQ_TYPE_CLASS |
|
|
|
|
USB_REQ_RECIPIENT_INTERFACE) &&
|
2017-07-20 17:34:48 +02:00
|
|
|
index == priv->devinfo.ifnobase)
|
2012-01-27 19:33:41 +01:00
|
|
|
{
|
2017-07-16 16:43:17 +02:00
|
|
|
/* If there is a registered callback to handle the SendBreak
|
2019-01-02 14:44:20 +01:00
|
|
|
* request, then call out now. Respond with a zero length
|
2017-07-16 16:43:17 +02:00
|
|
|
* packet.
|
2012-01-27 19:33:41 +01:00
|
|
|
*/
|
2011-09-15 15:26:00 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
ret = 0;
|
|
|
|
if (priv->callback)
|
|
|
|
{
|
|
|
|
priv->callback(CDCACM_EVENT_SENDBREAK);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
2011-09-15 15:26:00 +02:00
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_UNSUPPORTEDCLASSREQ),
|
|
|
|
ctrl->type);
|
2011-09-15 15:26:00 +02:00
|
|
|
}
|
2011-09-13 21:04:13 +02:00
|
|
|
}
|
2012-01-27 19:33:41 +01:00
|
|
|
break;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-27 19:33:41 +01:00
|
|
|
default:
|
2019-01-02 14:44:20 +01:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_UNSUPPORTEDCLASSREQ),
|
|
|
|
ctrl->req);
|
2012-01-27 19:33:41 +01:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_UNSUPPORTEDTYPE), ctrl->type);
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Respond to the setup command if data was returned. On an error return
|
|
|
|
* value (ret < 0), the USB driver will stall.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (ret >= 0)
|
|
|
|
{
|
2012-01-26 18:42:44 +01:00
|
|
|
/* Configure the response */
|
|
|
|
|
2012-01-25 20:27:20 +01:00
|
|
|
ctrlreq->len = MIN(len, ret);
|
2011-09-13 01:16:16 +02:00
|
|
|
ctrlreq->flags = USBDEV_REQFLAGS_NULLPKT;
|
2012-01-26 18:42:44 +01:00
|
|
|
|
|
|
|
/* Send the response -- either directly to the USB controller or
|
|
|
|
* indirectly in the case where this class is a member of a composite
|
|
|
|
* device.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifndef CONFIG_CDCACM_COMPOSITE
|
|
|
|
ret = EP_SUBMIT(dev->ep0, ctrlreq);
|
|
|
|
#else
|
2023-03-23 17:21:25 +01:00
|
|
|
ret = composite_ep0submit(driver, dev, ctrlreq, ctrl);
|
2012-01-26 18:42:44 +01:00
|
|
|
#endif
|
2011-09-13 01:16:16 +02:00
|
|
|
if (ret < 0)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EPRESPQ), (uint16_t)-ret);
|
2011-09-13 01:16:16 +02:00
|
|
|
ctrlreq->result = OK;
|
2012-01-26 00:04:17 +01:00
|
|
|
cdcacm_ep0incomplete(dev->ep0, ctrlreq);
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
}
|
2014-04-06 17:02:02 +02:00
|
|
|
|
2015-05-08 18:58:41 +02:00
|
|
|
/* Returning a negative value will cause a STALL */
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_disconnect
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Invoked after all transfers have been stopped, when the host is
|
|
|
|
* disconnected. This function is probably called from the context of an
|
|
|
|
* interrupt handler.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-01-26 18:42:44 +01:00
|
|
|
static void cdcacm_disconnect(FAR struct usbdevclass_driver_s *driver,
|
|
|
|
FAR struct usbdev_s *dev)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2012-01-26 00:04:17 +01:00
|
|
|
FAR struct cdcacm_dev_s *priv;
|
2011-09-13 01:16:16 +02:00
|
|
|
irqstate_t flags;
|
|
|
|
|
|
|
|
usbtrace(TRACE_CLASSDISCONNECT, 0);
|
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2012-01-26 18:42:44 +01:00
|
|
|
if (!driver || !dev || !dev->ep0)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return;
|
2020-01-10 16:06:36 +01:00
|
|
|
}
|
2011-09-13 01:16:16 +02:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Extract reference to private data */
|
|
|
|
|
2015-10-10 18:41:00 +02:00
|
|
|
priv = ((FAR struct cdcacm_driver_s *)driver)->dev;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2011-09-13 01:16:16 +02:00
|
|
|
if (!priv)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_EP0NOTBOUND), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2013-01-31 17:52:20 +01:00
|
|
|
/* Inform the "upper half serial driver that we have lost the USB serial
|
|
|
|
* connection.
|
|
|
|
*/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2016-02-14 14:32:58 +01:00
|
|
|
flags = enter_critical_section();
|
2013-01-31 17:52:20 +01:00
|
|
|
#ifdef CONFIG_SERIAL_REMOVABLE
|
|
|
|
uart_connected(&priv->serdev, false);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Reset the configuration */
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
cdcacm_resetconfig(priv);
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2013-01-31 17:52:20 +01:00
|
|
|
/* Clear out all outgoing data in the circular buffer */
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
priv->serdev.xmit.head = 0;
|
|
|
|
priv->serdev.xmit.tail = 0;
|
2016-02-14 14:32:58 +01:00
|
|
|
leave_critical_section(flags);
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Perform the soft connect function so that we will we can be
|
2012-01-25 20:27:20 +01:00
|
|
|
* re-enumerated (unless we are part of a composite device)
|
2011-09-13 01:16:16 +02:00
|
|
|
*/
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
#ifndef CONFIG_CDCACM_COMPOSITE
|
2012-01-25 20:27:20 +01:00
|
|
|
DEV_CONNECT(dev);
|
|
|
|
#endif
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
|
2013-01-31 20:20:26 +01:00
|
|
|
/****************************************************************************
|
|
|
|
* Name: cdcacm_suspend
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Handle the USB suspend event.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_SERIAL_REMOVABLE
|
|
|
|
static void cdcacm_suspend(FAR struct usbdevclass_driver_s *driver,
|
|
|
|
FAR struct usbdev_s *dev)
|
|
|
|
{
|
|
|
|
FAR struct cdcacm_dev_s *priv;
|
|
|
|
|
|
|
|
usbtrace(TRACE_CLASSSUSPEND, 0);
|
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2013-01-31 20:20:26 +01:00
|
|
|
if (!driver || !dev)
|
|
|
|
{
|
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
|
|
|
return;
|
2020-01-10 16:06:36 +01:00
|
|
|
}
|
2013-01-31 20:20:26 +01:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Extract reference to private data */
|
|
|
|
|
2015-10-10 18:41:00 +02:00
|
|
|
priv = ((FAR struct cdcacm_driver_s *)driver)->dev;
|
2013-01-31 20:20:26 +01:00
|
|
|
|
|
|
|
/* And let the "upper half" driver now that we are suspended */
|
|
|
|
|
|
|
|
uart_connected(&priv->serdev, false);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Name: cdcacm_resume
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Handle the USB resume event.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_SERIAL_REMOVABLE
|
|
|
|
static void cdcacm_resume(FAR struct usbdevclass_driver_s *driver,
|
|
|
|
FAR struct usbdev_s *dev)
|
|
|
|
{
|
|
|
|
FAR struct cdcacm_dev_s *priv;
|
|
|
|
|
|
|
|
usbtrace(TRACE_CLASSRESUME, 0);
|
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2013-01-31 20:20:26 +01:00
|
|
|
if (!driver || !dev)
|
|
|
|
{
|
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
|
|
|
return;
|
2020-01-10 16:06:36 +01:00
|
|
|
}
|
2013-01-31 20:20:26 +01:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Extract reference to private data */
|
|
|
|
|
2015-10-10 18:41:00 +02:00
|
|
|
priv = ((FAR struct cdcacm_driver_s *)driver)->dev;
|
2013-01-31 20:20:26 +01:00
|
|
|
|
|
|
|
/* Are we still configured? */
|
|
|
|
|
|
|
|
if (priv->config != CDCACM_CONFIGIDNONE)
|
|
|
|
{
|
|
|
|
/* Yes.. let the "upper half" know that have resumed */
|
|
|
|
|
|
|
|
uart_connected(&priv->serdev, true);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
/****************************************************************************
|
|
|
|
* Serial Device Methods
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
2011-09-28 00:04:03 +02:00
|
|
|
* Name: cdcuart_setup
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* This method is called the first time that the serial port is opened.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2011-09-28 00:04:03 +02:00
|
|
|
static int cdcuart_setup(FAR struct uart_dev_s *dev)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2012-01-26 00:04:17 +01:00
|
|
|
FAR struct cdcacm_dev_s *priv;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
usbtrace(CDCACM_CLASSAPI_SETUP, 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Sanity check */
|
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2011-09-13 01:16:16 +02:00
|
|
|
if (!dev || !dev->priv)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
2017-09-22 22:01:00 +02:00
|
|
|
return -EINVAL;
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Extract reference to private data */
|
|
|
|
|
2015-10-10 18:41:00 +02:00
|
|
|
priv = (FAR struct cdcacm_dev_s *)dev->priv;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Check if we have been configured */
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
if (priv->config == CDCACM_CONFIGIDNONE)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_SETUPNOTCONNECTED), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return -ENOTCONN;
|
|
|
|
}
|
|
|
|
|
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
2011-09-28 00:04:03 +02:00
|
|
|
* Name: cdcuart_shutdown
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* This method is called when the serial port is closed. This operation
|
2019-01-02 14:44:20 +01:00
|
|
|
* is very simple for the USB serial back-end because the serial driver
|
2011-09-13 01:16:16 +02:00
|
|
|
* has already assured that the TX data has full drained -- it calls
|
2011-09-28 00:04:03 +02:00
|
|
|
* cdcuart_txempty() until that function returns true before calling this
|
2011-09-13 01:16:16 +02:00
|
|
|
* function.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2011-09-28 00:04:03 +02:00
|
|
|
static void cdcuart_shutdown(FAR struct uart_dev_s *dev)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2012-01-26 00:04:17 +01:00
|
|
|
usbtrace(CDCACM_CLASSAPI_SHUTDOWN, 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Sanity check */
|
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2011-09-13 01:16:16 +02:00
|
|
|
if (!dev || !dev->priv)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
2011-09-28 00:04:03 +02:00
|
|
|
* Name: cdcuart_attach
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Does not apply to the USB serial class device
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2011-09-28 00:04:03 +02:00
|
|
|
static int cdcuart_attach(FAR struct uart_dev_s *dev)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2012-01-26 00:04:17 +01:00
|
|
|
usbtrace(CDCACM_CLASSAPI_ATTACH, 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
2011-09-28 00:04:03 +02:00
|
|
|
* Name: cdcuart_detach
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
2015-10-10 18:41:00 +02:00
|
|
|
* Does not apply to the USB serial class device
|
|
|
|
*
|
2011-09-13 01:16:16 +02:00
|
|
|
****************************************************************************/
|
|
|
|
|
2011-09-28 00:04:03 +02:00
|
|
|
static void cdcuart_detach(FAR struct uart_dev_s *dev)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2012-01-26 00:04:17 +01:00
|
|
|
usbtrace(CDCACM_CLASSAPI_DETACH, 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
|
2011-09-15 15:26:00 +02:00
|
|
|
/****************************************************************************
|
2011-09-28 00:04:03 +02:00
|
|
|
* Name: cdcuart_ioctl
|
2011-09-15 15:26:00 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* All ioctl calls will be routed through this method
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2015-10-10 18:41:00 +02:00
|
|
|
static int cdcuart_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
|
2011-09-15 15:26:00 +02:00
|
|
|
{
|
2013-08-11 03:14:05 +02:00
|
|
|
struct inode *inode = filep->f_inode;
|
|
|
|
struct cdcacm_dev_s *priv = inode->i_private;
|
|
|
|
FAR uart_dev_t *serdev = &priv->serdev;
|
|
|
|
int ret = OK;
|
2011-09-15 15:26:00 +02:00
|
|
|
|
|
|
|
switch (cmd)
|
|
|
|
{
|
|
|
|
/* CAICO_REGISTERCB
|
|
|
|
* Register a callback for serial event notification. Argument:
|
2012-01-26 00:04:17 +01:00
|
|
|
* cdcacm_callback_t. See cdcacm_callback_t type definition below.
|
2011-09-15 15:26:00 +02:00
|
|
|
* NOTE: The callback will most likely invoked at the interrupt level.
|
|
|
|
* The called back function should, therefore, limit its operations to
|
|
|
|
* invoking some kind of IPC to handle the serial event in some normal
|
|
|
|
* task environment.
|
|
|
|
*/
|
|
|
|
|
|
|
|
case CAIOC_REGISTERCB:
|
|
|
|
{
|
|
|
|
/* Save the new callback function */
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
priv->callback = (cdcacm_callback_t)((uintptr_t)arg);
|
2011-09-15 15:26:00 +02:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* CAIOC_GETLINECODING
|
|
|
|
* Get current line coding. Argument: struct cdc_linecoding_s*.
|
|
|
|
* See include/nuttx/usb/cdc.h for structure definition. This IOCTL
|
|
|
|
* should be called to get the data associated with the
|
2012-01-26 00:04:17 +01:00
|
|
|
* CDCACM_EVENT_LINECODING event).
|
2011-09-15 15:26:00 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
case CAIOC_GETLINECODING:
|
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
FAR struct cdc_linecoding_s *ptr =
|
|
|
|
(FAR struct cdc_linecoding_s *)((uintptr_t)arg);
|
|
|
|
if (ptr != NULL)
|
2011-09-15 15:26:00 +02:00
|
|
|
{
|
|
|
|
memcpy(ptr, &priv->linecoding, sizeof(struct cdc_linecoding_s));
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* CAIOC_GETCTRLLINE
|
|
|
|
* Get control line status bits. Argument FAR int*. See
|
|
|
|
* include/nuttx/usb/cdc.h for bit definitions. This IOCTL should be
|
2012-01-26 00:04:17 +01:00
|
|
|
* called to get the data associated CDCACM_EVENT_CTRLLINE event.
|
2011-09-15 15:26:00 +02:00
|
|
|
*/
|
|
|
|
|
2020-01-10 16:06:36 +01:00
|
|
|
case CAIOC_GETCTRLLINE:
|
2011-09-15 15:26:00 +02:00
|
|
|
{
|
|
|
|
FAR int *ptr = (FAR int *)((uintptr_t)arg);
|
2017-09-22 22:01:00 +02:00
|
|
|
if (ptr != NULL)
|
2011-09-15 15:26:00 +02:00
|
|
|
{
|
|
|
|
*ptr = priv->ctrlline;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
|
|
|
ret = -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2017-09-22 22:01:00 +02:00
|
|
|
#ifdef CONFIG_CDCACM_IFLOWCONTROL
|
2011-09-15 15:26:00 +02:00
|
|
|
/* CAIOC_NOTIFY
|
|
|
|
* Send a serial state to the host via the Interrupt IN endpoint.
|
2017-07-16 16:43:17 +02:00
|
|
|
* Argument: int. This includes the current state of the carrier
|
|
|
|
* detect, DSR, break, and ring signal. See "Table 69: UART State
|
|
|
|
* Bitmap Values" and CDC_UART_definitions in include/nuttx/usb/cdc.h.
|
2011-09-15 15:26:00 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
case CAIOC_NOTIFY:
|
|
|
|
{
|
2017-09-22 22:01:00 +02:00
|
|
|
DEBUGASSERT(arg < UINT8_MAX);
|
2011-09-15 15:26:00 +02:00
|
|
|
|
2017-09-22 22:01:00 +02:00
|
|
|
priv->serialstate = (uint8_t)arg;
|
|
|
|
ret = cdcacm_serialstate(priv);
|
2011-09-15 15:26:00 +02:00
|
|
|
}
|
|
|
|
break;
|
2017-09-22 22:01:00 +02:00
|
|
|
#endif
|
2011-09-15 15:26:00 +02:00
|
|
|
|
2013-08-11 03:14:05 +02:00
|
|
|
#ifdef CONFIG_SERIAL_TERMIOS
|
|
|
|
case TCGETS:
|
|
|
|
{
|
2015-10-10 18:41:00 +02:00
|
|
|
struct termios *termiosp = (FAR struct termios *)arg;
|
2013-08-11 03:14:05 +02:00
|
|
|
|
|
|
|
if (!termiosp)
|
|
|
|
{
|
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* And update with flags from this layer */
|
|
|
|
|
2022-01-27 21:02:05 +01:00
|
|
|
termiosp->c_cflag =
|
|
|
|
((priv->linecoding.parity != CDC_PARITY_NONE) ? PARENB : 0) |
|
|
|
|
((priv->linecoding.parity == CDC_PARITY_ODD) ? PARODD : 0) |
|
|
|
|
((priv->linecoding.stop == CDC_CHFMT_STOP2) ? CSTOPB : 0) |
|
|
|
|
CS8;
|
2017-09-23 19:00:26 +02:00
|
|
|
|
|
|
|
#ifdef CONFIG_CDCACM_OFLOWCONTROL
|
|
|
|
/* Report state of output flow control */
|
2020-01-10 16:06:36 +01:00
|
|
|
|
2017-09-23 19:00:26 +02:00
|
|
|
# warning Missing logic
|
|
|
|
#endif
|
|
|
|
#ifdef CONFIG_CDCACM_IFLOWCONTROL
|
|
|
|
/* Report state of input flow control */
|
|
|
|
|
2017-09-23 20:37:57 +02:00
|
|
|
termiosp->c_cflag |= (priv->iflow) ? CRTS_IFLOW : 0;
|
2017-09-23 19:00:26 +02:00
|
|
|
#endif
|
2023-06-10 20:03:42 +02:00
|
|
|
cfsetispeed(termiosp, (speed_t)priv->linecoding.baud[3] << 24 |
|
|
|
|
(speed_t)priv->linecoding.baud[2] << 16 |
|
|
|
|
(speed_t)priv->linecoding.baud[1] << 8 |
|
|
|
|
(speed_t)priv->linecoding.baud[0]);
|
2013-08-11 03:14:05 +02:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case TCSETS:
|
|
|
|
{
|
2015-10-10 18:41:00 +02:00
|
|
|
struct termios *termiosp = (FAR struct termios *)arg;
|
2017-09-23 19:00:26 +02:00
|
|
|
#ifdef CONFIG_CDCACM_IFLOWCONTROL
|
|
|
|
bool iflow;
|
|
|
|
#endif
|
2013-08-11 03:14:05 +02:00
|
|
|
|
|
|
|
if (!termiosp)
|
|
|
|
{
|
|
|
|
ret = -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Update the flags we keep at this layer */
|
|
|
|
|
2017-09-23 19:00:26 +02:00
|
|
|
#ifdef CONFIG_CDCACM_OFLOWCONTROL
|
|
|
|
/* Handle changes to output flow control */
|
2020-01-10 16:06:36 +01:00
|
|
|
|
2017-09-23 19:00:26 +02:00
|
|
|
# warning Missing logic
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifdef CONFIG_CDCACM_IFLOWCONTROL
|
|
|
|
/* Handle changes to input flow control */
|
|
|
|
|
|
|
|
iflow = ((termiosp->c_cflag & CRTS_IFLOW) != 0);
|
|
|
|
if (iflow != priv->iflow)
|
|
|
|
{
|
2017-09-23 20:57:20 +02:00
|
|
|
/* Check if flow control has been disabled. */
|
2017-09-23 19:00:26 +02:00
|
|
|
|
2017-09-23 20:57:20 +02:00
|
|
|
if (!iflow)
|
2017-09-23 19:00:26 +02:00
|
|
|
{
|
2017-09-23 20:57:20 +02:00
|
|
|
/* Flow control has been disabled. We need to make sure
|
|
|
|
* that DSR is set unconditionally.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if ((priv->serialstate & CDCACM_UART_DSR) == 0)
|
|
|
|
{
|
|
|
|
priv->serialstate |= (CDCACM_UART_DSR | CDCACM_UART_DCD);
|
|
|
|
ret = cdcacm_serialstate(priv);
|
|
|
|
}
|
2017-09-26 16:51:02 +02:00
|
|
|
|
2017-09-27 16:46:49 +02:00
|
|
|
/* Save the new flow control setting. */
|
|
|
|
|
|
|
|
priv->iflow = false;
|
|
|
|
priv->iactive = false;
|
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
/* During the time that flow control was disabled, incoming
|
|
|
|
* packets were queued in priv->rxpending. We must now
|
|
|
|
* process all of them (unless RX interrupts are also
|
|
|
|
* disabled)
|
|
|
|
*/
|
|
|
|
|
2020-01-02 17:49:34 +01:00
|
|
|
cdcacm_release_rxpending(priv);
|
2017-09-23 19:00:26 +02:00
|
|
|
}
|
|
|
|
|
2017-09-27 14:41:32 +02:00
|
|
|
/* Flow control has been enabled. */
|
2017-09-23 19:00:26 +02:00
|
|
|
|
2017-09-27 14:41:32 +02:00
|
|
|
else
|
2017-09-23 19:00:26 +02:00
|
|
|
{
|
2017-09-26 16:51:02 +02:00
|
|
|
/* Save the new flow control setting. */
|
2017-09-23 20:57:20 +02:00
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
priv->iflow = true;
|
2017-09-27 14:41:32 +02:00
|
|
|
priv->iactive = false;
|
|
|
|
|
|
|
|
/* If the RX buffer is already (nearly) full, the we need to
|
|
|
|
* make sure the DSR is clear.
|
|
|
|
*
|
|
|
|
* NOTE: Here we assume that DSR is set so we don't check its
|
|
|
|
* current value nor to we handle the case where we would set
|
|
|
|
* DSR because the RX buffer is (nearly) empty!
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (priv->upper)
|
|
|
|
{
|
|
|
|
priv->serialstate &= ~CDCACM_UART_DSR;
|
|
|
|
priv->serialstate |= CDCACM_UART_DCD;
|
|
|
|
ret = cdcacm_serialstate(priv);
|
|
|
|
|
|
|
|
/* Input flow control is now active */
|
|
|
|
|
|
|
|
priv->iactive = true;
|
|
|
|
}
|
2017-09-23 19:00:26 +02:00
|
|
|
}
|
2017-09-26 16:51:02 +02:00
|
|
|
|
|
|
|
/* RX "interrupts are no longer disabled */
|
|
|
|
|
|
|
|
priv->rxenabled = true;
|
2017-09-23 19:00:26 +02:00
|
|
|
}
|
|
|
|
#endif
|
2013-08-11 03:14:05 +02:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
|
2016-07-25 22:06:32 +02:00
|
|
|
/* Get the number of bytes that may be read from the RX buffer (without
|
|
|
|
* waiting)
|
|
|
|
*/
|
|
|
|
|
2013-08-11 03:21:39 +02:00
|
|
|
case FIONREAD:
|
|
|
|
{
|
|
|
|
int count;
|
2016-02-14 14:32:58 +01:00
|
|
|
irqstate_t flags = enter_critical_section();
|
2013-08-11 03:21:39 +02:00
|
|
|
|
2016-07-25 22:06:32 +02:00
|
|
|
/* Determine the number of bytes available in the RX buffer. */
|
2013-08-11 03:21:39 +02:00
|
|
|
|
|
|
|
if (serdev->recv.tail <= serdev->recv.head)
|
|
|
|
{
|
|
|
|
count = serdev->recv.head - serdev->recv.tail;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
count = serdev->recv.size -
|
|
|
|
(serdev->recv.tail - serdev->recv.head);
|
2013-08-11 03:21:39 +02:00
|
|
|
}
|
|
|
|
|
2016-02-14 14:32:58 +01:00
|
|
|
leave_critical_section(flags);
|
2013-08-11 03:21:39 +02:00
|
|
|
|
|
|
|
*(int *)arg = count;
|
|
|
|
ret = 0;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2016-07-25 22:06:32 +02:00
|
|
|
/* Get the number of bytes that have been written to the TX buffer. */
|
|
|
|
|
2013-08-11 03:21:39 +02:00
|
|
|
case FIONWRITE:
|
|
|
|
{
|
|
|
|
int count;
|
2016-02-14 14:32:58 +01:00
|
|
|
irqstate_t flags = enter_critical_section();
|
2013-08-11 03:21:39 +02:00
|
|
|
|
2016-07-25 22:06:32 +02:00
|
|
|
/* Determine the number of bytes waiting in the TX buffer. */
|
|
|
|
|
|
|
|
if (serdev->xmit.tail <= serdev->xmit.head)
|
|
|
|
{
|
|
|
|
count = serdev->xmit.head - serdev->xmit.tail;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
count = serdev->xmit.size -
|
|
|
|
(serdev->xmit.tail - serdev->xmit.head);
|
2016-07-25 22:06:32 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
leave_critical_section(flags);
|
|
|
|
|
|
|
|
*(int *)arg = count;
|
|
|
|
ret = 0;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
/* Get the number of free bytes in the TX buffer */
|
|
|
|
|
|
|
|
case FIONSPACE:
|
|
|
|
{
|
|
|
|
int count;
|
|
|
|
irqstate_t flags = enter_critical_section();
|
|
|
|
|
|
|
|
/* Determine the number of bytes free in the TX buffer */
|
2013-08-11 03:21:39 +02:00
|
|
|
|
|
|
|
if (serdev->xmit.head < serdev->xmit.tail)
|
|
|
|
{
|
|
|
|
count = serdev->xmit.tail - serdev->xmit.head - 1;
|
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
count = serdev->xmit.size -
|
|
|
|
(serdev->xmit.head - serdev->xmit.tail) - 1;
|
2013-08-11 03:21:39 +02:00
|
|
|
}
|
|
|
|
|
2016-02-14 14:32:58 +01:00
|
|
|
leave_critical_section(flags);
|
2013-08-11 03:21:39 +02:00
|
|
|
|
2019-01-02 14:44:20 +01:00
|
|
|
*(FAR int *)arg = count;
|
2013-08-11 03:21:39 +02:00
|
|
|
ret = 0;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
2011-09-15 15:26:00 +02:00
|
|
|
default:
|
|
|
|
ret = -ENOTTY;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
/****************************************************************************
|
2011-09-28 00:04:03 +02:00
|
|
|
* Name: cdcuart_rxint
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Called by the serial driver to enable or disable RX interrupts. We, of
|
|
|
|
* course, have no RX interrupts but must behave consistently. This method
|
|
|
|
* is called under the conditions:
|
|
|
|
*
|
2011-09-28 00:04:03 +02:00
|
|
|
* 1. With enable==true when the port is opened (just after cdcuart_setup
|
|
|
|
* and cdcuart_attach are called called)
|
2011-09-13 01:16:16 +02:00
|
|
|
* 2. With enable==false while transferring data from the RX buffer
|
|
|
|
* 2. With enable==true while waiting for more incoming data
|
2020-08-06 19:41:45 +02:00
|
|
|
* 3. With enable==false when the port is closed (just before
|
|
|
|
* cdcuart_detach and cdcuart_shutdown are called).
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
2017-09-26 16:51:02 +02:00
|
|
|
* Assumptions:
|
|
|
|
* Called from the serial upper-half driver running on the thread of
|
|
|
|
* execution of the caller of the driver or, possibly, on from the
|
|
|
|
* USB interrupt handler (at least for the case where the RX interrupt
|
|
|
|
* is disabled)
|
|
|
|
*
|
2011-09-13 01:16:16 +02:00
|
|
|
****************************************************************************/
|
|
|
|
|
2011-09-28 00:04:03 +02:00
|
|
|
static void cdcuart_rxint(FAR struct uart_dev_s *dev, bool enable)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2012-01-26 00:04:17 +01:00
|
|
|
FAR struct cdcacm_dev_s *priv;
|
2011-09-13 01:16:16 +02:00
|
|
|
irqstate_t flags;
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
usbtrace(CDCACM_CLASSAPI_RXINT, (uint16_t)enable);
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Sanity check */
|
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2011-09-13 01:16:16 +02:00
|
|
|
if (!dev || !dev->priv)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* Extract reference to private data */
|
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
priv = (FAR struct cdcacm_dev_s *)dev->priv;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* We need exclusive access to the RX buffer and private structure
|
|
|
|
* in the following.
|
|
|
|
*/
|
|
|
|
|
2016-02-14 14:32:58 +01:00
|
|
|
flags = enter_critical_section();
|
2011-09-13 01:16:16 +02:00
|
|
|
if (enable)
|
|
|
|
{
|
2015-10-10 18:41:00 +02:00
|
|
|
/* RX "interrupts" are enabled. Is this a transition from disabled
|
|
|
|
* to enabled state?
|
|
|
|
*/
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2015-10-10 18:41:00 +02:00
|
|
|
if (!priv->rxenabled)
|
|
|
|
{
|
2017-09-27 16:46:49 +02:00
|
|
|
/* Yes.. RX "interrupts are no longer disabled */
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
priv->rxenabled = true;
|
2019-01-02 14:44:20 +01:00
|
|
|
}
|
2017-09-27 14:03:22 +02:00
|
|
|
|
2019-01-02 14:44:20 +01:00
|
|
|
/* During the time that RX interrupts was disabled, incoming
|
|
|
|
* packets were queued in priv->rxpending. We must now process
|
|
|
|
* all of them (unless flow control is enabled)
|
|
|
|
*
|
|
|
|
* NOTE: This action may cause this function to be re-entered
|
|
|
|
* with enable == false , anyway the pend-list should be flushed
|
|
|
|
*/
|
2017-09-27 14:03:22 +02:00
|
|
|
|
2020-01-02 17:49:34 +01:00
|
|
|
cdcacm_release_rxpending(priv);
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
|
2017-09-27 16:46:49 +02:00
|
|
|
/* RX "interrupts" are disabled. Nothing special needs to be done on a
|
|
|
|
* transition from the enabled to the disabled state.
|
2011-09-13 01:16:16 +02:00
|
|
|
*/
|
|
|
|
|
2017-09-26 16:51:02 +02:00
|
|
|
else
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
|
|
|
priv->rxenabled = false;
|
|
|
|
}
|
2017-07-16 16:43:17 +02:00
|
|
|
|
2016-02-14 14:32:58 +01:00
|
|
|
leave_critical_section(flags);
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
|
2015-04-16 16:22:07 +02:00
|
|
|
/****************************************************************************
|
|
|
|
* Name: cdcuart_rxflowcontrol
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Called when Rx buffer is full (or exceeds configured watermark levels
|
|
|
|
* if CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS is defined).
|
|
|
|
* Return true if UART activated RX flow control to block more incoming
|
|
|
|
* data
|
|
|
|
*
|
2018-02-01 17:00:02 +01:00
|
|
|
* Input Parameters:
|
2015-04-16 16:22:07 +02:00
|
|
|
* dev - UART device instance
|
|
|
|
* nbuffered - the number of characters currently buffered
|
|
|
|
* (if CONFIG_SERIAL_IFLOWCONTROL_WATERMARKS is
|
|
|
|
* not defined the value will be 0 for an empty buffer or the
|
|
|
|
* defined buffer size for a full buffer)
|
|
|
|
* upper - true indicates the upper watermark was crossed where
|
|
|
|
* false indicates the lower watermark has been crossed
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* true if RX flow control activated.
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_SERIAL_IFLOWCONTROL
|
|
|
|
static bool cdcuart_rxflowcontrol(FAR struct uart_dev_s *dev,
|
|
|
|
unsigned int nbuffered, bool upper)
|
|
|
|
{
|
2015-04-16 20:24:56 +02:00
|
|
|
#ifdef CONFIG_CDCACM_IFLOWCONTROL
|
2017-09-22 22:01:00 +02:00
|
|
|
FAR struct cdcacm_dev_s *priv;
|
|
|
|
|
|
|
|
/* Sanity check */
|
|
|
|
|
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
|
|
|
if (dev == NULL || dev->priv == NULL)
|
|
|
|
{
|
2020-01-10 16:06:36 +01:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
|
|
|
return false;
|
2017-09-22 22:01:00 +02:00
|
|
|
}
|
2015-04-16 20:24:56 +02:00
|
|
|
#endif
|
|
|
|
|
2017-09-22 22:01:00 +02:00
|
|
|
/* Extract reference to private data */
|
|
|
|
|
|
|
|
priv = (FAR struct cdcacm_dev_s *)dev->priv;
|
|
|
|
|
2017-09-23 19:00:26 +02:00
|
|
|
/* Is input flow control enabled? */
|
2017-09-22 22:01:00 +02:00
|
|
|
|
2017-09-23 19:00:26 +02:00
|
|
|
priv->upper = upper;
|
|
|
|
if (priv->iflow)
|
2017-09-22 22:01:00 +02:00
|
|
|
{
|
2017-09-23 19:00:26 +02:00
|
|
|
/* Yes.. Set DSR (TX carrier) if the lower water mark has been crossed
|
|
|
|
* or clear it if the upper water mark has been crossed.
|
|
|
|
*/
|
|
|
|
|
2017-09-27 14:03:22 +02:00
|
|
|
if (upper)
|
|
|
|
{
|
|
|
|
/* Don't do anything unless this results in a change in the
|
|
|
|
* setting of DSR.
|
|
|
|
*/
|
|
|
|
|
|
|
|
if ((priv->serialstate & CDCACM_UART_DSR) != 0)
|
|
|
|
{
|
|
|
|
/* Clear DSR (set DCD in any case). */
|
2017-09-23 19:00:26 +02:00
|
|
|
|
2017-09-27 14:03:22 +02:00
|
|
|
priv->serialstate &= ~CDCACM_UART_DSR;
|
|
|
|
priv->serialstate |= CDCACM_UART_DCD;
|
|
|
|
|
2017-09-27 14:41:32 +02:00
|
|
|
/* And send the SerialState message.
|
|
|
|
* REVISIT: Error return case. Would an error mean DSR is not
|
|
|
|
* set?
|
|
|
|
*/
|
2017-09-27 14:03:22 +02:00
|
|
|
|
2020-01-02 17:49:34 +01:00
|
|
|
cdcacm_serialstate(priv);
|
2017-09-27 14:03:22 +02:00
|
|
|
}
|
2017-09-27 14:41:32 +02:00
|
|
|
|
|
|
|
/* Flow control is active */
|
|
|
|
|
|
|
|
priv->iactive = true;
|
2017-09-27 14:03:22 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Lower watermark crossing. Don't do anything unless this results in
|
|
|
|
* a change in the setting of DSR.
|
2017-09-23 19:00:26 +02:00
|
|
|
*/
|
|
|
|
|
2017-09-27 16:46:49 +02:00
|
|
|
else
|
2017-09-23 19:00:26 +02:00
|
|
|
{
|
2017-09-27 16:46:49 +02:00
|
|
|
/* Flow control is not active (Needed before calling
|
|
|
|
* cdcacm_release_rxpending())
|
|
|
|
*/
|
2017-09-23 19:00:26 +02:00
|
|
|
|
2017-09-27 16:46:49 +02:00
|
|
|
priv->iactive = false;
|
2017-09-23 19:00:26 +02:00
|
|
|
|
2020-02-23 09:50:23 +01:00
|
|
|
/* Set DSR if it is not already set */
|
2017-09-23 19:00:26 +02:00
|
|
|
|
2017-09-27 16:46:49 +02:00
|
|
|
if ((priv->serialstate & CDCACM_UART_DSR) == 0)
|
2017-09-27 14:03:22 +02:00
|
|
|
{
|
2017-09-27 16:46:49 +02:00
|
|
|
priv->serialstate |= (CDCACM_UART_DSR | CDCACM_UART_DCD);
|
2017-09-23 19:00:26 +02:00
|
|
|
|
2017-09-27 16:46:49 +02:00
|
|
|
/* And send the SerialState message.
|
|
|
|
* REVISIT: Error return case. Would an error mean DSR is
|
|
|
|
* still clear?
|
2017-09-27 14:03:22 +02:00
|
|
|
*/
|
|
|
|
|
2020-01-02 17:49:34 +01:00
|
|
|
cdcacm_serialstate(priv);
|
2017-09-27 14:03:22 +02:00
|
|
|
}
|
2017-09-27 16:46:49 +02:00
|
|
|
|
|
|
|
/* During the time that flow control ws disabled, incoming packets
|
|
|
|
* were queued in priv->rxpending. We must now process all of
|
|
|
|
* them (unless RX interrupts becomes enabled)
|
|
|
|
*
|
|
|
|
* NOTE: This action may cause this function to be re-entered with
|
|
|
|
* upper == false.
|
|
|
|
*/
|
|
|
|
|
2020-01-02 17:49:34 +01:00
|
|
|
cdcacm_release_rxpending(priv);
|
2017-09-27 14:03:22 +02:00
|
|
|
}
|
2017-09-22 22:01:00 +02:00
|
|
|
}
|
|
|
|
else
|
|
|
|
{
|
2017-09-23 19:00:26 +02:00
|
|
|
/* Flow control is disabled ... DSR must be set */
|
2017-09-22 22:01:00 +02:00
|
|
|
|
2017-09-23 19:00:26 +02:00
|
|
|
if ((priv->serialstate & CDCACM_UART_DSR) == 0)
|
|
|
|
{
|
2017-09-27 14:41:32 +02:00
|
|
|
/* Set DSR and DCD */
|
|
|
|
|
|
|
|
priv->serialstate |= (CDCACM_UART_DSR | CDCACM_UART_DCD);
|
|
|
|
|
|
|
|
/* And send the SerialState message
|
|
|
|
* REVISIT: Error return case. Would an error mean DSR is still
|
|
|
|
* not set?
|
|
|
|
*/
|
2017-09-22 22:01:00 +02:00
|
|
|
|
2020-01-02 17:49:34 +01:00
|
|
|
cdcacm_serialstate(priv);
|
2017-09-22 22:01:00 +02:00
|
|
|
|
2017-09-27 14:41:32 +02:00
|
|
|
/* Flow control is not active */
|
2017-09-22 22:01:00 +02:00
|
|
|
|
2017-09-27 14:41:32 +02:00
|
|
|
priv->iactive = false;
|
2017-09-23 19:00:26 +02:00
|
|
|
}
|
|
|
|
}
|
2017-09-27 14:03:22 +02:00
|
|
|
|
2017-09-27 14:41:32 +02:00
|
|
|
/* Return true flow control is active */
|
2017-09-27 14:03:22 +02:00
|
|
|
|
2017-09-27 14:41:32 +02:00
|
|
|
return priv->iactive;
|
2017-09-22 22:01:00 +02:00
|
|
|
#else
|
|
|
|
|
2015-04-16 16:22:07 +02:00
|
|
|
return false;
|
2017-09-22 22:01:00 +02:00
|
|
|
#endif
|
2015-04-16 16:22:07 +02:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
/****************************************************************************
|
2011-09-28 00:04:03 +02:00
|
|
|
* Name: cdcuart_txint
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Called by the serial driver to enable or disable TX interrupts. We, of
|
|
|
|
* course, have no TX interrupts but must behave consistently. Initially,
|
|
|
|
* TX interrupts are disabled. This method is called under the conditions:
|
|
|
|
*
|
|
|
|
* 1. With enable==false while transferring data into the TX buffer
|
|
|
|
* 2. With enable==true when data may be taken from the buffer.
|
|
|
|
* 3. With enable==false when the TX buffer is empty
|
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2011-09-28 00:04:03 +02:00
|
|
|
static void cdcuart_txint(FAR struct uart_dev_s *dev, bool enable)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2012-01-26 00:04:17 +01:00
|
|
|
FAR struct cdcacm_dev_s *priv;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
usbtrace(CDCACM_CLASSAPI_TXINT, (uint16_t)enable);
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Sanity checks */
|
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2011-09-13 01:16:16 +02:00
|
|
|
if (!dev || !dev->priv)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2015-10-04 23:04:00 +02:00
|
|
|
/* Extract references to private data */
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2015-10-10 18:41:00 +02:00
|
|
|
priv = (FAR struct cdcacm_dev_s *)dev->priv;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* If the new state is enabled and if there is data in the XMIT buffer,
|
|
|
|
* send the next packet now.
|
|
|
|
*/
|
|
|
|
|
2016-06-11 19:59:51 +02:00
|
|
|
uinfo("enable=%d head=%d tail=%d\n",
|
2011-09-13 01:16:16 +02:00
|
|
|
enable, priv->serdev.xmit.head, priv->serdev.xmit.tail);
|
|
|
|
|
|
|
|
if (enable && priv->serdev.xmit.head != priv->serdev.xmit.tail)
|
|
|
|
{
|
2012-01-26 00:04:17 +01:00
|
|
|
cdcacm_sndpacket(priv);
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
2011-09-28 00:04:03 +02:00
|
|
|
* Name: cdcuart_txempty
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Return true when all data has been sent. This is called from the
|
|
|
|
* serial driver when the driver is closed. It will call this API
|
2014-04-05 19:35:05 +02:00
|
|
|
* periodically until it reports true. NOTE that the serial driver takes
|
|
|
|
* all responsibility for flushing TX data through the hardware so we can
|
|
|
|
* be a bit sloppy about that.
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2011-09-28 00:04:03 +02:00
|
|
|
static bool cdcuart_txempty(FAR struct uart_dev_s *dev)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2015-10-10 18:41:00 +02:00
|
|
|
FAR struct cdcacm_dev_s *priv = (FAR struct cdcacm_dev_s *)dev->priv;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
usbtrace(CDCACM_CLASSAPI_TXEMPTY, 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2016-06-11 22:14:08 +02:00
|
|
|
#ifdef CONFIG_DEBUG_FEATURES
|
2011-09-13 01:16:16 +02:00
|
|
|
if (!priv)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_INVALIDARG), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/* When all of the allocated write requests have been returned to the
|
2017-09-26 16:51:02 +02:00
|
|
|
* txfree, then there is no longer any TX data in flight.
|
2011-09-13 01:16:16 +02:00
|
|
|
*/
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
return priv->nwrq >= CONFIG_CDCACM_NWRREQS;
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
/****************************************************************************
|
|
|
|
* Public Functions
|
|
|
|
****************************************************************************/
|
|
|
|
|
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_classobject
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
|
|
|
* Description:
|
2012-01-25 20:27:20 +01:00
|
|
|
* Register USB serial port (and USB serial console if so configured) and
|
|
|
|
* return the class object.
|
2011-09-13 01:16:16 +02:00
|
|
|
*
|
2018-02-01 17:00:02 +01:00
|
|
|
* Input Parameters:
|
2012-01-25 20:27:20 +01:00
|
|
|
* minor - Device minor number. E.g., minor 0 would correspond to
|
2012-02-28 19:14:55 +01:00
|
|
|
* /dev/ttyACM0.
|
2012-01-25 20:27:20 +01:00
|
|
|
* classdev - The location to return the CDC serial class' device
|
|
|
|
* instance.
|
2011-09-15 15:26:00 +02:00
|
|
|
*
|
|
|
|
* Returned Value:
|
2012-01-25 20:27:20 +01:00
|
|
|
* A pointer to the allocated class object (NULL on failure).
|
2011-09-15 15:26:00 +02:00
|
|
|
*
|
2011-09-13 01:16:16 +02:00
|
|
|
****************************************************************************/
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
#ifndef CONFIG_CDCACM_COMPOSITE
|
2012-01-25 20:27:20 +01:00
|
|
|
static
|
|
|
|
#endif
|
2017-07-20 17:34:48 +02:00
|
|
|
int cdcacm_classobject(int minor, FAR struct usbdev_devinfo_s *devinfo,
|
2017-07-16 16:43:17 +02:00
|
|
|
FAR struct usbdevclass_driver_s **classdev)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2012-01-26 00:04:17 +01:00
|
|
|
FAR struct cdcacm_alloc_s *alloc;
|
|
|
|
FAR struct cdcacm_dev_s *priv;
|
|
|
|
FAR struct cdcacm_driver_s *drvr;
|
2012-02-28 19:14:55 +01:00
|
|
|
char devname[CDCACM_DEVNAME_SIZE];
|
2011-09-13 01:16:16 +02:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
/* Allocate the structures needed */
|
|
|
|
|
2017-07-16 16:43:17 +02:00
|
|
|
alloc = (FAR struct cdcacm_alloc_s *)
|
|
|
|
kmm_malloc(sizeof(struct cdcacm_alloc_s));
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
if (!alloc)
|
|
|
|
{
|
2011-09-13 21:04:13 +02:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_ALLOCDEVSTRUCT), 0);
|
2011-09-13 01:16:16 +02:00
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Convenience pointers into the allocated blob */
|
|
|
|
|
|
|
|
priv = &alloc->dev;
|
|
|
|
drvr = &alloc->drvr;
|
|
|
|
|
|
|
|
/* Initialize the USB serial driver structure */
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
memset(priv, 0, sizeof(struct cdcacm_dev_s));
|
2017-09-26 16:51:02 +02:00
|
|
|
sq_init(&priv->txfree);
|
|
|
|
sq_init(&priv->rxpending);
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2017-09-22 22:01:00 +02:00
|
|
|
priv->minor = minor;
|
2017-07-19 15:05:23 +02:00
|
|
|
|
|
|
|
/* Save the caller provided device description (composite only) */
|
|
|
|
|
2017-07-20 17:34:48 +02:00
|
|
|
memcpy(&priv->devinfo, devinfo,
|
|
|
|
sizeof(struct usbdev_devinfo_s));
|
2012-02-28 19:14:55 +01:00
|
|
|
|
2017-09-22 22:01:00 +02:00
|
|
|
#ifdef CONFIG_CDCACM_IFLOWCONTROL
|
|
|
|
/* SerialState */
|
|
|
|
|
|
|
|
priv->serialstate = (CDCACM_UART_DCD | CDCACM_UART_DSR);
|
|
|
|
#endif
|
|
|
|
|
2011-09-13 01:16:16 +02:00
|
|
|
/* Fake line status */
|
|
|
|
|
2017-09-22 22:01:00 +02:00
|
|
|
priv->linecoding.baud[0] = (115200) & 0xff; /* Baud=115200 */
|
|
|
|
priv->linecoding.baud[1] = (115200 >> 8) & 0xff;
|
|
|
|
priv->linecoding.baud[2] = (115200 >> 16) & 0xff;
|
|
|
|
priv->linecoding.baud[3] = (115200 >> 24) & 0xff;
|
|
|
|
priv->linecoding.stop = CDC_CHFMT_STOP1; /* One stop bit */
|
|
|
|
priv->linecoding.parity = CDC_PARITY_NONE; /* No parity */
|
|
|
|
priv->linecoding.nbits = 8; /* 8 data bits */
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Initialize the serial driver sub-structure */
|
|
|
|
|
2014-04-05 19:53:20 +02:00
|
|
|
/* The initial state is disconnected */
|
2013-01-31 17:52:20 +01:00
|
|
|
|
|
|
|
#ifdef CONFIG_SERIAL_REMOVABLE
|
|
|
|
priv->serdev.disconnected = true;
|
|
|
|
#endif
|
|
|
|
priv->serdev.recv.size = CONFIG_CDCACM_RXBUFSIZE;
|
|
|
|
priv->serdev.recv.buffer = priv->rxbuffer;
|
|
|
|
priv->serdev.xmit.size = CONFIG_CDCACM_TXBUFSIZE;
|
|
|
|
priv->serdev.xmit.buffer = priv->txbuffer;
|
|
|
|
priv->serdev.ops = &g_uartops;
|
|
|
|
priv->serdev.priv = priv;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Initialize the USB class driver structure */
|
|
|
|
|
|
|
|
#ifdef CONFIG_USBDEV_DUALSPEED
|
2017-07-16 16:43:17 +02:00
|
|
|
drvr->drvr.speed = USB_SPEED_HIGH;
|
2011-09-13 01:16:16 +02:00
|
|
|
#else
|
2017-07-16 16:43:17 +02:00
|
|
|
drvr->drvr.speed = USB_SPEED_FULL;
|
2011-09-13 01:16:16 +02:00
|
|
|
#endif
|
2017-07-16 16:43:17 +02:00
|
|
|
drvr->drvr.ops = &g_driverops;
|
|
|
|
drvr->dev = priv;
|
2011-09-13 01:16:16 +02:00
|
|
|
|
|
|
|
/* Register the USB serial console */
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
#ifdef CONFIG_CDCACM_CONSOLE
|
2023-06-14 15:57:26 +02:00
|
|
|
if (minor == 0)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2023-06-14 15:57:26 +02:00
|
|
|
priv->serdev.isconsole = true;
|
|
|
|
|
|
|
|
ret = uart_register("/dev/console", &priv->serdev);
|
|
|
|
if (ret < 0)
|
|
|
|
{
|
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_CONSOLEREGISTER),
|
|
|
|
(uint16_t)-ret);
|
|
|
|
goto errout_with_class;
|
|
|
|
}
|
2011-09-13 01:16:16 +02:00
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2012-02-28 19:14:55 +01:00
|
|
|
/* Register the CDC/ACM TTY device */
|
2011-09-13 01:16:16 +02:00
|
|
|
|
2020-01-10 16:06:36 +01:00
|
|
|
snprintf(devname, CDCACM_DEVNAME_SIZE, CDCACM_DEVNAME_FORMAT, minor);
|
2011-09-13 01:16:16 +02:00
|
|
|
ret = uart_register(devname, &priv->serdev);
|
2012-02-28 19:14:55 +01:00
|
|
|
if (ret < 0)
|
2011-09-13 01:16:16 +02:00
|
|
|
{
|
2019-01-02 14:44:20 +01:00
|
|
|
usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_UARTREGISTER),
|
|
|
|
(uint16_t)-ret);
|
2011-09-13 01:16:16 +02:00
|
|
|
goto errout_with_class;
|
|
|
|
}
|
2012-01-25 20:27:20 +01:00
|
|
|
|
|
|
|
*classdev = &drvr->drvr;
|
2011-09-13 01:16:16 +02:00
|
|
|
return OK;
|
|
|
|
|
|
|
|
errout_with_class:
|
2014-09-01 01:04:02 +02:00
|
|
|
kmm_free(alloc);
|
2011-09-13 01:16:16 +02:00
|
|
|
return ret;
|
|
|
|
}
|
2012-01-25 20:27:20 +01:00
|
|
|
|
|
|
|
/****************************************************************************
|
2012-01-26 00:04:17 +01:00
|
|
|
* Name: cdcacm_initialize
|
2012-01-25 20:27:20 +01:00
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Register USB serial port (and USB serial console if so configured).
|
|
|
|
*
|
2018-02-01 17:00:02 +01:00
|
|
|
* Input Parameters:
|
2012-02-28 19:14:55 +01:00
|
|
|
* minor - Device minor number. E.g., minor 0 would correspond to
|
|
|
|
* /dev/ttyACM0.
|
|
|
|
* handle - An optional opaque reference to the CDC/ACM class object that
|
|
|
|
* may subsequently be used with cdcacm_uninitialize().
|
2012-01-25 20:27:20 +01:00
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) means that the driver was successfully registered. On any
|
2014-04-05 19:35:05 +02:00
|
|
|
* failure, a negated errno value is returned.
|
2012-01-25 20:27:20 +01:00
|
|
|
*
|
|
|
|
****************************************************************************/
|
|
|
|
|
2012-01-26 00:04:17 +01:00
|
|
|
#ifndef CONFIG_CDCACM_COMPOSITE
|
2012-02-28 19:14:55 +01:00
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int cdcacm_initialize(int minor, FAR void **handle)
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2012-01-25 20:27:20 +01:00
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{
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2012-02-28 19:14:55 +01:00
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FAR struct usbdevclass_driver_s *drvr = NULL;
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2017-07-20 17:34:48 +02:00
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struct usbdev_devinfo_s devinfo;
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2012-01-25 20:27:20 +01:00
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int ret;
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2017-07-20 17:34:48 +02:00
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memset(&devinfo, 0, sizeof(struct usbdev_devinfo_s));
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2017-07-16 16:43:17 +02:00
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/* Interfaces.
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*
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* ifnobase must be provided by board-specific logic
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*/
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2017-07-20 17:34:48 +02:00
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devinfo.ninterfaces = CDCACM_NINTERFACES; /* Number of interfaces in the configuration */
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2017-07-16 16:43:17 +02:00
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/* Strings.
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*
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* strbase must be provided by board-specific logic
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*/
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2017-07-20 17:34:48 +02:00
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devinfo.nstrings = CDCACM_NSTRIDS; /* Number of Strings */
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2017-07-16 16:43:17 +02:00
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/* Endpoints.
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*
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2017-07-19 15:05:23 +02:00
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* Endpoint numbers must be provided by board-specific logic when
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* CDC/ACM is used in a composite device.
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2017-07-16 16:43:17 +02:00
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*/
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2017-07-20 17:34:48 +02:00
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devinfo.nendpoints = CDCACM_NUM_EPS;
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devinfo.epno[CDCACM_EP_INTIN_IDX] = CONFIG_CDCACM_EPINTIN;
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devinfo.epno[CDCACM_EP_BULKIN_IDX] = CONFIG_CDCACM_EPBULKIN;
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devinfo.epno[CDCACM_EP_BULKOUT_IDX] = CONFIG_CDCACM_EPBULKOUT;
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2017-07-16 16:43:17 +02:00
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2012-01-25 20:27:20 +01:00
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/* Get an instance of the serial driver class object */
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2017-07-20 17:34:48 +02:00
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ret = cdcacm_classobject(minor, &devinfo, &drvr);
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2012-01-25 20:27:20 +01:00
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if (ret == OK)
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{
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/* Register the USB serial class driver */
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ret = usbdev_register(drvr);
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if (ret < 0)
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{
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2017-07-16 16:43:17 +02:00
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usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_DEVREGISTER),
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(uint16_t)-ret);
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2012-01-25 20:27:20 +01:00
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}
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}
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2012-02-28 19:14:55 +01:00
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/* Return the driver instance (if any) if the caller has requested it
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* by provided a pointer to the location to return it.
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*/
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if (handle)
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{
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2015-10-10 18:41:00 +02:00
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*handle = (FAR void *)drvr;
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2012-02-28 19:14:55 +01:00
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}
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2012-01-25 20:27:20 +01:00
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return ret;
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}
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#endif
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2012-01-25 23:20:48 +01:00
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/****************************************************************************
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2012-01-26 00:04:17 +01:00
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* Name: cdcacm_uninitialize
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2012-01-25 23:20:48 +01:00
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*
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* Description:
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2012-02-28 19:14:55 +01:00
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* Un-initialize the USB storage class driver. This function is used
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2014-04-05 19:35:05 +02:00
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* internally by the USB composite driver to uninitialize the CDC/ACM
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2012-02-28 19:14:55 +01:00
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* driver. This same interface is available (with an untyped input
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* parameter) when the CDC/ACM driver is used standalone.
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2012-01-25 23:20:48 +01:00
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*
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* Input Parameters:
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2012-02-28 19:14:55 +01:00
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* There is one parameter, it differs in typing depending upon whether the
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2020-08-06 19:41:45 +02:00
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* CDC/ACM driver is an internal part of a composite device, or a
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* standalone USB driver:
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2012-02-28 19:14:55 +01:00
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*
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2017-07-16 16:43:17 +02:00
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* classdev - The class object returned by cdcacm_classobject()
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2014-04-05 19:35:05 +02:00
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* handle - The opaque handle representing the class object returned by
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2012-02-28 19:14:55 +01:00
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* a previous call to cdcacm_initialize().
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2012-01-25 23:20:48 +01:00
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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2012-01-27 00:14:27 +01:00
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#ifdef CONFIG_CDCACM_COMPOSITE
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2012-01-26 00:04:17 +01:00
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void cdcacm_uninitialize(FAR struct usbdevclass_driver_s *classdev)
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2012-02-28 19:14:55 +01:00
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#else
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void cdcacm_uninitialize(FAR void *handle)
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#endif
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2012-01-25 23:20:48 +01:00
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{
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2012-02-28 19:14:55 +01:00
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#ifdef CONFIG_CDCACM_COMPOSITE
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2012-01-26 00:04:17 +01:00
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FAR struct cdcacm_driver_s *drvr = (FAR struct cdcacm_driver_s *)classdev;
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2012-02-28 19:14:55 +01:00
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#else
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FAR struct cdcacm_driver_s *drvr = (FAR struct cdcacm_driver_s *)handle;
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#endif
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2012-01-26 00:04:17 +01:00
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FAR struct cdcacm_dev_s *priv = drvr->dev;
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2012-02-28 19:14:55 +01:00
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char devname[CDCACM_DEVNAME_SIZE];
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int ret;
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2013-11-05 16:12:08 +01:00
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#ifdef CONFIG_CDCACM_COMPOSITE
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/* Check for pass 2 uninitialization. We did most of the work on the
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* first pass uninitialization.
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*/
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if (priv->minor == (uint8_t)-1)
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{
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/* In this second and final pass, all that remains to be done is to
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* free the memory resources.
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*/
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2020-08-04 12:31:31 +02:00
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wd_cancel(&priv->rxfailsafe);
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2014-09-01 01:04:02 +02:00
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kmm_free(priv);
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2013-11-05 16:12:08 +01:00
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return;
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}
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#endif
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2012-02-28 19:14:55 +01:00
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/* Un-register the CDC/ACM TTY device */
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2020-01-10 16:06:36 +01:00
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snprintf(devname, CDCACM_DEVNAME_SIZE, CDCACM_DEVNAME_FORMAT, priv->minor);
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2012-02-28 19:14:55 +01:00
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ret = unregister_driver(devname);
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if (ret < 0)
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{
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2019-01-02 14:44:20 +01:00
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usbtrace(TRACE_CLSERROR(USBSER_TRACEERR_UARTUNREGISTER),
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(uint16_t)-ret);
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2012-02-28 19:14:55 +01:00
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}
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2012-01-25 23:20:48 +01:00
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2012-04-25 18:47:28 +02:00
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/* Unregister the driver (unless we are a part of a composite device). The
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* device unregister logic will (1) return all of the requests to us then
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* (2) all the unbind method.
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*
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* The same thing will happen in the composite case except that: (1) the
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* composite driver will call usbdev_unregister() which will (2) return the
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* requests for all members of the composite, and (3) call the unbind
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* method in the composite device which will (4) call the unbind method
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* for this device.
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*/
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2012-01-25 23:20:48 +01:00
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2012-01-26 00:04:17 +01:00
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#ifndef CONFIG_CDCACM_COMPOSITE
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2012-02-28 19:14:55 +01:00
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usbdev_unregister(&drvr->drvr);
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2012-01-25 23:20:48 +01:00
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2019-10-08 16:01:30 +02:00
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/* And free the memory resources. */
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2012-01-25 23:20:48 +01:00
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2020-08-04 12:31:31 +02:00
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wd_cancel(&priv->rxfailsafe);
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2014-09-01 01:04:02 +02:00
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kmm_free(priv);
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2013-11-05 16:12:08 +01:00
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#else
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/* For the case of the composite driver, there is a two pass
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* uninitialization sequence. We cannot yet free the driver structure.
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* We will do that on the second pass. We mark the fact that we have
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2014-04-05 19:35:05 +02:00
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* already uninitialized by setting the minor number to -1. If/when we
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2013-11-05 16:12:08 +01:00
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* are called again, then we will free the memory resources.
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*/
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priv->minor = (uint8_t)-1;
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#endif
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2012-01-25 23:20:48 +01:00
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}
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2017-07-16 16:43:17 +02:00
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/****************************************************************************
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* Name: cdcacm_get_composite_devdesc
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*
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* Description:
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* Helper function to fill in some constants into the composite
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* configuration struct.
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*
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* Input Parameters:
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* dev - Pointer to the configuration struct we should fill
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#if defined(CONFIG_USBDEV_COMPOSITE) && defined(CONFIG_CDCACM_COMPOSITE)
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void cdcacm_get_composite_devdesc(struct composite_devdesc_s *dev)
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{
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memset(dev, 0, sizeof(struct composite_devdesc_s));
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/* The callback functions for the CDC/ACM class.
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*
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* classobject() and uninitialize() must be provided by board-specific
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* logic
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*/
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dev->mkconfdesc = cdcacm_mkcfgdesc;
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dev->mkstrdesc = cdcacm_mkstrdesc;
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dev->nconfigs = CDCACM_NCONFIGS; /* Number of configurations supported */
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dev->configid = CDCACM_CONFIGID; /* The only supported configuration ID */
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2020-08-06 19:41:45 +02:00
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/* Let the construction function calculate the size of config descriptor */
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2017-07-16 16:43:17 +02:00
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#ifdef CONFIG_USBDEV_DUALSPEED
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dev->cfgdescsize = cdcacm_mkcfgdesc(NULL, NULL, USB_SPEED_UNKNOWN, 0);
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#else
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dev->cfgdescsize = cdcacm_mkcfgdesc(NULL, NULL);
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#endif
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/* Board-specific logic must provide the device minor */
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/* Interfaces.
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*
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* ifnobase must be provided by board-specific logic
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*/
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2017-07-20 17:34:48 +02:00
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dev->devinfo.ninterfaces = CDCACM_NINTERFACES; /* Number of interfaces in the configuration */
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2017-07-16 16:43:17 +02:00
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/* Strings.
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*
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* strbase must be provided by board-specific logic
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*/
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2017-07-20 17:34:48 +02:00
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dev->devinfo.nstrings = CDCACM_NSTRIDS; /* Number of Strings */
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2017-07-16 16:43:17 +02:00
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/* Endpoints.
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*
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* Endpoint numbers must be provided by board-specific logic.
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*/
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2017-07-20 17:34:48 +02:00
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dev->devinfo.nendpoints = CDCACM_NUM_EPS;
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2017-07-16 16:43:17 +02:00
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}
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#endif
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