2009-09-25 18:30:36 +02:00
|
|
|
/************************************************************************************
|
|
|
|
* configs/stm3210e-eval/include/board.h
|
|
|
|
* include/arch/board/board.h
|
|
|
|
*
|
|
|
|
* Copyright (C) 2009 Gregory Nutt. All rights reserved.
|
2011-10-11 22:50:10 +02:00
|
|
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
2009-09-25 18:30:36 +02:00
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions
|
|
|
|
* are met:
|
|
|
|
*
|
|
|
|
* 1. Redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer.
|
|
|
|
* 2. Redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in
|
|
|
|
* the documentation and/or other materials provided with the
|
|
|
|
* distribution.
|
|
|
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
|
|
|
* used to endorse or promote products derived from this software
|
|
|
|
* without specific prior written permission.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
|
|
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
|
|
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
|
|
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
|
|
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
|
|
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
|
|
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
|
|
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
|
|
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
|
|
|
* POSSIBILITY OF SUCH DAMAGE.
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#ifndef __ARCH_BOARD_BOARD_H
|
|
|
|
#define __ARCH_BOARD_BOARD_H
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Included Files
|
|
|
|
************************************************************************************/
|
|
|
|
|
2009-11-26 01:18:22 +01:00
|
|
|
#include <nuttx/config.h>
|
2009-09-25 18:30:36 +02:00
|
|
|
#ifndef __ASSEMBLY__
|
2009-12-15 21:56:22 +01:00
|
|
|
# include <stdint.h>
|
2009-09-25 18:30:36 +02:00
|
|
|
#endif
|
2009-09-28 21:14:37 +02:00
|
|
|
#include "stm32_rcc.h"
|
2009-11-25 14:50:26 +01:00
|
|
|
#include "stm32_sdio.h"
|
2009-09-25 18:30:36 +02:00
|
|
|
#include "stm32_internal.h"
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Definitions
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
/* Clocking *************************************************************************/
|
|
|
|
|
2009-09-28 21:14:37 +02:00
|
|
|
/* On-board crystal frequency is 8MHz (HSE) */
|
|
|
|
|
2011-03-28 17:01:43 +02:00
|
|
|
#define STM32_BOARD_XTAL 8000000ul
|
2009-09-28 21:14:37 +02:00
|
|
|
|
|
|
|
/* PLL source is HSE/1, PLL multipler is 9: PLL frequency is 8MHz (XTAL) x 9 = 72MHz */
|
|
|
|
|
2011-03-28 17:01:43 +02:00
|
|
|
#define STM32_CFGR_PLLSRC RCC_CFGR_PLLSRC
|
|
|
|
#define STM32_CFGR_PLLXTPRE 0
|
|
|
|
#define STM32_CFGR_PLLMUL RCC_CFGR_PLLMUL_CLKx9
|
|
|
|
#define STM32_PLL_FREQUENCY (9*STM32_BOARD_XTAL)
|
2009-09-28 21:14:37 +02:00
|
|
|
|
|
|
|
/* Use the PLL and set the SYSCLK source to be the PLL */
|
|
|
|
|
2011-03-28 17:01:43 +02:00
|
|
|
#define STM32_SYSCLK_SW RCC_CFGR_SW_PLL
|
|
|
|
#define STM32_SYSCLK_SWS RCC_CFGR_SWS_PLL
|
|
|
|
#define STM32_SYSCLK_FREQUENCY STM32_PLL_FREQUENCY
|
2009-09-28 21:14:37 +02:00
|
|
|
|
|
|
|
/* AHB clock (HCLK) is SYSCLK (72MHz) */
|
|
|
|
|
2011-03-28 17:01:43 +02:00
|
|
|
#define STM32_RCC_CFGR_HPRE RCC_CFGR_HPRE_SYSCLK
|
|
|
|
#define STM32_HCLK_FREQUENCY STM32_PLL_FREQUENCY
|
|
|
|
#define STM32_BOARD_HCLK STM32_HCLK_FREQUENCY /* same as above, to satisfy compiler */
|
2009-09-28 21:14:37 +02:00
|
|
|
|
|
|
|
/* APB2 clock (PCLK2) is HCLK (72MHz) */
|
|
|
|
|
2011-03-28 17:01:43 +02:00
|
|
|
#define STM32_RCC_CFGR_PPRE2 RCC_CFGR_PPRE2_HCLK
|
|
|
|
#define STM32_PCLK2_FREQUENCY STM32_HCLK_FREQUENCY
|
2011-12-20 19:28:50 +01:00
|
|
|
#define STM32_APB2_CLKIN (STM32_PCLK2_FREQUENCY) /* Timers 2-7, 12-14 */
|
|
|
|
|
|
|
|
/* APB2 timers 1 and 8 will receive PCLK2. */
|
|
|
|
|
2011-12-22 01:31:47 +01:00
|
|
|
#define STM32_APB2_TIM1_CLKIN (STM32_PCLK2_FREQUENCY)
|
|
|
|
#define STM32_APB2_TIM8_CLKIN (STM32_PCLK2_FREQUENCY)
|
2009-09-28 21:14:37 +02:00
|
|
|
|
|
|
|
/* APB1 clock (PCLK1) is HCLK/2 (36MHz) */
|
|
|
|
|
2011-03-28 17:01:43 +02:00
|
|
|
#define STM32_RCC_CFGR_PPRE1 RCC_CFGR_PPRE1_HCLKd2
|
|
|
|
#define STM32_PCLK1_FREQUENCY (STM32_HCLK_FREQUENCY/2)
|
2009-09-28 21:14:37 +02:00
|
|
|
|
2011-12-20 19:28:50 +01:00
|
|
|
/* APB1 timers 2-4 will be twice PCLK1 (I presume the remaining will receive PCLK1) */
|
|
|
|
|
|
|
|
#define STM32_APB1_TIM2_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
|
|
|
#define STM32_APB1_TIM3_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
|
|
|
#define STM32_APB1_TIM4_CLKIN (2*STM32_PCLK1_FREQUENCY)
|
|
|
|
#define STM32_APB1_TIM5_CLKIN (STM32_PCLK1_FREQUENCY)
|
|
|
|
#define STM32_APB1_TIM6_CLKIN (STM32_PCLK1_FREQUENCY)
|
|
|
|
#define STM32_APB1_TIM7_CLKIN (STM32_PCLK1_FREQUENCY)
|
|
|
|
|
2009-10-29 21:30:46 +01:00
|
|
|
/* USB divider -- Divide PLL clock by 1.5 */
|
2009-09-28 21:14:37 +02:00
|
|
|
|
2011-03-28 17:01:43 +02:00
|
|
|
#define STM32_CFGR_USBPRE 0
|
|
|
|
|
|
|
|
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
|
|
|
|
* otherwise frequency is 2xAPBx.
|
|
|
|
* Note: TIM1,8 are on APB2, others on APB1 */
|
|
|
|
|
|
|
|
#define STM32_TIM18_FREQUENCY STM32_HCLK_FREQUENCY
|
|
|
|
#define STM32_TIM27_FREQUENCY STM32_HCLK_FREQUENCY
|
2009-09-26 20:59:09 +02:00
|
|
|
|
2009-11-25 14:50:26 +01:00
|
|
|
/* SDIO dividers. Note that slower clocking is required when DMA is disabled
|
|
|
|
* in order to avoid RX overrun/TX underrun errors due to delayed responses
|
|
|
|
* to service FIFOs in interrupt driven mode. These values have not been
|
|
|
|
* tuned!!!
|
|
|
|
*
|
|
|
|
* HCLK=72MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(178+2)=400 KHz
|
|
|
|
*/
|
|
|
|
|
2011-03-28 17:01:43 +02:00
|
|
|
#define SDIO_INIT_CLKDIV (178 << SDIO_CLKCR_CLKDIV_SHIFT)
|
2009-11-25 14:50:26 +01:00
|
|
|
|
|
|
|
/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(2+2)=18 MHz
|
|
|
|
* DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifdef CONFIG_SDIO_DMA
|
2011-03-28 17:01:43 +02:00
|
|
|
# define SDIO_MMCXFR_CLKDIV (2 << SDIO_CLKCR_CLKDIV_SHIFT)
|
2009-11-25 14:50:26 +01:00
|
|
|
#else
|
2011-03-28 17:01:43 +02:00
|
|
|
# define SDIO_MMCXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT)
|
2009-11-25 14:50:26 +01:00
|
|
|
#endif
|
|
|
|
|
|
|
|
/* DMA ON: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(1+2)=24 MHz
|
|
|
|
* DMA OFF: HCLK=72 MHz, SDIOCLK=72MHz, SDIO_CK=HCLK/(3+2)=14.4 MHz
|
|
|
|
*/
|
|
|
|
|
|
|
|
#ifdef CONFIG_SDIO_DMA
|
2011-03-28 17:01:43 +02:00
|
|
|
# define SDIO_SDXFR_CLKDIV (1 << SDIO_CLKCR_CLKDIV_SHIFT)
|
2009-11-25 14:50:26 +01:00
|
|
|
#else
|
2011-03-28 17:01:43 +02:00
|
|
|
# define SDIO_SDXFR_CLKDIV (3 << SDIO_CLKCR_CLKDIV_SHIFT)
|
2009-11-25 14:50:26 +01:00
|
|
|
#endif
|
|
|
|
|
2012-04-09 21:38:26 +02:00
|
|
|
/* SRAM definitions *****************************************************************/
|
|
|
|
/* The 8 Mbit SRAM is provided on the PT3 board using the FSMC_NE3 chip select. */
|
|
|
|
|
|
|
|
/* This is the Bank1 SRAM3 address: */
|
|
|
|
|
|
|
|
#define BOARD_SRAM_BASE 0x68000000 /* Bank2 SRAM3 base address */
|
|
|
|
#define BOARD_SRAM_SIZE (1*1024*1024) /* 8-Mbit = 1-Mbyte */
|
|
|
|
|
2009-09-25 18:30:36 +02:00
|
|
|
/* LED definitions ******************************************************************/
|
|
|
|
|
2009-10-14 22:41:56 +02:00
|
|
|
/* The STM3210E-EVAL board has 4 LEDs that we will encode as: */
|
2009-09-30 17:03:25 +02:00
|
|
|
|
|
|
|
#define LED_STARTED 0 /* LED1 */
|
|
|
|
#define LED_HEAPALLOCATE 1 /* LED2 */
|
|
|
|
#define LED_IRQSENABLED 2 /* LED1 + LED2 */
|
|
|
|
#define LED_STACKCREATED 3 /* LED3 */
|
|
|
|
#define LED_INIRQ 4 /* LED1 + LED3 */
|
|
|
|
#define LED_SIGNAL 5 /* LED2 + LED3 */
|
|
|
|
#define LED_ASSERTION 6 /* LED1 + LED2 + LED3 */
|
|
|
|
#define LED_PANIC 7 /* N/C + N/C + N/C + LED4 */
|
2009-09-25 18:30:36 +02:00
|
|
|
|
2009-11-05 15:07:41 +01:00
|
|
|
/* The STM3210E-EVAL supports several buttons
|
|
|
|
*
|
|
|
|
* Reset -- Connected to NRST
|
|
|
|
* Wakeup -- Connected to PA.0
|
|
|
|
* Tamper -- Connected to PC.13
|
|
|
|
* Key -- Connected to PG.8
|
|
|
|
*
|
|
|
|
* And a Joystick
|
|
|
|
*
|
|
|
|
* Joystick center -- Connected to PG.7
|
|
|
|
* Joystick down -- Connected to PD.3
|
|
|
|
* Joystick left -- Connected to PG.14
|
|
|
|
* Joystick right -- Connected to PG.13
|
|
|
|
* Joystick up -- Connected to PG.15
|
|
|
|
*/
|
|
|
|
|
2011-08-19 06:12:33 +02:00
|
|
|
#define BUTTON_WAKEUP 0
|
|
|
|
#define BUTTON_TAMPER 1
|
|
|
|
#define BUTTON_KEY 2
|
|
|
|
|
|
|
|
#define JOYSTICK_SEL 3
|
|
|
|
#define JOYSTICK_DOWN 4
|
|
|
|
#define JOYSTICK_LEFT 5
|
|
|
|
#define JOYSTICK_RIGHT 6
|
|
|
|
#define JOYSTICK_UP 7
|
|
|
|
|
|
|
|
#define NUM_BUTTONS 8
|
|
|
|
|
|
|
|
#define BUTTON_WAKEUP_BIT (1 << BUTTON_WAKEUP)
|
|
|
|
#define BUTTON_TAMPER_BIT (1 << BUTTON_TAMPER)
|
|
|
|
#define BUTTON_KEY_BIT (1 << BUTTON_KEY)
|
|
|
|
|
|
|
|
#define JOYSTICK_SEL_BIT (1 << JOYSTICK_SEL)
|
|
|
|
#define JOYSTICK_DOWN_BIT (1 << JOYSTICK_DOWN)
|
|
|
|
#define JOYSTICK_LEFT_BIT (1 << JOYSTICK_LEFT)
|
|
|
|
#define JOYSTICK_RIGHT_BIT (1 << JOYSTICK_RIGHT)
|
|
|
|
#define JOYSTICK_UP_BIT (1 << JOYSTICK_UP)
|
2009-11-05 15:07:41 +01:00
|
|
|
|
2009-09-25 18:30:36 +02:00
|
|
|
/************************************************************************************
|
2009-11-05 15:07:41 +01:00
|
|
|
* Public Data
|
2009-09-25 18:30:36 +02:00
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#ifndef __ASSEMBLY__
|
|
|
|
|
2009-11-05 15:07:41 +01:00
|
|
|
#undef EXTERN
|
|
|
|
#if defined(__cplusplus)
|
|
|
|
#define EXTERN extern "C"
|
|
|
|
extern "C" {
|
|
|
|
#else
|
|
|
|
#define EXTERN extern
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Public Function Prototypes
|
|
|
|
************************************************************************************/
|
2009-09-25 18:30:36 +02:00
|
|
|
/************************************************************************************
|
|
|
|
* Name: stm32_boardinitialize
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* All STM32 architectures must provide the following entry point. This entry point
|
|
|
|
* is called early in the intitialization -- after all memory has been configured
|
|
|
|
* and mapped but before any devices have been initialized.
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
2009-11-05 15:07:41 +01:00
|
|
|
EXTERN void stm32_boardinitialize(void);
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Button support.
|
|
|
|
*
|
|
|
|
* Description:
|
2011-07-07 18:20:35 +02:00
|
|
|
* up_buttoninit() must be called to initialize button resources. After
|
|
|
|
* that, up_buttons() may be called to collect the current state of all
|
|
|
|
* buttons or up_irqbutton() may be called to register button interrupt
|
|
|
|
* handlers.
|
|
|
|
*
|
|
|
|
* After up_buttoninit() has been called, up_buttons() may be called to
|
|
|
|
* collect the state of all buttons. up_buttons() returns an 8-bit bit set
|
|
|
|
* with each bit associated with a button. See the BUTTON_*_BIT and JOYSTICK_*_BIT
|
|
|
|
* definitions in board.h for the meaning of each bit.
|
|
|
|
*
|
|
|
|
* up_irqbutton() may be called to register an interrupt handler that will
|
|
|
|
* be called when a button is depressed or released. The ID value is a
|
|
|
|
* button enumeration value that uniquely identifies a button resource. See the
|
|
|
|
* BUTTON_* and JOYSTICK_* definitions in board.h for the meaning of enumeration
|
|
|
|
* value. The previous interrupt handler address is returned (so that it may
|
|
|
|
* restored, if so desired).
|
2009-11-05 15:07:41 +01:00
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_ARCH_BUTTONS
|
|
|
|
EXTERN void up_buttoninit(void);
|
2009-12-15 21:56:22 +01:00
|
|
|
EXTERN uint8_t up_buttons(void);
|
2011-07-07 18:20:35 +02:00
|
|
|
#ifdef CONFIG_ARCH_IRQBUTTONS
|
|
|
|
EXTERN xcpt_t up_irqbutton(int id, xcpt_t irqhandler);
|
|
|
|
#endif
|
2009-11-05 15:07:41 +01:00
|
|
|
#endif
|
|
|
|
|
2011-08-26 18:27:26 +02:00
|
|
|
/************************************************************************************
|
|
|
|
* Name: stm3210e_lcdclear
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* This is a non-standard LCD interface just for the STM3210E-EVAL board. Because
|
|
|
|
* of the various rotations, clearing the display in the normal way by writing a
|
|
|
|
* sequences of runs that covers the entire display can be very slow. Here the
|
|
|
|
* dispaly is cleared by simply setting all GRAM memory to the specified color.
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#ifdef CONFIG_STM32_FSMC
|
|
|
|
EXTERN void stm3210e_lcdclear(uint16_t color);
|
|
|
|
#endif
|
|
|
|
|
2011-09-10 18:20:09 +02:00
|
|
|
/************************************************************************************
|
|
|
|
* Name: stm32_lm75initialize
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Initialize and register the LM-75 Temperature Sensor driver.
|
|
|
|
*
|
|
|
|
* Input parameters:
|
|
|
|
* devpath - The full path to the driver to register. E.g., "/dev/temp0"
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* Zero (OK) on success; a negated errno value on failure.
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#if defined(CONFIG_I2C) && defined(CONFIG_I2C_LM75) && defined(CONFIG_STM32_I2C1)
|
|
|
|
EXTERN int stm32_lm75initialize(FAR const char *devpath);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/************************************************************************************
|
|
|
|
* Name: stm32_lm75attach
|
|
|
|
*
|
|
|
|
* Description:
|
|
|
|
* Attach the LM-75 interrupt handler
|
|
|
|
*
|
|
|
|
* Input parameters:
|
|
|
|
* irqhandler - the LM-75 interrupt handler
|
|
|
|
*
|
|
|
|
* Returned Value:
|
|
|
|
* The previous LM-75 interrupt handler
|
|
|
|
*
|
|
|
|
************************************************************************************/
|
|
|
|
|
|
|
|
#if defined(CONFIG_I2C) && defined(CONFIG_I2C_LM75) && defined(CONFIG_STM32_I2C1)
|
|
|
|
EXTERN xcpt_t stm32_lm75attach(xcpt_t irqhandler);
|
|
|
|
#endif
|
|
|
|
|
2009-11-05 15:07:41 +01:00
|
|
|
#undef EXTERN
|
|
|
|
#if defined(__cplusplus)
|
|
|
|
}
|
|
|
|
#endif
|
2009-09-25 18:30:36 +02:00
|
|
|
|
|
|
|
#endif /* __ASSEMBLY__ */
|
|
|
|
#endif /* __ARCH_BOARD_BOARD_H */
|