Commit Graph

50622 Commits

Author SHA1 Message Date
Peter Bee
58f9cf7c04 boards: update README for virtio gpu driver
Signed-off-by: Peter Bee <bijunda1@xiaomi.com>
2023-08-15 13:32:05 +08:00
Tiago Medicci Serrano
281ab83309 esp32s3: Use PANIC() instead of assert(0)
Considering kernel code, it's reasonable to use `PANIC()` instead
of `assert(0)` to handle with situations that require abort. Unlike
`assert`, `PANIC()` doesn't dependent on `NDEBUG`.
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
6f235c5f0a esp32-devkitc: Enable softAP on blewifi defconfig to ease testing
In order to properly test the W-Fi/BT coexistence mode, set the
Wi-Fi mode to station + softAP.
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
01b6c87b15 esp32s3: Implement the Wi-Fi/BLE coexistence
ESP32-S3 has only one 2.4 GHz ISM band RF module, which is shared
by Bluetooth and Wi-Fi, so Bluetooth can’t receive or transmit data
while Wi-Fi is receiving or transmitting data and vice versa.
Under such circumstances, ESP32-S3 uses the time-division
multiplexing method to receive and transmit packets.
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
7d605551cd esp32s3/wifi: Enable peripheral interrupt to the same CPU interrupt
The low-level Wi-Fi driver registers two peripheral interrupts to
the same CPU interrupt. Although the registered ISR is the same for
both peripherals interrupt, it's needed to call `up_enable_irq` to
ensure that the interrupt matrix is being set accordingly.

Please note that the current implementation of the  ESP32-S3's IRQ
driver - although allow us to set a callback for each IRQ, which
represents the peripherals interrupt - doesn't allow us to call
both callbacks when these IRQs refers to a same CPU interrupt.
`g_cpu0_intmap` (or `g_cpu1_intmap`) associates each CPU interrupt
to a single IRQ/peripheral and, then, when a CPU interrupt is
triggered, only the last registered IRQ's callback will be called.
This isn't a problem here because 1) the registered callback is the
same for both IRQ's (in fact, it considers the CPU interrupt) and
2) we know in advance which peripheral interrupts will be attached
to which CPU interrupt and, then, we can set them directly.
2023-08-14 16:29:21 -03:00
Petro Karashchenko
655d00b1e7 arch/xtensa/esp32s3: initial effort to get BLE running on ESP32-S3
Signed-off-by: Petro Karashchenko <petro.karashchenko@gmail.com>
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
33f03fc98c esp32s3/wlan: Always run wlan_rxpoll work queue
Even if we were unable to get a free IOB, trigger the work queue
to make sure that no old packet is waiting to be handled by the
network upper layers.
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
012dddf7c9 esp32s3/wlan: check for all connections on wlan_txpoll
This prevents us from getting stuck while polling the different
network structures in `devif_poll_connections`. This is useful for
Wi-Fi/Bluetooth coexistence, specifically.
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
6589887284 esp32s3/wlan: check if the network device's IOB isn't null
Before adding the upper layer network device's IOB to the TX queue
of the wireless driver, check if it isn't null.
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
ec4149c61d esp32s3/hardware: Update regi2c_ctrl.h functions name 2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
6089f58f00 esp32s3/irq: Enhance IRQ subsystem
- Fix macro values from `arch/xtensa/include/esp32s3/irq.h`
- Remove references to unexisting edge-triggered CPU interrupts
- Add `esp32s3_getirq` to get IRQ based on core and the `cpuint`
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
31476bcb34 esp32s3/rtc: Initialize RTC subsystem
RTC subsystem controls not only the RTC itself but functions that
use RTC-enabled features like Bluetooth and Wi-Fi. Initialization
must be performed during the system start-up.
2023-08-14 16:29:21 -03:00
Tiago Medicci Serrano
7dafbb05a1 esp32s3/peripherals: Add initialization routine for the peripherals
It provides an initialization function that performs the
peripherals' initialization routine during the chip startup.
2023-08-14 16:29:21 -03:00
Xiang Xiao
14563aa48c arch/armv7r: Sync gic/timer with armv7-a and armv8-a
Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-08-14 14:51:01 -03:00
Xiang Xiao
e4dea90725 arch/armv7-a: Update the macro definition in gic.h
https://developer.arm.com/documentation/ihi0048/b

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-08-14 14:51:01 -03:00
Tiago Medicci Serrano
98985f48dd sched/semaphore: Remove restriction to use nxsem_trywait from ISR
Considering that `nxsem_trywait` is non-blocking, although not
recommended, it could be called from the interrupt handler.
2023-08-14 23:47:41 +08:00
liqinhui
719191ac72 net/local: Return an error when write the too big packet.
Verification:
  Write a packet, the length is bigger than CONFIG_DEV_FIFO_SIZE.
  The return value should be -1, and the errno is EMSGSIZE.
Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2023-08-14 23:46:08 +08:00
raiden00pl
89174e6a1a arch/stm32h7: use correct name for bit 2 in STM32_PWR_CR3 register 2023-08-14 23:42:37 +08:00
raiden00pl
ae6067fb29 boards/stm32h7: HCLK and ACLK are delivered from SYSCLK not CPUCLK 2023-08-14 23:40:46 +08:00
David Sidrane
60840f1ed2 imxrt:Serial Preserve all but W1C bit in SR
SR contains configuration bits that need to be preserved.
2023-08-14 18:23:59 +03:00
liqinhui
2d0df3b5f2 net/local: Fix the error return length when read the bigger packet.
Verifiction:
  Write a bigger packet and read the packet using a smaller buffer.
  The return length of reading should be the length of smaller buffer.

Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2023-08-14 21:11:30 +08:00
liqinhui
8631e0c6b5 net/tcp: Fix the sack byte aligment error.
The error log is as follows:
  tcp/tcp_send_buffered.c:376:57: runtime error: member access within misaligned
  address 0x10075942 for type 'struct tcp_sack_s', which requires 4 byte alignment

Signed-off-by: liqinhui <liqinhui@xiaomi.com>
2023-08-14 20:46:09 +08:00
anjiahao
307e0eb964 arch/sim:add -Ttext-segment to load the image in the fixed address
to make the address returned by backtrace and gdbstub match the symbol stored in elf.

Signed-off-by: anjiahao <anjiahao@xiaomi.com>
2023-08-14 20:43:41 +08:00
raiden00pl
ec97cc8a31 ci: build arduino-nano-33ble and arduino-nano-33ble-rev2 with cmake 2023-08-14 20:42:59 +08:00
raiden00pl
67079154c7 Documentation: add Arduino Nano 33 BLE Sense and Arduino Nano 33 BLE Sense Rev2 2023-08-14 20:42:59 +08:00
raiden00pl
a1d7b2961d boards/nrf52: add Arduino Nano 33 BLE Rev2 board 2023-08-14 20:42:59 +08:00
liuhongchao
f9dbeaef86 drivers/input:fix circbuf leak
Signed-off-by: liuhongchao <liuhongchao@xiaomi.com>
2023-08-14 20:40:11 +08:00
simbit18
5830da2fc8 boards/Kconfig: Fix Kconfig style
Add TABs
remove the extra ---help--- in config ARCH_BOARD_METRO_M4
2023-08-14 14:12:27 +03:00
raiden00pl
b73e1b9591 arch/{nrf52|nrf53|nrf91}: handle I2C errors in interrupt mode 2023-08-14 17:51:48 +08:00
xuxin19
d18988521f cmake:fix add_user_library module archive issue
STATIC target export in BINDIR/staging/ directory by `cmake --install`

Signed-off-by: xuxin19 <xuxin19@xiaomi.com>
2023-08-14 08:06:56 +02:00
yinshengkai
756f6f425a sim/segger: adjust the maximum number of channels for notes
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-08-14 13:41:00 +08:00
yinshengkai
b106f032cb drivers/note: add maximum channel number check
Signed-off-by: yinshengkai <yinshengkai@xiaomi.com>
2023-08-14 13:41:00 +08:00
dulibo1
3591de08c6 fix g_goldfish_gauge_ops init C89 compatible and align style
Signed-off-by: dulibo1 <dulibo1@xiaomi.com>
2023-08-14 13:40:38 +08:00
Brian Doherty
f444de0882 Initial port to Arduino Nano 33 BLE. 2023-08-14 11:11:50 +08:00
fangxinyong
903e87a7bd builtin: support uid/gid config for binfs app
Implement I_SUID/I_SGID feature for binfs in the POSIX compliant way.
If set-user-ID bit is set in the file permissions, then the effective
user ID of process shall be set to UID of the new process image file.

test case:
hello example emulates to set uid and file set-user-ID bit, and call
geteuid and getegid API.
UID  = 2000
GID  = 3000
MODE = 06555

nsh> ls -l /bin/hello
 -r-sr-sr-x    2000    3000       0 hello
nsh> hello
geteuid:2000
getegid:3000

Signed-off-by: fangxinyong <fangxinyong@xiaomi.com>
2023-08-14 01:37:00 +08:00
jianglianfang
5accd7c146 drivers/video: add Goldfish-FB driver
the register definition is described here:
https://android.googlesource.com/platform/external/qemu/+/master/docs/GOLDFISH-VIRTUAL-HARDWARE.TXT

Goldfish-FB driver is to communicate with Goldfish-FB in QEMU, and push the framebuffer data to the emulator for display on the screen.
test: CONFIG_GOLDFISH_FB =1, and run demo=>lvgldemo widgets

Signed-off-by: jianglianfang <jianglianfang@xiaomi.com>
2023-08-13 11:51:30 -03:00
rongyichang
72587c6e79 drivers/virtio: add virtio input driver
Signed-off-by: liuhongchao <liuhongchao@xiaomi.com>
2023-08-13 11:47:39 -03:00
raiden00pl
5572552024 arch/nrf53: port 6e8f25ba3b change from nrf52
Added config setting for NRF53 I2C timing bug workaround
2023-08-13 11:45:06 -03:00
raiden00pl
eec59015f0 arch/{nrf53|nrf91}: port cc99d94cfd change from nrf52
Fixed NRF52 I2C register naming
2023-08-13 11:45:06 -03:00
raiden00pl
3a61db4c7b arch/nrf53: port d7aea88727 change from nrf52
Changed NRF53 USB initialization to check for power via USBREGSTATUS instead of waiting for interrupt
2023-08-13 11:45:06 -03:00
raiden00pl
fc4ddfb1f4 arch/nrf52/nrf52_twi.h: fix condition
missing prefix CONFIG_* in commit 6e8f25ba3b
2023-08-13 11:45:06 -03:00
raiden00pl
bcef7d32f5 arch/nrf52/nrf52_i2c.c: remove unnecessary include introduced in cc99d94cfd 2023-08-13 11:45:06 -03:00
simbit18
693b034827 arch/arm/src/nrf91/Kconfig: Fix Kconfig style
Add TABs
Add comments
Remove spaces from Kconfig file
2023-08-13 11:44:19 -03:00
wanggang26
92eeaa4277 enable CONFIG_BOARDCTL for ofloader
Signed-off-by: wanggang26 <wanggang26@xiaomi.com>
2023-08-13 11:43:43 -03:00
Xiang Xiao
bd30d1a4d5 arch: Move trustzone related setting to common place
to share the security setting between arm32 and arm64

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-08-13 08:43:01 +02:00
Xiang Xiao
b183114d43 arch/arm: Change the default value to ARCH_TRUSTZONE_NONSECURE
since nuttx normally run inside the non secure execution environment

Signed-off-by: Xiang Xiao <xiaoxiang@xiaomi.com>
2023-08-13 08:43:01 +02:00
Brian Doherty
d7aea88727 Changed NRF52 USB initialization to check for power via USBREGSTATUS instead of waiting for interrupt, in case we've been launched from a bootloader. 2023-08-13 06:47:14 +08:00
Brian Doherty
cc99d94cfd Fixed NRF52 I2C register naming. 2023-08-13 06:46:57 +08:00
Brian Doherty
6e8f25ba3b Added config setting for NRF52 I2C timing bug workaround. 2023-08-13 06:46:31 +08:00
hujun5
c712a00620 drivers/input: rm sched_[un]lock
We use enter_critical_section to protect the read and write of priv structures,
sched_lock is mainly used to prevent active context switching caused by nxsem_post.
We do not actively switch contexts when reading and writing priv structures,
so sched_lock can be removed.

Signed-off-by: hujun5 <hujun5@xiaomi.com>
2023-08-12 23:32:38 +08:00